mx6sxsabreauto.h 4.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2014 Freescale Semiconductor, Inc.
  4. *
  5. * Configuration settings for the Freescale i.MX6SX Sabreauto board.
  6. */
  7. #ifndef __CONFIG_H
  8. #define __CONFIG_H
  9. #include "mx6_common.h"
  10. /* Size of malloc() pool */
  11. #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
  12. #define CONFIG_MXC_UART
  13. #define CONFIG_MXC_UART_BASE UART1_BASE
  14. #define CONFIG_EXTRA_ENV_SETTINGS \
  15. "script=boot.scr\0" \
  16. "image=zImage\0" \
  17. "console=ttymxc0\0" \
  18. "fdt_high=0xffffffff\0" \
  19. "initrd_high=0xffffffff\0" \
  20. "fdt_file=imx6sx-sabreauto.dtb\0" \
  21. "fdt_addr=0x88000000\0" \
  22. "boot_fdt=try\0" \
  23. "ip_dyn=yes\0" \
  24. "mmcdev=0\0" \
  25. "mmcpart=1\0" \
  26. "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
  27. "mmcargs=setenv bootargs console=${console},${baudrate} " \
  28. "root=${mmcroot}\0" \
  29. "loadbootscript=" \
  30. "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  31. "bootscript=echo Running bootscript from mmc ...; " \
  32. "source\0" \
  33. "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  34. "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  35. "mmcboot=echo Booting from mmc ...; " \
  36. "run mmcargs; " \
  37. "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  38. "if run loadfdt; then " \
  39. "bootz ${loadaddr} - ${fdt_addr}; " \
  40. "else " \
  41. "if test ${boot_fdt} = try; then " \
  42. "bootz; " \
  43. "else " \
  44. "echo WARN: Cannot load the DT; " \
  45. "fi; " \
  46. "fi; " \
  47. "else " \
  48. "bootz; " \
  49. "fi;\0" \
  50. "netargs=setenv bootargs console=${console},${baudrate} " \
  51. "root=/dev/nfs " \
  52. "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  53. "netboot=echo Booting from net ...; " \
  54. "run netargs; " \
  55. "if test ${ip_dyn} = yes; then " \
  56. "setenv get_cmd dhcp; " \
  57. "else " \
  58. "setenv get_cmd tftp; " \
  59. "fi; " \
  60. "${get_cmd} ${image}; " \
  61. "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  62. "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  63. "bootz ${loadaddr} - ${fdt_addr}; " \
  64. "else " \
  65. "if test ${boot_fdt} = try; then " \
  66. "bootz; " \
  67. "else " \
  68. "echo WARN: Cannot load the DT; " \
  69. "fi; " \
  70. "fi; " \
  71. "else " \
  72. "bootz; " \
  73. "fi;\0"
  74. #define CONFIG_BOOTCOMMAND \
  75. "mmc dev ${mmcdev};" \
  76. "mmc dev ${mmcdev}; if mmc rescan; then " \
  77. "if run loadbootscript; then " \
  78. "run bootscript; " \
  79. "else " \
  80. "if run loadimage; then " \
  81. "run mmcboot; " \
  82. "else run netboot; " \
  83. "fi; " \
  84. "fi; " \
  85. "else run netboot; fi"
  86. /* Miscellaneous configurable options */
  87. #define CONFIG_SYS_MEMTEST_START 0x80000000
  88. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000)
  89. /* Physical Memory Map */
  90. #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
  91. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
  92. #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
  93. #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
  94. #define CONFIG_SYS_INIT_SP_OFFSET \
  95. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  96. #define CONFIG_SYS_INIT_SP_ADDR \
  97. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  98. /* MMC Configuration */
  99. #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
  100. /* I2C Configs */
  101. #define CONFIG_SYS_I2C_MXC
  102. #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
  103. #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
  104. #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
  105. #define CONFIG_SYS_I2C_SPEED 100000
  106. /* NAND stuff */
  107. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  108. #define CONFIG_SYS_NAND_BASE 0x40000000
  109. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  110. #define CONFIG_SYS_NAND_ONFI_DETECTION
  111. /* DMA stuff, needed for GPMI/MXS NAND support */
  112. /* Network */
  113. #define CONFIG_FEC_MXC
  114. #define IMX_FEC_BASE ENET2_BASE_ADDR
  115. #define CONFIG_FEC_MXC_PHYADDR 0x0
  116. #define CONFIG_FEC_XCV_TYPE RGMII
  117. #define CONFIG_ETHPRIME "FEC"
  118. #define CONFIG_PHY_ATHEROS
  119. #ifdef CONFIG_CMD_USB
  120. #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  121. #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
  122. #define CONFIG_MXC_USB_FLAGS 0
  123. #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
  124. #endif
  125. #define CONFIG_IMX_THERMAL
  126. #ifdef CONFIG_FSL_QSPI
  127. #define CONFIG_SYS_FSL_QSPI_AHB
  128. #define FSL_QSPI_FLASH_SIZE SZ_32M
  129. #define FSL_QSPI_FLASH_NUM 2
  130. #endif
  131. #define CONFIG_SYS_FSL_USDHC_NUM 2
  132. #if defined(CONFIG_ENV_IS_IN_MMC)
  133. #define CONFIG_SYS_MMC_ENV_DEV 0 /*USDHC3*/
  134. #endif
  135. #endif /* __CONFIG_H */