mx53smd.h 3.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2011 Freescale Semiconductor, Inc.
  4. *
  5. * Configuration settings for the MX53SMD Freescale board.
  6. */
  7. #ifndef __CONFIG_H
  8. #define __CONFIG_H
  9. #define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD
  10. #include <asm/arch/imx-regs.h>
  11. #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  12. #define CONFIG_SETUP_MEMORY_TAGS
  13. #define CONFIG_INITRD_TAG
  14. #define CONFIG_REVISION_TAG
  15. #define CONFIG_SYS_FSL_CLK
  16. /* Size of malloc() pool */
  17. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
  18. #define CONFIG_MXC_UART
  19. #define CONFIG_MXC_UART_BASE UART1_BASE
  20. /* I2C Configs */
  21. #define CONFIG_SYS_I2C
  22. #define CONFIG_SYS_I2C_MXC
  23. #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
  24. #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
  25. #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
  26. /* MMC Configs */
  27. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  28. #define CONFIG_SYS_FSL_ESDHC_NUM 1
  29. /* Eth Configs */
  30. #define CONFIG_HAS_ETH1
  31. #define CONFIG_FEC_MXC
  32. #define IMX_FEC_BASE FEC_BASE_ADDR
  33. #define CONFIG_FEC_MXC_PHYADDR 0x1F
  34. /* allow to overwrite serial and ethaddr */
  35. #define CONFIG_ENV_OVERWRITE
  36. /* Command definition */
  37. #define CONFIG_ETHPRIME "FEC0"
  38. #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
  39. #define CONFIG_EXTRA_ENV_SETTINGS \
  40. "script=boot.scr\0" \
  41. "uimage=uImage\0" \
  42. "mmcdev=0\0" \
  43. "mmcpart=2\0" \
  44. "mmcroot=/dev/mmcblk0p3 rw\0" \
  45. "mmcrootfstype=ext3 rootwait\0" \
  46. "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
  47. "root=${mmcroot} " \
  48. "rootfstype=${mmcrootfstype}\0" \
  49. "loadbootscript=" \
  50. "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  51. "bootscript=echo Running bootscript from mmc ...; " \
  52. "source\0" \
  53. "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
  54. "mmcboot=echo Booting from mmc ...; " \
  55. "run mmcargs; " \
  56. "bootm\0" \
  57. "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
  58. "root=/dev/nfs " \
  59. "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  60. "netboot=echo Booting from net ...; " \
  61. "run netargs; " \
  62. "dhcp ${uimage}; bootm\0" \
  63. #define CONFIG_BOOTCOMMAND \
  64. "mmc dev ${mmcdev}; if mmc rescan; then " \
  65. "if run loadbootscript; then " \
  66. "run bootscript; " \
  67. "else " \
  68. "if run loaduimage; then " \
  69. "run mmcboot; " \
  70. "else run netboot; " \
  71. "fi; " \
  72. "fi; " \
  73. "else run netboot; fi"
  74. #define CONFIG_ARP_TIMEOUT 200UL
  75. /* Miscellaneous configurable options */
  76. #define CONFIG_SYS_MEMTEST_START 0x70000000
  77. #define CONFIG_SYS_MEMTEST_END 0x70010000
  78. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  79. /* Physical Memory Map */
  80. #define PHYS_SDRAM_1 CSD0_BASE_ADDR
  81. #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
  82. #define PHYS_SDRAM_2 CSD1_BASE_ADDR
  83. #define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
  84. #define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
  85. #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
  86. #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
  87. #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
  88. #define CONFIG_SYS_INIT_SP_OFFSET \
  89. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  90. #define CONFIG_SYS_INIT_SP_ADDR \
  91. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  92. /* environment organization */
  93. #define CONFIG_SYS_MMC_ENV_DEV 0
  94. #endif /* __CONFIG_H */