ls1028aqds.h 4.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2019 NXP
  4. */
  5. #ifndef __LS1028A_QDS_H
  6. #define __LS1028A_QDS_H
  7. #include "ls1028a_common.h"
  8. #define CONFIG_SYS_CLK_FREQ 100000000
  9. #define CONFIG_DDR_CLK_FREQ 100000000
  10. #define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4)
  11. /* DDR */
  12. #define CONFIG_DIMM_SLOTS_PER_CTLR 2
  13. #define CONFIG_QIXIS_I2C_ACCESS
  14. /*
  15. * QIXIS Definitions
  16. */
  17. #define CONFIG_FSL_QIXIS
  18. #ifdef CONFIG_FSL_QIXIS
  19. #define QIXIS_BASE 0x7fb00000
  20. #define QIXIS_BASE_PHYS QIXIS_BASE
  21. #define CONFIG_SYS_I2C_FPGA_ADDR 0x66
  22. #define QIXIS_LBMAP_SWITCH 1
  23. #define QIXIS_LBMAP_MASK 0x0f
  24. #define QIXIS_LBMAP_SHIFT 5
  25. #define QIXIS_LBMAP_DFLTBANK 0x00
  26. #define QIXIS_LBMAP_ALTBANK 0x00
  27. #define QIXIS_LBMAP_SD 0x00
  28. #define QIXIS_LBMAP_EMMC 0x00
  29. #define QIXIS_LBMAP_QSPI 0x00
  30. #define QIXIS_RCW_SRC_SD 0x8
  31. #define QIXIS_RCW_SRC_EMMC 0x9
  32. #define QIXIS_RCW_SRC_QSPI 0xf
  33. #define QIXIS_RST_CTL_RESET 0x31
  34. #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
  35. #define QIXIS_RCFG_CTL_RECONFIG_START 0x21
  36. #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
  37. #define QIXIS_RST_FORCE_MEM 0x01
  38. #define CONFIG_SYS_FPGA_CSPR_EXT (0x0)
  39. #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
  40. CSPR_PORT_SIZE_8 | \
  41. CSPR_MSEL_GPCM | \
  42. CSPR_V)
  43. #define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024)
  44. #define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \
  45. CSOR_NOR_NOR_MODE_AVD_NOR | \
  46. CSOR_NOR_TRHZ_80)
  47. #endif
  48. /* RTC */
  49. #define CONFIG_SYS_RTC_BUS_NUM 1
  50. #define I2C_MUX_CH_RTC 0xB
  51. /* Store environment at top of flash */
  52. #ifdef CONFIG_SPL_BUILD
  53. #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
  54. #else
  55. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  56. #endif
  57. /* SATA */
  58. #define CONFIG_SCSI_AHCI_PLAT
  59. #define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
  60. #ifndef CONFIG_CMD_EXT2
  61. #define CONFIG_CMD_EXT2
  62. #endif
  63. #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
  64. #define CONFIG_SYS_SCSI_MAX_LUN 1
  65. #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
  66. CONFIG_SYS_SCSI_MAX_LUN)
  67. /* DSPI */
  68. #ifdef CONFIG_FSL_DSPI
  69. #define CONFIG_SPI_FLASH_SST
  70. #define CONFIG_SPI_FLASH_EON
  71. #endif
  72. #ifndef SPL_NO_ENV
  73. #undef CONFIG_EXTRA_ENV_SETTINGS
  74. #define CONFIG_EXTRA_ENV_SETTINGS \
  75. "board=ls1028aqds\0" \
  76. "hwconfig=fsl_ddr:bank_intlv=auto\0" \
  77. "ramdisk_addr=0x800000\0" \
  78. "ramdisk_size=0x2000000\0" \
  79. "fdt_high=0xffffffffffffffff\0" \
  80. "initrd_high=0xffffffffffffffff\0" \
  81. "fdt_addr=0x00f00000\0" \
  82. "kernel_addr=0x01000000\0" \
  83. "scriptaddr=0x80000000\0" \
  84. "scripthdraddr=0x80080000\0" \
  85. "fdtheader_addr_r=0x80100000\0" \
  86. "kernelheader_addr_r=0x80200000\0" \
  87. "load_addr=0xa0000000\0" \
  88. "kernel_addr_r=0x81000000\0" \
  89. "fdt_addr_r=0x90000000\0" \
  90. "ramdisk_addr_r=0xa0000000\0" \
  91. "kernel_start=0x1000000\0" \
  92. "kernelheader_start=0x800000\0" \
  93. "kernel_load=0xa0000000\0" \
  94. "kernel_size=0x2800000\0" \
  95. "kernelheader_size=0x40000\0" \
  96. "kernel_addr_sd=0x8000\0" \
  97. "kernel_size_sd=0x14000\0" \
  98. "kernelhdr_addr_sd=0x4000\0" \
  99. "kernelhdr_size_sd=0x10\0" \
  100. "console=ttyS0,115200\0" \
  101. "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
  102. BOOTENV \
  103. "boot_scripts=ls1028aqds_boot.scr\0" \
  104. "boot_script_hdr=hdr_ls1028aqds_bs.out\0" \
  105. "scan_dev_for_boot_part=" \
  106. "part list ${devtype} ${devnum} devplist; " \
  107. "env exists devplist || setenv devplist 1; " \
  108. "for distro_bootpart in ${devplist}; do " \
  109. "if fstype ${devtype} " \
  110. "${devnum}:${distro_bootpart} " \
  111. "bootfstype; then " \
  112. "run scan_dev_for_boot; " \
  113. "fi; " \
  114. "done\0" \
  115. "scan_dev_for_boot=" \
  116. "echo Scanning ${devtype} " \
  117. "${devnum}:${distro_bootpart}...; " \
  118. "for prefix in ${boot_prefixes}; do " \
  119. "run scan_dev_for_scripts; " \
  120. "done;" \
  121. "\0" \
  122. "boot_a_script=" \
  123. "load ${devtype} ${devnum}:${distro_bootpart} " \
  124. "${scriptaddr} ${prefix}${script}; " \
  125. "env exists secureboot && load ${devtype} " \
  126. "${devnum}:${distro_bootpart} " \
  127. "${scripthdraddr} ${prefix}${boot_script_hdr} " \
  128. "&& esbc_validate ${scripthdraddr};" \
  129. "source ${scriptaddr}\0" \
  130. "sd_bootcmd=echo Trying load from SD ..;" \
  131. "mmcinfo; mmc read $load_addr " \
  132. "$kernel_addr_sd $kernel_size_sd && " \
  133. "env exists secureboot && mmc read $kernelheader_addr_r " \
  134. "$kernelhdr_addr_sd $kernelhdr_size_sd " \
  135. " && esbc_validate ${kernelheader_addr_r};" \
  136. "bootm $load_addr#$board\0" \
  137. "emmc_bootcmd=echo Trying load from EMMC ..;" \
  138. "mmcinfo; mmc dev 1; mmc read $load_addr " \
  139. "$kernel_addr_sd $kernel_size_sd && " \
  140. "env exists secureboot && mmc read $kernelheader_addr_r " \
  141. "$kernelhdr_addr_sd $kernelhdr_size_sd " \
  142. " && esbc_validate ${kernelheader_addr_r};" \
  143. "bootm $load_addr#$board\0"
  144. #endif
  145. #endif /* __LS1028A_QDS_H */