kzm9g.h 3.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
  4. * Copyright (C) 2012 Renesas Solutions Corp.
  5. */
  6. #ifndef __KZM9G_H
  7. #define __KZM9G_H
  8. #define CONFIG_SH73A0
  9. #define CONFIG_MACH_TYPE MACH_TYPE_KZM9G
  10. #include <asm/arch/rmobile.h>
  11. #define CONFIG_CMDLINE_TAG
  12. #define CONFIG_SETUP_MEMORY_TAGS
  13. #define CONFIG_INITRD_TAG
  14. /* MEMORY */
  15. #define KZM_SDRAM_BASE (0x40000000)
  16. #define PHYS_SDRAM KZM_SDRAM_BASE
  17. #define PHYS_SDRAM_SIZE (512 * 1024 * 1024)
  18. /* NOR Flash */
  19. #define KZM_FLASH_BASE (0x00000000)
  20. #define CONFIG_SYS_FLASH_BASE (KZM_FLASH_BASE)
  21. #define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
  22. #define CONFIG_SYS_MAX_FLASH_BANKS (1)
  23. #define CONFIG_SYS_MAX_FLASH_SECT (512)
  24. /* prompt */
  25. #define CONFIG_SYS_PBSIZE 256
  26. #define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
  27. /* SCIF */
  28. #define CONFIG_CONS_SCIF4
  29. #define CONFIG_SYS_MEMTEST_START (KZM_SDRAM_BASE)
  30. #define CONFIG_SYS_MEMTEST_END \
  31. (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
  32. #undef CONFIG_SYS_MEMTEST_SCRATCH
  33. #undef CONFIG_SYS_LOADS_BAUD_CHANGE
  34. #define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */
  35. #define CONFIG_SYS_INIT_RAM_SIZE (0x10000)
  36. #define LOW_LEVEL_MERAM_STACK (CONFIG_SYS_INIT_RAM_ADDR - 4)
  37. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
  38. CONFIG_SYS_INIT_RAM_SIZE - \
  39. GENERATED_GBL_DATA_SIZE)
  40. #define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024)
  41. #define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT)
  42. #define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT)
  43. #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
  44. #define CONFIG_SYS_MONITOR_BASE (KZM_FLASH_BASE)
  45. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
  46. #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
  47. #define CONFIG_STANDALONE_LOAD_ADDR 0x41000000
  48. /* FLASH */
  49. #undef CONFIG_SYS_FLASH_QUIET_TEST
  50. #define CONFIG_SYS_FLASH_EMPTY_INFO
  51. #define FLASH_SECTOR_SIZE (256 * 1024) /* 256 KB sectors */
  52. /* Timeout for Flash erase operations (in ms) */
  53. #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
  54. /* Timeout for Flash write operations (in ms) */
  55. #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
  56. /* Timeout for Flash set sector lock bit operations (in ms) */
  57. #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
  58. /* Timeout for Flash clear lock bit operations (in ms) */
  59. #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
  60. #undef CONFIG_SYS_DIRECT_FLASH_TFTP
  61. /* GPIO / PFC */
  62. #define CONFIG_SH_GPIO_PFC
  63. /* Clock */
  64. #define CONFIG_GLOBAL_TIMER
  65. #define CONFIG_SYS_CLK_FREQ (48000000)
  66. #define CONFIG_SYS_CPU_CLK (1196000000)
  67. #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
  68. #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
  69. #define CONFIG_NFS_TIMEOUT 10000UL
  70. /* I2C */
  71. #define CONFIG_SYS_I2C
  72. #define CONFIG_SYS_I2C_SH
  73. #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
  74. #define CONFIG_SYS_I2C_SH_BASE0 0xE6820000
  75. #define CONFIG_SYS_I2C_SH_SPEED0 100000
  76. #define CONFIG_SYS_I2C_SH_BASE1 0xE6822000
  77. #define CONFIG_SYS_I2C_SH_SPEED1 100000
  78. #define CONFIG_SYS_I2C_SH_BASE2 0xE6824000
  79. #define CONFIG_SYS_I2C_SH_SPEED2 100000
  80. #define CONFIG_SYS_I2C_SH_BASE3 0xE6826000
  81. #define CONFIG_SYS_I2C_SH_SPEED3 100000
  82. #define CONFIG_SYS_I2C_SH_BASE4 0xE6828000
  83. #define CONFIG_SYS_I2C_SH_SPEED4 100000
  84. #define CONFIG_SH_I2C_8BIT
  85. #define CONFIG_SH_I2C_DATA_HIGH 4
  86. #define CONFIG_SH_I2C_DATA_LOW 5
  87. #define CONFIG_SH_I2C_CLOCK 104000000 /* 104 MHz */
  88. #endif /* __KZM9G_H */