km_kirkwood.h 4.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2009
  4. * Marvell Semiconductor <www.marvell.com>
  5. * Prafulla Wadaskar <prafulla@marvell.com>
  6. *
  7. * (C) Copyright 2009
  8. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  9. *
  10. * (C) Copyright 2011-2012
  11. * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
  12. * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
  13. */
  14. /*
  15. * for linking errors see
  16. * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
  17. */
  18. #ifndef _CONFIG_KM_KIRKWOOD_H
  19. #define _CONFIG_KM_KIRKWOOD_H
  20. /* KM_KIRKWOOD */
  21. #if defined(CONFIG_KM_KIRKWOOD)
  22. #define CONFIG_HOSTNAME "km_kirkwood"
  23. #define CONFIG_KM_DISABLE_PCIE
  24. /* KM_KIRKWOOD_PCI */
  25. #elif defined(CONFIG_KM_KIRKWOOD_PCI)
  26. #define CONFIG_HOSTNAME "km_kirkwood_pci"
  27. #define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048"
  28. #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
  29. /* KM_KIRKWOOD_128M16 */
  30. #elif defined(CONFIG_KM_KIRKWOOD_128M16)
  31. #define CONFIG_HOSTNAME "km_kirkwood_128m16"
  32. #undef CONFIG_SYS_KWD_CONFIG
  33. #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
  34. #define CONFIG_KM_DISABLE_PCIE
  35. /* KM_NUSA / KM_SUGP1 */
  36. #elif defined(CONFIG_KM_NUSA) || defined(CONFIG_KM_SUGP1)
  37. # if defined(CONFIG_KM_NUSA)
  38. #define CONFIG_HOSTNAME "kmnusa"
  39. # elif defined(CONFIG_KM_SUGP1)
  40. #define CONFIG_HOSTNAME "kmsugp1"
  41. #define KM_PCIE_RESET_MPP7
  42. #endif
  43. #undef CONFIG_SYS_KWD_CONFIG
  44. #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
  45. /* KM_MGCOGE3UN */
  46. #elif defined(CONFIG_KM_MGCOGE3UN)
  47. #define CONFIG_HOSTNAME "mgcoge3un"
  48. #undef CONFIG_SYS_KWD_CONFIG
  49. #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
  50. #define CONFIG_KM_BOARD_EXTRA_ENV "waitforne=true\0"
  51. #define CONFIG_KM_DISABLE_PCIE
  52. /* KMCOGE5UN */
  53. #elif defined(CONFIG_KM_COGE5UN)
  54. #undef CONFIG_SYS_KWD_CONFIG
  55. #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
  56. #define CONFIG_HOSTNAME "kmcoge5un"
  57. #define CONFIG_KM_DISABLE_PCIE
  58. /* KM_SUV31 */
  59. #elif defined(CONFIG_KM_SUV31)
  60. #define CONFIG_HOSTNAME "kmsuv31"
  61. #undef CONFIG_SYS_KWD_CONFIG
  62. #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
  63. #define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048"
  64. #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
  65. #else
  66. #error ("Board unsupported")
  67. #endif
  68. /* include common defines/options for all arm based Keymile boards */
  69. #include "km/km_arm.h"
  70. #if defined(CONFIG_KM_PIGGY4_88E6352)
  71. /*
  72. * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via
  73. * an Marvell 88E6352 simple switch.
  74. * In this case we have to change the default settings for the etherent mac.
  75. * There is NO ethernet phy. The ARM and Switch are conencted directly over
  76. * RGMII in MAC-MAC mode
  77. * In this case 1GBit full duplex and autoneg off
  78. */
  79. #define PORT_SERIAL_CONTROL_VALUE ( \
  80. MVGBE_FORCE_LINK_PASS | \
  81. MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
  82. MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
  83. MVGBE_ADV_NO_FLOW_CTRL | \
  84. MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
  85. MVGBE_FORCE_BP_MODE_NO_JAM | \
  86. (1 << 9) /* Reserved bit has to be 1 */ | \
  87. MVGBE_DO_NOT_FORCE_LINK_FAIL | \
  88. MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
  89. MVGBE_DTE_ADV_0 | \
  90. MVGBE_MIIPHY_MAC_MODE | \
  91. MVGBE_AUTO_NEG_NO_CHANGE | \
  92. MVGBE_MAX_RX_PACKET_1552BYTE | \
  93. MVGBE_CLR_EXT_LOOPBACK | \
  94. MVGBE_SET_FULL_DUPLEX_MODE | \
  95. MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
  96. MVGBE_SET_GMII_SPEED_TO_1000 |\
  97. MVGBE_SET_MII_SPEED_TO_100)
  98. #endif
  99. #ifdef CONFIG_KM_PIGGY4_88E6061
  100. /*
  101. * Some keymile boards like mgcoge3un have their PIGGY4 connected via
  102. * an Marvell 88E6061 simple switch.
  103. * In this case we have to change the default settings for the
  104. * ethernet phy connected to the kirkwood.
  105. * In this case 100MB full duplex and autoneg off
  106. */
  107. #define PORT_SERIAL_CONTROL_VALUE ( \
  108. MVGBE_FORCE_LINK_PASS | \
  109. MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
  110. MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
  111. MVGBE_ADV_NO_FLOW_CTRL | \
  112. MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
  113. MVGBE_FORCE_BP_MODE_NO_JAM | \
  114. (1 << 9) /* Reserved bit has to be 1 */ | \
  115. MVGBE_DO_NOT_FORCE_LINK_FAIL | \
  116. MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
  117. MVGBE_DTE_ADV_0 | \
  118. MVGBE_MIIPHY_MAC_MODE | \
  119. MVGBE_AUTO_NEG_NO_CHANGE | \
  120. MVGBE_MAX_RX_PACKET_1552BYTE | \
  121. MVGBE_CLR_EXT_LOOPBACK | \
  122. MVGBE_SET_FULL_DUPLEX_MODE | \
  123. MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
  124. MVGBE_SET_GMII_SPEED_TO_10_100 |\
  125. MVGBE_SET_MII_SPEED_TO_100)
  126. #endif
  127. #ifdef CONFIG_KM_DISABLE_PCIE
  128. #undef CONFIG_KIRKWOOD_PCIE_INIT
  129. #endif
  130. #endif /* _CONFIG_KM_KIRKWOOD */