imx8mm_evk.h 4.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2019 NXP
  4. */
  5. #ifndef __IMX8MM_EVK_H
  6. #define __IMX8MM_EVK_H
  7. #include <linux/sizes.h>
  8. #include <asm/arch/imx-regs.h>
  9. #ifdef CONFIG_SECURE_BOOT
  10. #define CONFIG_CSF_SIZE SZ_8K
  11. #endif
  12. #define CONFIG_SPL_MAX_SIZE (148 * 1024)
  13. #define CONFIG_SYS_MONITOR_LEN SZ_512K
  14. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  15. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
  16. #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
  17. #define CONFIG_SYS_UBOOT_BASE \
  18. (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  19. #ifdef CONFIG_SPL_BUILD
  20. #define CONFIG_SPL_STACK 0x920000
  21. #define CONFIG_SPL_BSS_START_ADDR 0x910000
  22. #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
  23. #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
  24. #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
  25. /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  26. #define CONFIG_MALLOC_F_ADDR 0x930000
  27. /* For RAW image gives a error info not panic */
  28. #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  29. #endif
  30. /* Initial environment variables */
  31. #define CONFIG_EXTRA_ENV_SETTINGS \
  32. "script=boot.scr\0" \
  33. "image=Image.itb\0" \
  34. "console=ttymxc1,115200\0" \
  35. "fdt_addr=0x43000000\0" \
  36. "fdt_high=0xffffffffffffffff\0" \
  37. "boot_fit=try\0" \
  38. "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
  39. "initrd_addr=0x43800000\0" \
  40. "initrd_high=0xffffffffffffffff\0" \
  41. "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  42. "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  43. "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  44. "mmcautodetect=yes\0" \
  45. "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
  46. "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  47. "bootscript=echo Running bootscript from mmc ...; " \
  48. "source\0" \
  49. "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  50. "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  51. "mmcboot=echo Booting from mmc ...; " \
  52. "run mmcargs; " \
  53. "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
  54. "bootm ${loadaddr}; " \
  55. "else " \
  56. "if run loadfdt; then " \
  57. "booti ${loadaddr} - ${fdt_addr}; " \
  58. "else " \
  59. "echo WARN: Cannot load the DT; " \
  60. "fi; " \
  61. "fi;\0" \
  62. "netargs=setenv bootargs console=${console} " \
  63. "root=/dev/nfs " \
  64. "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  65. "netboot=echo Booting from net ...; " \
  66. "run netargs; " \
  67. "if test ${ip_dyn} = yes; then " \
  68. "setenv get_cmd dhcp; " \
  69. "else " \
  70. "setenv get_cmd tftp; " \
  71. "fi; " \
  72. "${get_cmd} ${loadaddr} ${image}; " \
  73. "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
  74. "bootm ${loadaddr}; " \
  75. "else " \
  76. "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  77. "booti ${loadaddr} - ${fdt_addr}; " \
  78. "else " \
  79. "echo WARN: Cannot load the DT; " \
  80. "fi; " \
  81. "fi;\0"
  82. #define CONFIG_BOOTCOMMAND \
  83. "mmc dev ${mmcdev}; if mmc rescan; then " \
  84. "if run loadbootscript; then " \
  85. "run bootscript; " \
  86. "else " \
  87. "if run loadimage; then " \
  88. "run mmcboot; " \
  89. "else run netboot; " \
  90. "fi; " \
  91. "fi; " \
  92. "fi;"
  93. /* Link Definitions */
  94. #define CONFIG_LOADADDR 0x40480000
  95. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  96. #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
  97. #define CONFIG_SYS_INIT_RAM_SIZE 0x200000
  98. #define CONFIG_SYS_INIT_SP_OFFSET \
  99. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  100. #define CONFIG_SYS_INIT_SP_ADDR \
  101. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  102. #define CONFIG_ENV_OVERWRITE
  103. #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */
  104. #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
  105. /* Size of malloc() pool */
  106. #define CONFIG_SYS_MALLOC_LEN SZ_32M
  107. #define CONFIG_SYS_SDRAM_BASE 0x40000000
  108. #define PHYS_SDRAM 0x40000000
  109. #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
  110. #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
  111. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
  112. #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
  113. /* Monitor Command Prompt */
  114. #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  115. #define CONFIG_SYS_CBSIZE 2048
  116. #define CONFIG_SYS_MAXARGS 64
  117. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  118. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  119. sizeof(CONFIG_SYS_PROMPT) + 16)
  120. /* USDHC */
  121. #define CONFIG_FSL_USDHC
  122. #define CONFIG_SYS_FSL_USDHC_NUM 2
  123. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  124. #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
  125. #define CONFIG_SYS_I2C_SPEED 100000
  126. #define CONFIG_ETHPRIME "FEC"
  127. #define CONFIG_FEC_XCV_TYPE RGMII
  128. #define CONFIG_FEC_MXC_PHYADDR 0
  129. #define FEC_QUIRK_ENET_MAC
  130. #define IMX_FEC_BASE 0x30BE0000
  131. #endif