imgtec_xilfpga.h 1.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2016, Imagination Technologies Ltd.
  4. *
  5. * Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
  6. *
  7. * Imagination Technologies Ltd. MIPSfpga
  8. */
  9. #ifndef __XILFPGA_CONFIG_H
  10. #define __XILFPGA_CONFIG_H
  11. /* BootROM + MIG is pretty smart. DDR and Cache initialized */
  12. #define CONFIG_SKIP_LOWLEVEL_INIT
  13. /*--------------------------------------------
  14. * CPU configuration
  15. */
  16. /* CPU Timer rate */
  17. #define CONFIG_SYS_MIPS_TIMER_FREQ 50000000
  18. /*----------------------------------------------------------------------
  19. * Memory Layout
  20. */
  21. /* SDRAM Configuration (for final code, data, stack, heap) */
  22. #define CONFIG_SYS_SDRAM_BASE 0x80000000
  23. #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 Mbytes */
  24. #define CONFIG_SYS_INIT_SP_ADDR \
  25. (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 0x1000)
  26. #define CONFIG_SYS_MALLOC_LEN (256 << 10)
  27. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  28. #define CONFIG_SYS_LOAD_ADDR 0x80500000 /* default load address */
  29. /*----------------------------------------------------------------------
  30. * Commands
  31. */
  32. /*------------------------------------------------------------
  33. * Console Configuration
  34. */
  35. #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
  36. /* -------------------------------------------------
  37. * Environment
  38. */
  39. /* ---------------------------------------------------------------------
  40. * Board boot configuration
  41. */
  42. #define CONFIG_TIMESTAMP /* Print image info with timestamp */
  43. #endif /* __XILFPGA_CONFIG_H */