controlcenterd.h 9.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363
  1. /*
  2. * (C) Copyright 2013
  3. * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc
  4. *
  5. * based on P1022DS.h
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. #ifndef __CONFIG_H
  26. #define __CONFIG_H
  27. #ifdef CONFIG_SDCARD
  28. #define CONFIG_RAMBOOT_SDCARD
  29. #endif
  30. #ifdef CONFIG_SPIFLASH
  31. #define CONFIG_RAMBOOT_SPIFLASH
  32. #endif
  33. /* High Level Configuration Options */
  34. #define CONFIG_CONTROLCENTERD
  35. #define CONFIG_ENABLE_36BIT_PHYS
  36. #ifdef CONFIG_PHYS_64BIT
  37. #define CONFIG_ADDR_MAP
  38. #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */
  39. #endif
  40. #define CONFIG_L2_CACHE
  41. #define CONFIG_BTB
  42. #define CONFIG_SYS_CLK_FREQ 66666600
  43. #define CONFIG_DDR_CLK_FREQ 66666600
  44. #define CONFIG_SYS_RAMBOOT
  45. #ifdef CONFIG_TRAILBLAZER
  46. #define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc
  47. #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
  48. /*
  49. * Config the L2 Cache
  50. */
  51. #define CONFIG_SYS_INIT_L2_ADDR 0xf8fc0000
  52. #ifdef CONFIG_PHYS_64BIT
  53. #define CONFIG_SYS_INIT_L2_ADDR_PHYS 0xff8fc0000ull
  54. #else
  55. #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR
  56. #endif
  57. #define CONFIG_SYS_L2_SIZE (256 << 10)
  58. #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
  59. #else /* CONFIG_TRAILBLAZER */
  60. #define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc
  61. #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
  62. #endif /* CONFIG_TRAILBLAZER */
  63. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  64. #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
  65. /*
  66. * Memory map
  67. *
  68. * 0x0000_0000 0x3fff_ffff DDR 1G Cacheable
  69. * 0xc000_0000 0xdfff_ffff PCI Express Mem 512M non-cacheable
  70. * 0xffc0_0000 0xffc2_ffff PCI IO range 192K non-cacheable
  71. *
  72. * Localbus non-cacheable
  73. * 0xe000_0000 0xe00f_ffff eLBC 1M non-cacheable
  74. * 0xf8fc0000 0xf8ff_ffff L2 SRAM 256k Cacheable
  75. * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0
  76. * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable
  77. */
  78. #define CONFIG_SYS_INIT_RAM_LOCK
  79. #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */
  80. #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* used area in RAM */
  81. #define CONFIG_SYS_GBL_DATA_OFFSET \
  82. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  83. #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
  84. #ifdef CONFIG_TRAILBLAZER
  85. /* leave CCSRBAR at default, because u-boot expects it to be exactly there */
  86. #define CONFIG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_DEFAULT
  87. #else
  88. #define CONFIG_SYS_CCSRBAR 0xffe00000
  89. #endif
  90. #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
  91. #define CONFIG_SYS_MPC85xx_GPIO3_ADDR (CONFIG_SYS_CCSRBAR+0xf200)
  92. /*
  93. * DDR Setup
  94. */
  95. #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
  96. #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
  97. #define CONFIG_SYS_SDRAM_SIZE 1024
  98. #define CONFIG_VERY_BIG_RAM
  99. #define CONFIG_DIMM_SLOTS_PER_CTLR 1
  100. #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
  101. #define CONFIG_SYS_MEMTEST_START 0x00000000
  102. #define CONFIG_SYS_MEMTEST_END 0x3fffffff
  103. #ifdef CONFIG_TRAILBLAZER
  104. #define CONFIG_SPD_EEPROM
  105. #define SPD_EEPROM_ADDRESS 0x52
  106. /*#define CONFIG_FSL_DDR_INTERACTIVE*/
  107. #endif
  108. /*
  109. * Local Bus Definitions
  110. */
  111. #define CONFIG_SYS_ELBC_BASE 0xe0000000
  112. #ifdef CONFIG_PHYS_64BIT
  113. #define CONFIG_SYS_ELBC_BASE_PHYS 0xfe0000000ull
  114. #else
  115. #define CONFIG_SYS_ELBC_BASE_PHYS CONFIG_SYS_ELBC_BASE
  116. #endif
  117. #define CONFIG_UART_BR_PRELIM \
  118. (BR_PHYS_ADDR((CONFIG_SYS_ELBC_BASE_PHYS)) | BR_PS_8 | BR_V)
  119. #define CONFIG_UART_OR_PRELIM (OR_AM_32KB | 0xff7)
  120. #define CONFIG_SYS_BR0_PRELIM 0 /* CS0 was originally intended for FPGA */
  121. #define CONFIG_SYS_OR0_PRELIM 0 /* debugging, was never used */
  122. #define CONFIG_SYS_BR1_PRELIM CONFIG_UART_BR_PRELIM
  123. #define CONFIG_SYS_OR1_PRELIM CONFIG_UART_OR_PRELIM
  124. /*
  125. * Serial Port
  126. */
  127. #define CONFIG_SYS_NS16550_SERIAL
  128. #define CONFIG_SYS_NS16550_REG_SIZE 1
  129. #define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
  130. #define CONFIG_SYS_BAUDRATE_TABLE \
  131. {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
  132. #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
  133. #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
  134. /*
  135. * I2C
  136. */
  137. #define CONFIG_SYS_I2C
  138. #define CONFIG_SYS_I2C_FSL
  139. #define CONFIG_SYS_FSL_I2C_SPEED 400000
  140. #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
  141. #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
  142. #define CONFIG_SYS_FSL_I2C2_SPEED 400000
  143. #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
  144. #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
  145. #define CONFIG_PCA9698 /* NXP PCA9698 */
  146. #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
  147. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
  148. /*
  149. * MMC
  150. */
  151. #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
  152. #ifndef CONFIG_TRAILBLAZER
  153. /*
  154. * Video
  155. */
  156. #define CONFIG_FSL_DIU_FB
  157. #define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x10000)
  158. /*
  159. * General PCI
  160. * Memory space is mapped 1-1, but I/O space must start from 0.
  161. */
  162. #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
  163. #define CONFIG_PCI_INDIRECT_BRIDGE
  164. #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
  165. #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
  166. #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
  167. #define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000
  168. #ifdef CONFIG_PHYS_64BIT
  169. #define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000
  170. #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc40000000ull
  171. #else
  172. #define CONFIG_SYS_PCIE1_MEM_BUS 0xc0000000
  173. #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc0000000
  174. #endif
  175. #define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */
  176. #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc20000
  177. #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
  178. #ifdef CONFIG_PHYS_64BIT
  179. #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc20000ull
  180. #else
  181. #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc20000
  182. #endif
  183. #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
  184. /*
  185. * SATA
  186. */
  187. #define CONFIG_LBA48
  188. #define CONFIG_SYS_SATA_MAX_DEVICE 2
  189. #define CONFIG_SATA1
  190. #define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR
  191. #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
  192. #define CONFIG_SATA2
  193. #define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR
  194. #define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
  195. /*
  196. * Ethernet
  197. */
  198. #define CONFIG_TSECV2
  199. #define CONFIG_TSEC1 1
  200. #define CONFIG_TSEC1_NAME "eTSEC1"
  201. #define CONFIG_TSEC2 1
  202. #define CONFIG_TSEC2_NAME "eTSEC2"
  203. #define TSEC1_PHY_ADDR 0
  204. #define TSEC2_PHY_ADDR 1
  205. #define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
  206. #define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
  207. #define TSEC1_PHYIDX 0
  208. #define TSEC2_PHYIDX 0
  209. #define CONFIG_ETHPRIME "eTSEC1"
  210. /*
  211. * USB
  212. */
  213. #define CONFIG_HAS_FSL_DR_USB
  214. #define CONFIG_USB_EHCI_FSL
  215. #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  216. #endif /* CONFIG_TRAILBLAZER */
  217. /*
  218. * Environment
  219. */
  220. #if defined(CONFIG_TRAILBLAZER)
  221. #elif defined(CONFIG_RAMBOOT_SDCARD)
  222. #define CONFIG_FSL_FIXED_MMC_LOCATION
  223. #define CONFIG_SYS_MMC_ENV_DEV 0
  224. #endif
  225. /*
  226. * Command line configuration.
  227. */
  228. #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
  229. #ifndef CONFIG_TRAILBLAZER
  230. /*
  231. * Board initialisation callbacks
  232. */
  233. #endif /* CONFIG_TRAILBLAZER */
  234. /*
  235. * Miscellaneous configurable options
  236. */
  237. #define CONFIG_HW_WATCHDOG
  238. #define CONFIG_LOADS_ECHO
  239. #define CONFIG_SYS_LOADS_BAUD_CHANGE
  240. /*
  241. * For booting Linux, the board info and command line data
  242. * have to be in the first 64 MB of memory, since this is
  243. * the maximum mapped by the Linux kernel during initialization.
  244. */
  245. #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Linux Memory map */
  246. #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
  247. /*
  248. * Environment Configuration
  249. */
  250. #ifdef CONFIG_TRAILBLAZER
  251. #define CONFIG_EXTRA_ENV_SETTINGS \
  252. "mp_holdoff=1\0"
  253. #else
  254. #define CONFIG_HOSTNAME "controlcenterd"
  255. #define CONFIG_ROOTPATH "/opt/nfsroot"
  256. #define CONFIG_BOOTFILE "uImage"
  257. #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP */
  258. #define CONFIG_LOADADDR 1000000
  259. #define CONFIG_EXTRA_ENV_SETTINGS \
  260. "netdev=eth0\0" \
  261. "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \
  262. "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \
  263. "tftpflash=tftpboot $loadaddr $uboot && " \
  264. "protect off $ubootaddr +$filesize && " \
  265. "erase $ubootaddr +$filesize && " \
  266. "cp.b $loadaddr $ubootaddr $filesize && " \
  267. "protect on $ubootaddr +$filesize && " \
  268. "cmp.b $loadaddr $ubootaddr $filesize\0" \
  269. "consoledev=ttyS1\0" \
  270. "ramdiskaddr=2000000\0" \
  271. "ramdiskfile=rootfs.ext2.gz.uboot\0" \
  272. "fdtaddr=1e00000\0" \
  273. "fdtfile=controlcenterd.dtb\0" \
  274. "bdev=sda3\0"
  275. /* these are used and NUL-terminated in env_default.h */
  276. #define CONFIG_NFSBOOTCOMMAND \
  277. "setenv bootargs root=/dev/nfs rw " \
  278. "nfsroot=$serverip:$rootpath " \
  279. "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
  280. "console=$consoledev,$baudrate $othbootargs $videobootargs;" \
  281. "tftp $loadaddr $bootfile;" \
  282. "tftp $fdtaddr $fdtfile;" \
  283. "bootm $loadaddr - $fdtaddr"
  284. #define CONFIG_RAMBOOTCOMMAND \
  285. "setenv bootargs root=/dev/ram rw " \
  286. "console=$consoledev,$baudrate $othbootargs $videobootargs;" \
  287. "tftp $ramdiskaddr $ramdiskfile;" \
  288. "tftp $loadaddr $bootfile;" \
  289. "tftp $fdtaddr $fdtfile;" \
  290. "bootm $loadaddr $ramdiskaddr $fdtaddr"
  291. #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
  292. #endif /* CONFIG_TRAILBLAZER */
  293. #endif