cm_t335.h 4.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Config file for Compulab CM-T335 board
  4. *
  5. * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/
  6. *
  7. * Author: Ilya Ledvich <ilya@compulab.co.il>
  8. */
  9. #ifndef __CONFIG_CM_T335_H
  10. #define __CONFIG_CM_T335_H
  11. #define CONFIG_CM_T335
  12. #include <configs/ti_am335x_common.h>
  13. #undef CONFIG_MAX_RAM_BANK_SIZE
  14. #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 512MB */
  15. #define CONFIG_MACH_TYPE MACH_TYPE_CM_T335
  16. /* Clock Defines */
  17. #define V_OSCK 25000000 /* Clock output from T2 */
  18. #define V_SCLK (V_OSCK)
  19. #ifndef CONFIG_SPL_BUILD
  20. #define MMCARGS \
  21. "mmcdev=0\0" \
  22. "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
  23. "mmcrootfstype=ext4\0" \
  24. "mmcargs=setenv bootargs console=${console} " \
  25. "root=${mmcroot} " \
  26. "rootfstype=${mmcrootfstype}\0" \
  27. "mmcboot=echo Booting from mmc ...; " \
  28. "run mmcargs; " \
  29. "bootm ${loadaddr}\0"
  30. #define NANDARGS \
  31. "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \
  32. "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
  33. "nandroot=ubi0:rootfs rw\0" \
  34. "nandrootfstype=ubifs\0" \
  35. "nandargs=setenv bootargs console=${console} " \
  36. "root=${nandroot} " \
  37. "rootfstype=${nandrootfstype} " \
  38. "ubi.mtd=${rootfs_name}\0" \
  39. "nandboot=echo Booting from nand ...; " \
  40. "run nandargs; " \
  41. "nboot ${loadaddr} nand0 900000; " \
  42. "bootm ${loadaddr}\0"
  43. #define CONFIG_EXTRA_ENV_SETTINGS \
  44. "loadaddr=82000000\0" \
  45. "console=ttyO0,115200n8\0" \
  46. "rootfs_name=rootfs\0" \
  47. "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
  48. "bootscript=echo Running bootscript from mmc ...; " \
  49. "source ${loadaddr}\0" \
  50. "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
  51. MMCARGS \
  52. NANDARGS
  53. #define CONFIG_BOOTCOMMAND \
  54. "mmc dev ${mmcdev}; if mmc rescan; then " \
  55. "if run loadbootscript; then " \
  56. "run bootscript; " \
  57. "else " \
  58. "if run loaduimage; then " \
  59. "run mmcboot; " \
  60. "else run nandboot; " \
  61. "fi; " \
  62. "fi; " \
  63. "else run nandboot; fi"
  64. #endif /* CONFIG_SPL_BUILD */
  65. #define CONFIG_TIMESTAMP
  66. #define CONFIG_SYS_AUTOLOAD "no"
  67. /* Serial console configuration */
  68. /* NS16550 Configuration */
  69. #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
  70. #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
  71. /* I2C Configuration */
  72. #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
  73. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
  74. #define CONFIG_SYS_I2C_EEPROM_BUS 0
  75. /* SPL */
  76. /* Network. */
  77. #define CONFIG_PHY_ATHEROS
  78. /* NAND support */
  79. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  80. #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
  81. CONFIG_SYS_NAND_PAGE_SIZE)
  82. #define CONFIG_SYS_NAND_PAGE_SIZE 2048
  83. #define CONFIG_SYS_NAND_OOBSIZE 64
  84. #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
  85. #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
  86. #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
  87. 10, 11, 12, 13, 14, 15, 16, 17, \
  88. 18, 19, 20, 21, 22, 23, 24, 25, \
  89. 26, 27, 28, 29, 30, 31, 32, 33, \
  90. 34, 35, 36, 37, 38, 39, 40, 41, \
  91. 42, 43, 44, 45, 46, 47, 48, 49, \
  92. 50, 51, 52, 53, 54, 55, 56, 57, }
  93. #define CONFIG_SYS_NAND_ECCSIZE 512
  94. #define CONFIG_SYS_NAND_ECCBYTES 14
  95. #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
  96. #undef CONFIG_SYS_NAND_U_BOOT_OFFS
  97. #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000
  98. #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
  99. #define CONFIG_SYS_NAND_ONFI_DETECTION
  100. #ifdef CONFIG_SPL_OS_BOOT
  101. #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000
  102. #endif
  103. /* GPIO pin + bank to pin ID mapping */
  104. #define GPIO_PIN(_bank, _pin) ((_bank << 5) + _pin)
  105. /* Status LED */
  106. /* Status LED polarity is inversed, so init it in the "off" state */
  107. /* EEPROM */
  108. #define CONFIG_ENV_EEPROM_IS_ON_I2C
  109. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
  110. #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
  111. #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
  112. #define CONFIG_SYS_EEPROM_SIZE 256
  113. #ifndef CONFIG_SPL_BUILD
  114. /*
  115. * Enable PCA9555 at I2C0-0x26.
  116. * First select the I2C0 bus with "i2c dev 0", then use "pca953x" command.
  117. */
  118. #define CONFIG_PCA953X
  119. #define CONFIG_SYS_I2C_PCA953X_ADDR 0x26
  120. #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x26, 16} }
  121. #endif /* CONFIG_SPL_BUILD */
  122. #endif /* __CONFIG_CM_T335_H */