cl-som-imx7.h 4.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2015 CompuLab, Ltd.
  4. *
  5. * Configuration settings for the CompuLab CL-SOM-iMX7 System-on-Module.
  6. */
  7. #ifndef __CL_SOM_IMX7_CONFIG_H
  8. #define __CL_SOM_IMX7_CONFIG_H
  9. #include "mx7_common.h"
  10. #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
  11. /* Size of malloc() pool */
  12. #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
  13. #define CONFIG_BOARD_LATE_INIT
  14. /* Network */
  15. #define CONFIG_FEC_MXC
  16. #define CONFIG_FEC_XCV_TYPE RGMII
  17. #define CONFIG_ETHPRIME "FEC"
  18. #define CONFIG_FEC_MXC_PHYADDR 0
  19. #define CONFIG_PHYLIB
  20. #define CONFIG_PHY_ATHEROS
  21. /* ENET1 */
  22. #define IMX_FEC_BASE ENET_IPS_BASE_ADDR
  23. /* PMIC */
  24. #define CONFIG_POWER
  25. #define CONFIG_POWER_I2C
  26. #define CONFIG_POWER_PFUZE3000
  27. #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
  28. /* I2C configs */
  29. #define CONFIG_SYS_I2C
  30. #define CONFIG_SYS_I2C_MXC
  31. #define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */
  32. #define CONFIG_SYS_I2C_SPEED 100000
  33. #define SYS_I2C_BUS_SOM 0
  34. #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
  35. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
  36. #define CONFIG_SYS_I2C_EEPROM_BUS SYS_I2C_BUS_SOM
  37. #define CONFIG_PCA953X
  38. #define CONFIG_CMD_PCA953X
  39. #define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
  40. #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
  41. #undef CONFIG_SYS_AUTOLOAD
  42. #undef CONFIG_EXTRA_ENV_SETTINGS
  43. #undef CONFIG_BOOTCOMMAND
  44. #define CONFIG_SYS_AUTOLOAD "no"
  45. #define CONFIG_EXTRA_ENV_SETTINGS \
  46. "autoload=off\0" \
  47. "script=boot.scr\0" \
  48. "loadscript=load ${storagetype} ${storagedev} ${loadaddr} ${script};\0" \
  49. "loadkernel=load ${storagetype} ${storagedev} ${loadaddr} ${kernel};\0" \
  50. "loadfdt=load ${storagetype} ${storagedev} ${fdtaddr} ${fdtfile};\0" \
  51. "bootscript=echo Running bootscript from ${storagetype} ...; source ${loadaddr};\0" \
  52. "storagebootcmd=echo Booting from ${storagetype} ...; run ${storagetype}args; run doboot;\0" \
  53. "kernel=zImage\0" \
  54. "console=ttymxc0\0" \
  55. "fdt_high=0xffffffff\0" \
  56. "initrd_high=0xffffffff\0" \
  57. "fdtfile=imx7d-sbc-imx7.dtb\0" \
  58. "fdtaddr=0x83000000\0" \
  59. "mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \
  60. "usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \
  61. "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  62. "usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \
  63. "doboot=bootz ${loadaddr} - ${fdtaddr}\0" \
  64. "mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \
  65. "mmcargs=setenv bootargs console=${console},${baudrate} " \
  66. "root=/dev/mmcblk${mmcblk}p2 rootwait rw\0" \
  67. "mmcbootscript=" \
  68. "if run mmc_config; then " \
  69. "setenv storagetype mmc;" \
  70. "setenv storagedev ${mmcdev}:${mmcpart};" \
  71. "if run loadscript; then " \
  72. "run bootscript; " \
  73. "fi; " \
  74. "fi;\0" \
  75. "mmcboot=" \
  76. "if run mmc_config; then " \
  77. "setenv storagetype mmc;" \
  78. "setenv storagedev ${mmcdev}:${mmcpart};" \
  79. "if run loadkernel; then " \
  80. "if run loadfdt; then " \
  81. "run storagebootcmd;" \
  82. "fi; " \
  83. "fi; " \
  84. "fi;\0" \
  85. "sdbootscript=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; " \
  86. "run mmcbootscript\0" \
  87. "usbbootscript=setenv usbdev ${usbdev_def}; " \
  88. "setenv storagetype usb;" \
  89. "setenv storagedev ${usbdev}:${usbpart};" \
  90. "if run loadscript; then " \
  91. "run bootscript; " \
  92. "fi; " \
  93. "sdboot=setenv mmcdev ${mmcdev_def}; setenv mmcblk 0; run mmcboot\0" \
  94. "emmcbootscript=setenv mmcdev 1; setenv mmcblk 2; run mmcbootscript\0" \
  95. "emmcboot=setenv mmcdev 1; setenv mmcblk 2; run mmcboot\0" \
  96. #define CONFIG_BOOTCOMMAND \
  97. "echo SD boot attempt ...; run sdbootscript; run sdboot; " \
  98. "echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \
  99. "echo USB boot attempt ...; run usbbootscript; "
  100. #define CONFIG_SYS_MEMTEST_START 0x80000000
  101. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
  102. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  103. #define CONFIG_SYS_HZ 1000
  104. /* Physical Memory Map */
  105. #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
  106. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
  107. #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
  108. #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
  109. #define CONFIG_SYS_INIT_SP_OFFSET \
  110. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  111. #define CONFIG_SYS_INIT_SP_ADDR \
  112. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  113. /* SPI Flash support */
  114. /* FLASH and environment organization */
  115. /* MMC Config*/
  116. #ifdef CONFIG_FSL_USDHC
  117. #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
  118. #define CONFIG_SYS_FSL_USDHC_NUM 2
  119. #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
  120. #endif
  121. /* USB Configs */
  122. #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  123. #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
  124. #define CONFIG_MXC_USB_FLAGS 0
  125. #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
  126. /* Uncomment to enable iMX thermal driver support */
  127. /*#define CONFIG_IMX_THERMAL*/
  128. /* SPL */
  129. #include "imx7_spl.h"
  130. #endif /* __CONFIG_H */