aristainetos-common.h 5.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2015
  4. * (C) Copyright 2014
  5. * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  6. *
  7. * Based on:
  8. * Copyright (C) 2012 Freescale Semiconductor, Inc.
  9. *
  10. * Configuration settings for the Freescale i.MX6Q SabreSD board.
  11. */
  12. #ifndef __ARISTAINETOS_COMMON_CONFIG_H
  13. #define __ARISTAINETOS_COMMON_CONFIG_H
  14. #include "mx6_common.h"
  15. #define CONFIG_MACH_TYPE 4501
  16. #define CONFIG_MMCROOT "/dev/mmcblk0p1"
  17. /* Size of malloc() pool */
  18. #define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M)
  19. #define CONFIG_MXC_UART
  20. /* MMC Configs */
  21. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  22. #define CONFIG_FEC_MXC
  23. #define IMX_FEC_BASE ENET_BASE_ADDR
  24. #define CONFIG_ETHPRIME "FEC"
  25. #define CONFIG_FEC_MXC_PHYADDR 0
  26. #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
  27. #define CONFIG_EXTRA_ENV_SETTINGS \
  28. "script=u-boot.scr\0" \
  29. "fit_file=/boot/system.itb\0" \
  30. "loadaddr=0x12000000\0" \
  31. "fit_addr_r=0x14000000\0" \
  32. "uboot=/boot/u-boot.imx\0" \
  33. "uboot_sz=d0000\0" \
  34. "rescue_sys_addr=f0000\0" \
  35. "rescue_sys_length=f10000\0" \
  36. "panel=lb07wv8\0" \
  37. "splashpos=m,m\0" \
  38. "console=" CONSOLE_DEV "\0" \
  39. "fdt_high=0xffffffff\0" \
  40. "initrd_high=0xffffffff\0" \
  41. "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
  42. "set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
  43. "default ${board_type}\0" \
  44. "get_env=mw ${loadaddr} 0 0x20000;" \
  45. "mmc rescan;" \
  46. "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
  47. "env import -t ${loadaddr}\0" \
  48. "default_env=mw ${loadaddr} 0 0x20000;" \
  49. "env export -t ${loadaddr} serial# ethaddr eth1addr " \
  50. "board_type panel;" \
  51. "env default -a;" \
  52. "env import -t ${loadaddr}\0" \
  53. "loadbootscript=" \
  54. "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  55. "bootscript=echo Running bootscript from mmc ...; " \
  56. "source\0" \
  57. "mmcpart=1\0" \
  58. "mmcdev=0\0" \
  59. "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  60. "mmcargs=setenv bootargs console=${console},${baudrate} " \
  61. "root=${mmcroot}\0" \
  62. "mmcboot=echo Booting from mmc ...; " \
  63. "run mmcargs addmtd addmisc set_fit_default;" \
  64. "bootm ${fit_addr_r}\0" \
  65. "mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
  66. "${fit_file}\0" \
  67. "mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
  68. "${uboot}\0" \
  69. "mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
  70. "setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
  71. "setexpr uboot_maxsize ${uboot_sz} - 400;" \
  72. "mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
  73. "run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
  74. "sf write ${loadaddr} 400 ${filesize};" \
  75. "sf read ${cmp_buf} 400 ${uboot_sz};" \
  76. "cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
  77. "ubiboot=echo Booting from ubi ...; " \
  78. "run ubiargs addmtd addmisc set_fit_default;" \
  79. "bootm ${fit_addr_r}\0" \
  80. "rescueargs=setenv bootargs console=${console},${baudrate} " \
  81. "root=/dev/ram rw\0 " \
  82. "rescueboot=echo Booting rescue system from NOR ...; " \
  83. "run rescueargs addmtd addmisc set_fit_default;" \
  84. "bootm ${fit_addr_r}\0" \
  85. "rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
  86. "${rescue_sys_length}; imi ${fit_addr_r}\0" \
  87. CONFIG_EXTRA_ENV_BOARD_SETTINGS
  88. #define CONFIG_BOOTCOMMAND \
  89. "mmc dev ${mmcdev};" \
  90. "if mmc rescan; then " \
  91. "if run loadbootscript; then " \
  92. "run bootscript; " \
  93. "else " \
  94. "if run mmc_load_fit; then " \
  95. "run mmcboot; " \
  96. "else " \
  97. "if run ubifs_load_fit; then " \
  98. "run ubiboot; " \
  99. "else " \
  100. "if run rescue_load_fit; then " \
  101. "run rescueboot; " \
  102. "else " \
  103. "echo RESCUE SYSTEM BOOT " \
  104. "FAILURE;" \
  105. "fi; " \
  106. "fi; " \
  107. "fi; " \
  108. "fi; " \
  109. "else " \
  110. "if run ubifs_load_fit; then " \
  111. "run ubiboot; " \
  112. "else " \
  113. "if run rescue_load_fit; then " \
  114. "run rescueboot; " \
  115. "else " \
  116. "echo RESCUE SYSTEM BOOT FAILURE;" \
  117. "fi; " \
  118. "fi; " \
  119. "fi"
  120. #define CONFIG_ARP_TIMEOUT 200UL
  121. #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
  122. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
  123. #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
  124. /* Physical Memory Map */
  125. #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
  126. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
  127. #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
  128. #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
  129. #define CONFIG_SYS_INIT_SP_OFFSET \
  130. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  131. #define CONFIG_SYS_INIT_SP_ADDR \
  132. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  133. /* Environment organization */
  134. #define CONFIG_SYS_FSL_USDHC_NUM 2
  135. /* I2C */
  136. #define CONFIG_SYS_I2C
  137. #define CONFIG_SYS_I2C_MXC
  138. #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
  139. #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
  140. #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
  141. #define CONFIG_SYS_I2C_SPEED 100000
  142. #define CONFIG_SYS_I2C_SLAVE 0x7f
  143. #define CONFIG_SYS_I2C_NOPROBES { {0, 0x00} }
  144. /* NAND stuff */
  145. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  146. #define CONFIG_SYS_NAND_BASE 0x40000000
  147. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  148. #define CONFIG_SYS_NAND_ONFI_DETECTION
  149. /* DMA stuff, needed for GPMI/MXS NAND support */
  150. /* RTC */
  151. #define CONFIG_SYS_I2C_RTC_ADDR 0x68
  152. #define CONFIG_SYS_RTC_BUS_NUM 2
  153. #define CONFIG_RTC_M41T11
  154. /* USB Configs */
  155. #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
  156. #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
  157. #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
  158. #define CONFIG_MXC_USB_FLAGS 0
  159. /* UBI support */
  160. /* Framebuffer */
  161. /* check this console not needed, after test remove it */
  162. #define CONFIG_VIDEO_BMP_RLE8
  163. #define CONFIG_SPLASH_SCREEN
  164. #define CONFIG_SPLASH_SCREEN_ALIGN
  165. #define CONFIG_BMP_16BPP
  166. #define CONFIG_VIDEO_LOGO
  167. #define CONFIG_VIDEO_BMP_LOGO
  168. #define CONFIG_IMX_VIDEO_SKIP
  169. #define CONFIG_IMX6_PWM_PER_CLK 66000000
  170. #endif /* __ARISTAINETOS_COMMON_CONFIG_H */