am3517_crane.h 7.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * am3517_crane.h - Default configuration for AM3517 CraneBoard.
  4. *
  5. * Author: Srinath.R <srinath@mistralsolutions.com>
  6. *
  7. * Based on include/configs/am3517evm.h
  8. *
  9. * Copyright (C) 2011 Mistral Solutions pvt Ltd
  10. */
  11. #ifndef __CONFIG_H
  12. #define __CONFIG_H
  13. /*
  14. * High Level Configuration Options
  15. */
  16. #include <asm/arch/cpu.h> /* get chip and board defs */
  17. #include <asm/arch/omap.h>
  18. /* Clock Defines */
  19. #define V_OSCK 26000000 /* Clock output from T2 */
  20. #define V_SCLK (V_OSCK >> 1)
  21. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  22. #define CONFIG_SETUP_MEMORY_TAGS 1
  23. #define CONFIG_INITRD_TAG 1
  24. #define CONFIG_REVISION_TAG 1
  25. /*
  26. * Size of malloc() pool
  27. */
  28. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
  29. /* initial data */
  30. /*
  31. * DDR related
  32. */
  33. #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
  34. /*
  35. * Hardware drivers
  36. */
  37. /*
  38. * NS16550 Configuration
  39. */
  40. #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
  41. #define CONFIG_SYS_NS16550_SERIAL
  42. #define CONFIG_SYS_NS16550_REG_SIZE (-4)
  43. #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
  44. /*
  45. * select serial console configuration
  46. */
  47. #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
  48. /* allow to overwrite serial and ethaddr */
  49. #define CONFIG_ENV_OVERWRITE
  50. #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
  51. 115200}
  52. /*
  53. * USB configuration
  54. * Enable CONFIG_USB_MUSB_HCD for Host functionalities MSC, keyboard
  55. * Enable CONFIG_USB_MUSB_UDC for Device functionalities.
  56. */
  57. #ifdef CONFIG_USB_AM35X
  58. #ifdef CONFIG_USB_MUSB_UDC
  59. /* USB device configuration */
  60. #define CONFIG_USB_DEVICE 1
  61. #define CONFIG_USB_TTY 1
  62. /* Change these to suit your needs */
  63. #define CONFIG_USBD_VENDORID 0x0451
  64. #define CONFIG_USBD_PRODUCTID 0x5678
  65. #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
  66. #define CONFIG_USBD_PRODUCT_NAME "AM3517CRANE"
  67. #endif /* CONFIG_USB_MUSB_UDC */
  68. #endif /* CONFIG_USB_AM35X */
  69. #define CONFIG_SYS_I2C
  70. /*
  71. * Board NAND Info.
  72. */
  73. #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
  74. /* to access */
  75. /* nand at CS0 */
  76. #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
  77. /* NAND devices */
  78. #define CONFIG_JFFS2_NAND
  79. /* nand device jffs2 lives on */
  80. #define CONFIG_JFFS2_DEV "nand0"
  81. /* start of jffs2 partition */
  82. #define CONFIG_JFFS2_PART_OFFSET 0x680000
  83. #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
  84. /* Environment information */
  85. #define CONFIG_BOOTFILE "uImage"
  86. #define CONFIG_EXTRA_ENV_SETTINGS \
  87. "loadaddr=0x82000000\0" \
  88. "console=ttyS2,115200n8\0" \
  89. "mmcdev=0\0" \
  90. "mmcargs=setenv bootargs console=${console} " \
  91. "root=/dev/mmcblk0p2 rw " \
  92. "rootfstype=ext3 rootwait\0" \
  93. "nandargs=setenv bootargs console=${console} " \
  94. "root=/dev/mtdblock4 rw " \
  95. "rootfstype=jffs2\0" \
  96. "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
  97. "bootscript=echo Running bootscript from mmc ...; " \
  98. "source ${loadaddr}\0" \
  99. "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
  100. "mmcboot=echo Booting from mmc ...; " \
  101. "run mmcargs; " \
  102. "bootm ${loadaddr}\0" \
  103. "nandboot=echo Booting from nand ...; " \
  104. "run nandargs; " \
  105. "nand read ${loadaddr} 280000 400000; " \
  106. "bootm ${loadaddr}\0" \
  107. #define CONFIG_BOOTCOMMAND \
  108. "mmc dev ${mmcdev}; if mmc rescan; then " \
  109. "if run loadbootscript; then " \
  110. "run bootscript; " \
  111. "else " \
  112. "if run loaduimage; then " \
  113. "run mmcboot; " \
  114. "else run nandboot; " \
  115. "fi; " \
  116. "fi; " \
  117. "else run nandboot; fi"
  118. /*
  119. * Miscellaneous configurable options
  120. */
  121. #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
  122. #define CONFIG_SYS_MAXARGS 32 /* max number of command */
  123. /* args */
  124. /* memtest works on */
  125. #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
  126. #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
  127. 0x01F00000) /* 31MB */
  128. #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
  129. /* address */
  130. /*
  131. * AM3517 has 12 GP timers, they can be driven by the system clock
  132. * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  133. * This rate is divided by a local divisor.
  134. */
  135. #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
  136. #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
  137. /*-----------------------------------------------------------------------
  138. * Physical Memory Map
  139. */
  140. #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
  141. #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
  142. /*-----------------------------------------------------------------------
  143. * FLASH and environment organization
  144. */
  145. /* **** PISMO SUPPORT *** */
  146. #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */
  147. /* on one chip */
  148. #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
  149. #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
  150. #define CONFIG_SYS_FLASH_BASE NAND_BASE
  151. /* Monitor at start of flash */
  152. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
  153. #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB sector */
  154. /*-----------------------------------------------------------------------
  155. * CFI FLASH driver setup
  156. */
  157. /* timeout values are in ticks */
  158. #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
  159. #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
  160. /* Flash banks JFFS2 should use */
  161. #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
  162. CONFIG_SYS_MAX_NAND_DEVICE)
  163. #define CONFIG_SYS_JFFS2_MEM_NAND
  164. /* use flash_info[2] */
  165. #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
  166. #define CONFIG_SYS_JFFS2_NUM_BANKS 1
  167. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  168. #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
  169. #define CONFIG_SYS_INIT_RAM_SIZE 0x800
  170. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
  171. CONFIG_SYS_INIT_RAM_SIZE - \
  172. GENERATED_GBL_DATA_SIZE)
  173. /* Defines for SPL */
  174. #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
  175. CONFIG_SPL_TEXT_BASE)
  176. #define CONFIG_SPL_BSS_START_ADDR 0x80000000
  177. #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
  178. #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
  179. #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
  180. #define CONFIG_SPL_NAND_BASE
  181. #define CONFIG_SPL_NAND_DRIVERS
  182. #define CONFIG_SPL_NAND_ECC
  183. /* NAND boot config */
  184. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  185. #define CONFIG_SYS_NAND_PAGE_COUNT 64
  186. #define CONFIG_SYS_NAND_PAGE_SIZE 2048
  187. #define CONFIG_SYS_NAND_OOBSIZE 64
  188. #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
  189. #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
  190. #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
  191. 10, 11, 12, 13}
  192. #define CONFIG_SYS_NAND_ECCSIZE 512
  193. #define CONFIG_SYS_NAND_ECCBYTES 3
  194. #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
  195. #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
  196. #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
  197. /*
  198. * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
  199. * 64 bytes before this address should be set aside for u-boot.img's
  200. * header. That is 0x800FFFC0--0x80100000 should not be used for any
  201. * other needs.
  202. */
  203. #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
  204. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
  205. #endif /* __CONFIG_H */