atmel_lcd.h 1.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * atmel_lcd.h - Atmel LCD Controller structures
  4. *
  5. * (C) Copyright 2001
  6. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  7. */
  8. #ifndef _ATMEL_LCD_H_
  9. #define _ATMEL_LCD_H_
  10. /**
  11. * struct atmel_lcd_platdata - platform data for Atmel LCDs with driver model
  12. *
  13. * @timing_index: Index of LCD timing to use in device tree node
  14. */
  15. struct atmel_lcd_platdata {
  16. int timing_index;
  17. };
  18. typedef struct vidinfo {
  19. ushort vl_col; /* Number of columns (i.e. 640) */
  20. ushort vl_row; /* Number of rows (i.e. 480) */
  21. ushort vl_rot; /* Rotation of Display (0, 1, 2, 3) */
  22. u_long vl_clk; /* pixel clock in ps */
  23. /* LCD configuration register */
  24. u_long vl_sync; /* Horizontal / vertical sync */
  25. u_long vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
  26. u_long vl_tft; /* 0 = passive, 1 = TFT */
  27. u_long vl_cont_pol_low; /* contrast polarity is low */
  28. u_long vl_clk_pol; /* clock polarity */
  29. /* Horizontal control register. */
  30. u_long vl_hsync_len; /* Length of horizontal sync */
  31. u_long vl_left_margin; /* Time from sync to picture */
  32. u_long vl_right_margin; /* Time from picture to sync */
  33. /* Vertical control register. */
  34. u_long vl_vsync_len; /* Length of vertical sync */
  35. u_long vl_upper_margin; /* Time from sync to picture */
  36. u_long vl_lower_margin; /* Time from picture to sync */
  37. u_long mmio; /* Memory mapped registers */
  38. u_int logo_width;
  39. u_int logo_height;
  40. int logo_x_offset;
  41. int logo_y_offset;
  42. u_long logo_addr;
  43. } vidinfo_t;
  44. void atmel_logo_info(vidinfo_t *info);
  45. void microchip_logo_info(vidinfo_t *info);
  46. #endif