armcoremodule.h 2.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2005
  4. * ARM Ltd.
  5. * Peter Pearse, <Peter.Pearse@arm.com>
  6. * Configuration for ARM Core Modules.
  7. * No standalonw port yet available
  8. * - this file is included by both integratorap.h & integratorcp.h
  9. */
  10. #ifndef __ARMCOREMODULE_H
  11. #define __ARMCOREMODULE_H
  12. #define CM_BASE 0x10000000
  13. /* CM registers common to all CMs */
  14. /* Note that observed values after reboot into the ARM Boot Monitor
  15. have been used as defaults, rather than the POR values */
  16. #define OS_CTRL 0x0000000C
  17. #define CMMASK_REMAP 0x00000005 /* set remap & led */
  18. #define CMMASK_RESET 0x00000008
  19. #define OS_LOCK 0x00000014
  20. #define CMVAL_LOCK1 0x0000A000 /* locking value */
  21. #define CMVAL_LOCK2 0x0000005F /* locking value */
  22. #define CMVAL_UNLOCK 0x00000000 /* any value != CM_LOCKVAL */
  23. #define OS_SDRAM 0x00000020
  24. #define OS_INIT 0x00000024
  25. #define CMMASK_MAP_SIMPLE 0xFFFDFFFF /* simple mapping */
  26. #define CMMASK_TCRAM_DISABLE 0xFFFEFFFF /* TCRAM disabled */
  27. #define CMMASK_LOWVEC 0x00000000 /* vectors @ 0x00000000 */
  28. #define CMMASK_LE 0xFFFFFFF7 /* little endian */
  29. #define CMMASK_CMxx6_COMMON 0x00000013 /* Common value for CMxx6 */
  30. /* - observed reset value of */
  31. /* CM926EJ-S */
  32. /* CM1136-EJ-S */
  33. #if defined (CONFIG_CM10200E) || defined (CONFIG_CM10220E)
  34. #define CMMASK_INIT_102 0x00000300 /* see CM102xx ref manual */
  35. /* - PLL test clock bypassed */
  36. /* - bus clock ratio 2 */
  37. /* - little endian */
  38. /* - vectors at zero */
  39. #endif /* CM1022xx */
  40. /* Determine CM characteristics */
  41. #undef CONFIG_CM_MULTIPLE_SSRAM
  42. #undef CONFIG_CM_SPD_DETECT
  43. #undef CONFIG_CM_REMAP
  44. #undef CONFIG_CM_INIT
  45. #undef CONFIG_CM_TCRAM
  46. #if defined (CONFIG_CM946E_S) || defined (CONFIG_CM966E_S)
  47. #define CONFIG_CM_MULTIPLE_SSRAM /* CM has multiple SSRAM mapping */
  48. #endif
  49. /* Excalibur core module has reduced functionality */
  50. #ifndef CONFIG_CM922T_XA10
  51. #define CONFIG_CM_SPD_DETECT /* CM supports SPD query */
  52. #define OS_SPD 0x00000100 /* Address of SPD data */
  53. #define CONFIG_CM_REMAP /* CM supports remapping */
  54. #define CONFIG_CM_INIT /* CM has initialization reg */
  55. #endif /* NOT EXCALIBUR */
  56. #if defined(CONFIG_CM926EJ_S) || defined (CONFIG_CM946E_S) || \
  57. defined(CONFIG_CM966E_S) || defined (CONFIG_CM1026EJ_S) || \
  58. defined(CONFIG_CM1136JF_S)
  59. #define CONFIG_CM_TCRAM /* CM has TCRAM */
  60. #endif
  61. #ifdef CONFIG_CM_SPD_DETECT
  62. #define OS_SPD 0x00000100 /* The SDRAM SPD data is copied here */
  63. #endif
  64. #endif /* __ARMCOREMODULE_H */