MCD_dma.h 11 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
  4. */
  5. #ifndef _MCD_API_H
  6. #define _MCD_API_H
  7. /* Turn Execution Unit tasks ON (#define) or OFF (#undef) */
  8. #undef MCD_INCLUDE_EU
  9. /* Number of DMA channels */
  10. #define NCHANNELS 16
  11. /* Total number of variants */
  12. #ifdef MCD_INCLUDE_EU
  13. #define NUMOFVARIANTS 6
  14. #else
  15. #define NUMOFVARIANTS 4
  16. #endif
  17. /* Define sizes of the various tables */
  18. #define TASK_TABLE_SIZE (NCHANNELS*32)
  19. #define VAR_TAB_SIZE (128)
  20. #define CONTEXT_SAVE_SIZE (128)
  21. #define FUNCDESC_TAB_SIZE (256)
  22. #ifdef MCD_INCLUDE_EU
  23. #define FUNCDESC_TAB_NUM 16
  24. #else
  25. #define FUNCDESC_TAB_NUM 1
  26. #endif
  27. #ifndef DEFINESONLY
  28. /* Portability typedefs */
  29. #if 1
  30. #include "common.h"
  31. #else
  32. #ifndef s32
  33. typedef int s32;
  34. #endif
  35. #ifndef u32
  36. typedef unsigned int u32;
  37. #endif
  38. #ifndef s16
  39. typedef short s16;
  40. #endif
  41. #ifndef u16
  42. typedef unsigned short u16;
  43. #endif
  44. #ifndef s8
  45. typedef char s8;
  46. #endif
  47. #ifndef u8
  48. typedef unsigned char u8;
  49. #endif
  50. #endif
  51. /*
  52. * These structures represent the internal registers of the
  53. * multi-channel DMA
  54. */
  55. struct dmaRegs_s {
  56. u32 taskbar; /* task table base address */
  57. u32 currPtr;
  58. u32 endPtr;
  59. u32 varTablePtr;
  60. u16 dma_rsvd0;
  61. u16 ptdControl; /* ptd control */
  62. u32 intPending; /* interrupt pending */
  63. u32 intMask; /* interrupt mask */
  64. u16 taskControl[16]; /* task control */
  65. u8 priority[32]; /* priority */
  66. u32 initiatorMux; /* initiator mux control */
  67. u32 taskSize0; /* task size control 0. */
  68. u32 taskSize1; /* task size control 1. */
  69. u32 dma_rsvd1; /* reserved */
  70. u32 dma_rsvd2; /* reserved */
  71. u32 debugComp1; /* debug comparator 1 */
  72. u32 debugComp2; /* debug comparator 2 */
  73. u32 debugControl; /* debug control */
  74. u32 debugStatus; /* debug status */
  75. u32 ptdDebug; /* priority task decode debug */
  76. u32 dma_rsvd3[31]; /* reserved */
  77. };
  78. typedef volatile struct dmaRegs_s dmaRegs;
  79. #endif
  80. /* PTD contrl reg bits */
  81. #define PTD_CTL_TSK_PRI 0x8000
  82. #define PTD_CTL_COMM_PREFETCH 0x0001
  83. /* Task Control reg bits and field masks */
  84. #define TASK_CTL_EN 0x8000
  85. #define TASK_CTL_VALID 0x4000
  86. #define TASK_CTL_ALWAYS 0x2000
  87. #define TASK_CTL_INIT_MASK 0x1f00
  88. #define TASK_CTL_ASTRT 0x0080
  89. #define TASK_CTL_HIPRITSKEN 0x0040
  90. #define TASK_CTL_HLDINITNUM 0x0020
  91. #define TASK_CTL_ASTSKNUM_MASK 0x000f
  92. /* Priority reg bits and field masks */
  93. #define PRIORITY_HLD 0x80
  94. #define PRIORITY_PRI_MASK 0x07
  95. /* Debug Control reg bits and field masks */
  96. #define DBG_CTL_BLOCK_TASKS_MASK 0xffff0000
  97. #define DBG_CTL_AUTO_ARM 0x00008000
  98. #define DBG_CTL_BREAK 0x00004000
  99. #define DBG_CTL_COMP1_TYP_MASK 0x00003800
  100. #define DBG_CTL_COMP2_TYP_MASK 0x00000070
  101. #define DBG_CTL_EXT_BREAK 0x00000004
  102. #define DBG_CTL_INT_BREAK 0x00000002
  103. /*
  104. * PTD Debug reg selector addresses
  105. * This reg must be written with a value to show the contents of
  106. * one of the desired internal register.
  107. */
  108. #define PTD_DBG_REQ 0x00 /* shows the state of 31 initiators */
  109. #define PTD_DBG_TSK_VLD_INIT 0x01 /* shows which 16 tasks are valid and
  110. have initiators asserted */
  111. /* General return values */
  112. #define MCD_OK 0
  113. #define MCD_ERROR -1
  114. #define MCD_TABLE_UNALIGNED -2
  115. #define MCD_CHANNEL_INVALID -3
  116. /* MCD_initDma input flags */
  117. #define MCD_RELOC_TASKS 0x00000001
  118. #define MCD_NO_RELOC_TASKS 0x00000000
  119. #define MCD_COMM_PREFETCH_EN 0x00000002 /* MCF547x/548x ONLY */
  120. /*
  121. * MCD_dmaStatus Status Values for each channel:
  122. * MCD_NO_DMA - No DMA has been requested since reset
  123. * MCD_IDLE - DMA active, but the initiator is currently inactive
  124. * MCD_RUNNING - DMA active, and the initiator is currently active
  125. * MCD_PAUSED - DMA active but it is currently paused
  126. * MCD_HALTED - the most recent DMA has been killed with MCD_killTask()
  127. * MCD_DONE - the most recent DMA has completed
  128. */
  129. #define MCD_NO_DMA 1
  130. #define MCD_IDLE 2
  131. #define MCD_RUNNING 3
  132. #define MCD_PAUSED 4
  133. #define MCD_HALTED 5
  134. #define MCD_DONE 6
  135. /* MCD_startDma parameter defines */
  136. /* Constants for the funcDesc parameter */
  137. /*
  138. * MCD_NO_BYTE_SWAP - to disable byte swapping
  139. * MCD_BYTE_REVERSE - to reverse the bytes of each u32 of the DMAed data
  140. * MCD_U16_REVERSE - to reverse the 16-bit halves of each 32-bit data
  141. * value being DMAed
  142. * MCD_U16_BYTE_REVERSE - to reverse the byte halves of each 16-bit half of
  143. * each 32-bit data value DMAed
  144. * MCD_NO_BIT_REV - do not reverse the bits of each byte DMAed
  145. * MCD_BIT_REV - reverse the bits of each byte DMAed
  146. * MCD_CRC16 - to perform CRC-16 on DMAed data
  147. * MCD_CRCCCITT - to perform CRC-CCITT on DMAed data
  148. * MCD_CRC32 - to perform CRC-32 on DMAed data
  149. * MCD_CSUMINET - to perform internet checksums on DMAed data
  150. * MCD_NO_CSUM - to perform no checksumming
  151. */
  152. #define MCD_NO_BYTE_SWAP 0x00045670
  153. #define MCD_BYTE_REVERSE 0x00076540
  154. #define MCD_U16_REVERSE 0x00067450
  155. #define MCD_U16_BYTE_REVERSE 0x00054760
  156. #define MCD_NO_BIT_REV 0x00000000
  157. #define MCD_BIT_REV 0x00088880
  158. /* CRCing: */
  159. #define MCD_CRC16 0xc0100000
  160. #define MCD_CRCCCITT 0xc0200000
  161. #define MCD_CRC32 0xc0300000
  162. #define MCD_CSUMINET 0xc0400000
  163. #define MCD_NO_CSUM 0xa0000000
  164. #define MCD_FUNC_NOEU1 (MCD_NO_BYTE_SWAP | MCD_NO_BIT_REV | \
  165. MCD_NO_CSUM)
  166. #define MCD_FUNC_NOEU2 (MCD_NO_BYTE_SWAP | MCD_NO_CSUM)
  167. /* Constants for the flags parameter */
  168. #define MCD_TT_FLAGS_RL 0x00000001 /* Read line */
  169. #define MCD_TT_FLAGS_CW 0x00000002 /* Combine Writes */
  170. #define MCD_TT_FLAGS_SP 0x00000004 /* MCF547x/548x ONLY */
  171. #define MCD_TT_FLAGS_MASK 0x000000ff
  172. #define MCD_TT_FLAGS_DEF (MCD_TT_FLAGS_RL | MCD_TT_FLAGS_CW)
  173. #define MCD_SINGLE_DMA 0x00000100 /* Unchained DMA */
  174. #define MCD_CHAIN_DMA /* TBD */
  175. #define MCD_EU_DMA /* TBD */
  176. #define MCD_FECTX_DMA 0x00001000 /* FEC TX ring DMA */
  177. #define MCD_FECRX_DMA 0x00002000 /* FEC RX ring DMA */
  178. /* these flags are valid for MCD_startDma and the chained buffer descriptors */
  179. /*
  180. * MCD_BUF_READY - indicates that this buf is now under the DMA's ctrl
  181. * MCD_WRAP - to tell the FEC Dmas to wrap to the first BD
  182. * MCD_INTERRUPT - to generate an interrupt after completion of the DMA
  183. * MCD_END_FRAME - tell the DMA to end the frame when transferring
  184. * last byte of data in buffer
  185. * MCD_CRC_RESTART - to empty out the accumulated checksum prior to
  186. * performing the DMA
  187. */
  188. #define MCD_BUF_READY 0x80000000
  189. #define MCD_WRAP 0x20000000
  190. #define MCD_INTERRUPT 0x10000000
  191. #define MCD_END_FRAME 0x08000000
  192. #define MCD_CRC_RESTART 0x40000000
  193. /* Defines for the FEC buffer descriptor control/status word*/
  194. #define MCD_FEC_BUF_READY 0x8000
  195. #define MCD_FEC_WRAP 0x2000
  196. #define MCD_FEC_INTERRUPT 0x1000
  197. #define MCD_FEC_END_FRAME 0x0800
  198. /* Defines for general intuitiveness */
  199. #define MCD_TRUE 1
  200. #define MCD_FALSE 0
  201. /* Three different cases for destination and source. */
  202. #define MINUS1 -1
  203. #define ZERO 0
  204. #define PLUS1 1
  205. #ifndef DEFINESONLY
  206. /* Task Table Entry struct*/
  207. typedef struct {
  208. u32 TDTstart; /* task descriptor table start */
  209. u32 TDTend; /* task descriptor table end */
  210. u32 varTab; /* variable table start */
  211. u32 FDTandFlags; /* function descriptor table start & flags */
  212. volatile u32 descAddrAndStatus;
  213. volatile u32 modifiedVarTab;
  214. u32 contextSaveSpace; /* context save space start */
  215. u32 literalBases;
  216. } TaskTableEntry;
  217. /* Chained buffer descriptor:
  218. * flags - flags describing the DMA
  219. * csumResult - checksum performed since last checksum reset
  220. * srcAddr - the address to move data from
  221. * destAddr - the address to move data to
  222. * lastDestAddr - the last address written to
  223. * dmaSize - the no of bytes to xfer independent of the xfer sz
  224. * next - next buffer descriptor in chain
  225. * info - private info about this descriptor; DMA does not affect it
  226. */
  227. typedef volatile struct MCD_bufDesc_struct MCD_bufDesc;
  228. struct MCD_bufDesc_struct {
  229. u32 flags;
  230. u32 csumResult;
  231. s8 *srcAddr;
  232. s8 *destAddr;
  233. s8 *lastDestAddr;
  234. u32 dmaSize;
  235. MCD_bufDesc *next;
  236. u32 info;
  237. };
  238. /* Progress Query struct:
  239. * lastSrcAddr - the most-recent or last, post-increment source address
  240. * lastDestAddr - the most-recent or last, post-increment destination address
  241. * dmaSize - the amount of data transferred for the current buffer
  242. * currBufDesc - pointer to the current buffer descriptor being DMAed
  243. */
  244. typedef volatile struct MCD_XferProg_struct {
  245. s8 *lastSrcAddr;
  246. s8 *lastDestAddr;
  247. u32 dmaSize;
  248. MCD_bufDesc *currBufDesc;
  249. } MCD_XferProg;
  250. /* FEC buffer descriptor */
  251. typedef volatile struct MCD_bufDescFec_struct {
  252. u16 statCtrl;
  253. u16 length;
  254. u32 dataPointer;
  255. } MCD_bufDescFec;
  256. /*************************************************************************/
  257. /* API function Prototypes - see MCD_dmaApi.c for further notes */
  258. /* MCD_startDma starts a particular kind of DMA:
  259. * srcAddr - the channel on which to run the DMA
  260. * srcIncr - the address to move data from, or buffer-descriptor address
  261. * destAddr - the amount to increment the source address per transfer
  262. * destIncr - the address to move data to
  263. * dmaSize - the amount to increment the destination address per transfer
  264. * xferSize - the number bytes in of each data movement (1, 2, or 4)
  265. * initiator - what device initiates the DMA
  266. * priority - priority of the DMA
  267. * flags - flags describing the DMA
  268. * funcDesc - description of byte swapping, bit swapping, and CRC actions
  269. */
  270. int MCD_startDma(int channel, s8 * srcAddr, s16 srcIncr, s8 * destAddr,
  271. s16 destIncr, u32 dmaSize, u32 xferSize, u32 initiator,
  272. int priority, u32 flags, u32 funcDesc);
  273. /*
  274. * MCD_initDma() initializes the DMA API by setting up a pointer to the DMA
  275. * registers, relocating and creating the appropriate task structures, and
  276. * setting up some global settings
  277. */
  278. int MCD_initDma(dmaRegs * sDmaBarAddr, void *taskTableDest, u32 flags);
  279. /* MCD_dmaStatus() returns the status of the DMA on the requested channel. */
  280. int MCD_dmaStatus(int channel);
  281. /* MCD_XferProgrQuery() returns progress of DMA on requested channel */
  282. int MCD_XferProgrQuery(int channel, MCD_XferProg * progRep);
  283. /*
  284. * MCD_killDma() halts the DMA on the requested channel, without any
  285. * intention of resuming the DMA.
  286. */
  287. int MCD_killDma(int channel);
  288. /*
  289. * MCD_continDma() continues a DMA which as stopped due to encountering an
  290. * unready buffer descriptor.
  291. */
  292. int MCD_continDma(int channel);
  293. /*
  294. * MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is
  295. * running on that channel).
  296. */
  297. int MCD_pauseDma(int channel);
  298. /*
  299. * MCD_resumeDma() resumes the DMA on a given channel (if any DMA is
  300. * running on that channel).
  301. */
  302. int MCD_resumeDma(int channel);
  303. /* MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA */
  304. int MCD_csumQuery(int channel, u32 * csum);
  305. /*
  306. * MCD_getCodeSize provides the packed size required by the microcoded task
  307. * and structures.
  308. */
  309. int MCD_getCodeSize(void);
  310. /*
  311. * MCD_getVersion provides a pointer to a version string and returns a
  312. * version number.
  313. */
  314. int MCD_getVersion(char **longVersion);
  315. /* macro for setting a location in the variable table */
  316. #define MCD_SET_VAR(taskTab,idx,value) ((u32 *)(taskTab)->varTab)[idx] = value
  317. /* Note that MCD_SET_VAR() is invoked many times in firing up a DMA function,
  318. so I'm avoiding surrounding it with "do {} while(0)" */
  319. #endif /* DEFINESONLY */
  320. #endif /* _MCD_API_H */