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- * STMicroelectronics Quad Serial Peripheral Interface(QSPI)
- Required properties:
- - compatible: should be "st,stm32f469-qspi"
- - reg: the first contains the register location and length.
- the second contains the memory mapping address and length
- - reg-names: should contain the reg names "qspi" "qspi_mm"
- - interrupts: should contain the interrupt for the device
- - clocks: the phandle of the clock needed by the QSPI controller
- - A pinctrl must be defined to set pins in mode of operation for QSPI transfer
- Optional properties:
- - resets: must contain the phandle to the reset controller.
- A spi flash (NOR/NAND) must be a child of spi node and could have some
- properties. Also see jedec,spi-nor.txt.
- Required properties:
- - reg: chip-Select number (QSPI controller may connect 2 flashes)
- - spi-max-frequency: max frequency of spi bus
- Optional property:
- - spi-rx-bus-width: see ./spi-bus.txt for the description
- Example:
- qspi: spi@a0001000 {
- compatible = "st,stm32f469-qspi";
- reg = <0xa0001000 0x1000>, <0x90000000 0x10000000>;
- reg-names = "qspi", "qspi_mm";
- interrupts = <91>;
- resets = <&rcc STM32F4_AHB3_RESET(QSPI)>;
- clocks = <&rcc 0 STM32F4_AHB3_CLOCK(QSPI)>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_qspi0>;
- flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-rx-bus-width = <4>;
- spi-max-frequency = <108000000>;
- ...
- };
- };
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