board_f.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. * (C) Copyright 2002-2006
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * (C) Copyright 2002
  8. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  9. * Marius Groeger <mgroeger@sysgo.de>
  10. */
  11. #include <common.h>
  12. #include <bloblist.h>
  13. #include <console.h>
  14. #include <cpu.h>
  15. #include <cpu_func.h>
  16. #include <dm.h>
  17. #include <env.h>
  18. #include <env_internal.h>
  19. #include <fdtdec.h>
  20. #include <fs.h>
  21. #include <i2c.h>
  22. #include <init.h>
  23. #include <initcall.h>
  24. #include <lcd.h>
  25. #include <malloc.h>
  26. #include <mapmem.h>
  27. #include <os.h>
  28. #include <post.h>
  29. #include <relocate.h>
  30. #include <serial.h>
  31. #ifdef CONFIG_SPL
  32. #include <spl.h>
  33. #endif
  34. #include <status_led.h>
  35. #include <sysreset.h>
  36. #include <timer.h>
  37. #include <trace.h>
  38. #include <video.h>
  39. #include <watchdog.h>
  40. #ifdef CONFIG_MACH_TYPE
  41. #include <asm/mach-types.h>
  42. #endif
  43. #if defined(CONFIG_MP) && defined(CONFIG_PPC)
  44. #include <asm/mp.h>
  45. #endif
  46. #include <asm/io.h>
  47. #include <asm/sections.h>
  48. #include <dm/root.h>
  49. #include <linux/errno.h>
  50. /*
  51. * Pointer to initial global data area
  52. *
  53. * Here we initialize it if needed.
  54. */
  55. #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  56. #undef XTRN_DECLARE_GLOBAL_DATA_PTR
  57. #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
  58. DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
  59. #else
  60. DECLARE_GLOBAL_DATA_PTR;
  61. #endif
  62. /*
  63. * TODO(sjg@chromium.org): IMO this code should be
  64. * refactored to a single function, something like:
  65. *
  66. * void led_set_state(enum led_colour_t colour, int on);
  67. */
  68. /************************************************************************
  69. * Coloured LED functionality
  70. ************************************************************************
  71. * May be supplied by boards if desired
  72. */
  73. __weak void coloured_LED_init(void) {}
  74. __weak void red_led_on(void) {}
  75. __weak void red_led_off(void) {}
  76. __weak void green_led_on(void) {}
  77. __weak void green_led_off(void) {}
  78. __weak void yellow_led_on(void) {}
  79. __weak void yellow_led_off(void) {}
  80. __weak void blue_led_on(void) {}
  81. __weak void blue_led_off(void) {}
  82. /*
  83. * Why is gd allocated a register? Prior to reloc it might be better to
  84. * just pass it around to each function in this file?
  85. *
  86. * After reloc one could argue that it is hardly used and doesn't need
  87. * to be in a register. Or if it is it should perhaps hold pointers to all
  88. * global data for all modules, so that post-reloc we can avoid the massive
  89. * literal pool we get on ARM. Or perhaps just encourage each module to use
  90. * a structure...
  91. */
  92. #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
  93. static int init_func_watchdog_init(void)
  94. {
  95. # if defined(CONFIG_HW_WATCHDOG) && \
  96. (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
  97. defined(CONFIG_SH) || \
  98. defined(CONFIG_DESIGNWARE_WATCHDOG) || \
  99. defined(CONFIG_IMX_WATCHDOG))
  100. hw_watchdog_init();
  101. puts(" Watchdog enabled\n");
  102. # endif
  103. WATCHDOG_RESET();
  104. return 0;
  105. }
  106. int init_func_watchdog_reset(void)
  107. {
  108. WATCHDOG_RESET();
  109. return 0;
  110. }
  111. #endif /* CONFIG_WATCHDOG */
  112. __weak void board_add_ram_info(int use_default)
  113. {
  114. /* please define platform specific board_add_ram_info() */
  115. }
  116. static int init_baud_rate(void)
  117. {
  118. gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
  119. return 0;
  120. }
  121. static int display_text_info(void)
  122. {
  123. #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
  124. ulong bss_start, bss_end, text_base;
  125. bss_start = (ulong)&__bss_start;
  126. bss_end = (ulong)&__bss_end;
  127. #ifdef CONFIG_SYS_TEXT_BASE
  128. text_base = CONFIG_SYS_TEXT_BASE;
  129. #else
  130. text_base = CONFIG_SYS_MONITOR_BASE;
  131. #endif
  132. debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
  133. text_base, bss_start, bss_end);
  134. #endif
  135. return 0;
  136. }
  137. #ifdef CONFIG_SYSRESET
  138. static int print_resetinfo(void)
  139. {
  140. struct udevice *dev;
  141. char status[256];
  142. int ret;
  143. ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
  144. if (ret) {
  145. debug("%s: No sysreset device found (error: %d)\n",
  146. __func__, ret);
  147. /* Not all boards have sysreset drivers available during early
  148. * boot, so don't fail if one can't be found.
  149. */
  150. return 0;
  151. }
  152. if (!sysreset_get_status(dev, status, sizeof(status)))
  153. printf("%s", status);
  154. return 0;
  155. }
  156. #endif
  157. #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
  158. static int print_cpuinfo(void)
  159. {
  160. struct udevice *dev;
  161. char desc[512];
  162. int ret;
  163. ret = uclass_first_device_err(UCLASS_CPU, &dev);
  164. if (ret) {
  165. debug("%s: Could not get CPU device (err = %d)\n",
  166. __func__, ret);
  167. return ret;
  168. }
  169. ret = cpu_get_desc(dev, desc, sizeof(desc));
  170. if (ret) {
  171. debug("%s: Could not get CPU description (err = %d)\n",
  172. dev->name, ret);
  173. return ret;
  174. }
  175. printf("CPU: %s\n", desc);
  176. return 0;
  177. }
  178. #endif
  179. static int announce_dram_init(void)
  180. {
  181. puts("DRAM: ");
  182. return 0;
  183. }
  184. static int show_dram_config(void)
  185. {
  186. unsigned long long size;
  187. #ifdef CONFIG_NR_DRAM_BANKS
  188. int i;
  189. debug("\nRAM Configuration:\n");
  190. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  191. size += gd->bd->bi_dram[i].size;
  192. debug("Bank #%d: %llx ", i,
  193. (unsigned long long)(gd->bd->bi_dram[i].start));
  194. #ifdef DEBUG
  195. print_size(gd->bd->bi_dram[i].size, "\n");
  196. #endif
  197. }
  198. debug("\nDRAM: ");
  199. #else
  200. size = gd->ram_size;
  201. #endif
  202. print_size(size, "");
  203. board_add_ram_info(0);
  204. putc('\n');
  205. return 0;
  206. }
  207. __weak int dram_init_banksize(void)
  208. {
  209. #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
  210. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  211. gd->bd->bi_dram[0].size = get_effective_memsize();
  212. #endif
  213. return 0;
  214. }
  215. #if defined(CONFIG_SYS_I2C)
  216. static int init_func_i2c(void)
  217. {
  218. puts("I2C: ");
  219. #ifdef CONFIG_SYS_I2C
  220. i2c_init_all();
  221. #else
  222. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  223. #endif
  224. puts("ready\n");
  225. return 0;
  226. }
  227. #endif
  228. #if defined(CONFIG_VID)
  229. __weak int init_func_vid(void)
  230. {
  231. return 0;
  232. }
  233. #endif
  234. static int setup_mon_len(void)
  235. {
  236. #if defined(__ARM__) || defined(__MICROBLAZE__)
  237. gd->mon_len = (ulong)&__bss_end - (ulong)_start;
  238. #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
  239. gd->mon_len = (ulong)&_end - (ulong)_init;
  240. #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
  241. gd->mon_len = CONFIG_SYS_MONITOR_LEN;
  242. #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
  243. gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
  244. #elif defined(CONFIG_SYS_MONITOR_BASE)
  245. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  246. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  247. #endif
  248. return 0;
  249. }
  250. static int setup_spl_handoff(void)
  251. {
  252. #if CONFIG_IS_ENABLED(HANDOFF)
  253. gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
  254. sizeof(struct spl_handoff));
  255. debug("Found SPL hand-off info %p\n", gd->spl_handoff);
  256. #endif
  257. return 0;
  258. }
  259. __weak int arch_cpu_init(void)
  260. {
  261. return 0;
  262. }
  263. __weak int mach_cpu_init(void)
  264. {
  265. return 0;
  266. }
  267. /* Get the top of usable RAM */
  268. __weak ulong board_get_usable_ram_top(ulong total_size)
  269. {
  270. #ifdef CONFIG_SYS_SDRAM_BASE
  271. /*
  272. * Detect whether we have so much RAM that it goes past the end of our
  273. * 32-bit address space. If so, clip the usable RAM so it doesn't.
  274. */
  275. if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
  276. /*
  277. * Will wrap back to top of 32-bit space when reservations
  278. * are made.
  279. */
  280. return 0;
  281. #endif
  282. return gd->ram_top;
  283. }
  284. static int setup_dest_addr(void)
  285. {
  286. debug("Monitor len: %08lX\n", gd->mon_len);
  287. /*
  288. * Ram is setup, size stored in gd !!
  289. */
  290. debug("Ram size: %08lX\n", (ulong)gd->ram_size);
  291. #if defined(CONFIG_SYS_MEM_TOP_HIDE)
  292. /*
  293. * Subtract specified amount of memory to hide so that it won't
  294. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  295. * the Linux kernel should now get passed the now "corrected"
  296. * memory size and won't touch it either. This should work
  297. * for arch/ppc and arch/powerpc. Only Linux board ports in
  298. * arch/powerpc with bootwrapper support, that recalculate the
  299. * memory size from the SDRAM controller setup will have to
  300. * get fixed.
  301. */
  302. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  303. #endif
  304. #ifdef CONFIG_SYS_SDRAM_BASE
  305. gd->ram_base = CONFIG_SYS_SDRAM_BASE;
  306. #endif
  307. gd->ram_top = gd->ram_base + get_effective_memsize();
  308. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  309. gd->relocaddr = gd->ram_top;
  310. debug("Ram top: %08lX\n", (ulong)gd->ram_top);
  311. #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  312. /*
  313. * We need to make sure the location we intend to put secondary core
  314. * boot code is reserved and not used by any part of u-boot
  315. */
  316. if (gd->relocaddr > determine_mp_bootpg(NULL)) {
  317. gd->relocaddr = determine_mp_bootpg(NULL);
  318. debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
  319. }
  320. #endif
  321. return 0;
  322. }
  323. #ifdef CONFIG_PRAM
  324. /* reserve protected RAM */
  325. static int reserve_pram(void)
  326. {
  327. ulong reg;
  328. reg = env_get_ulong("pram", 10, CONFIG_PRAM);
  329. gd->relocaddr -= (reg << 10); /* size is in kB */
  330. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  331. gd->relocaddr);
  332. return 0;
  333. }
  334. #endif /* CONFIG_PRAM */
  335. /* Round memory pointer down to next 4 kB limit */
  336. static int reserve_round_4k(void)
  337. {
  338. gd->relocaddr &= ~(4096 - 1);
  339. return 0;
  340. }
  341. #ifdef CONFIG_ARM
  342. __weak int reserve_mmu(void)
  343. {
  344. #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
  345. /* reserve TLB table */
  346. gd->arch.tlb_size = PGTABLE_SIZE;
  347. gd->relocaddr -= gd->arch.tlb_size;
  348. /* round down to next 64 kB limit */
  349. gd->relocaddr &= ~(0x10000 - 1);
  350. gd->arch.tlb_addr = gd->relocaddr;
  351. debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
  352. gd->arch.tlb_addr + gd->arch.tlb_size);
  353. #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
  354. /*
  355. * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
  356. * with location within secure ram.
  357. */
  358. gd->arch.tlb_allocated = gd->arch.tlb_addr;
  359. #endif
  360. #endif
  361. return 0;
  362. }
  363. #endif
  364. static int reserve_video(void)
  365. {
  366. #ifdef CONFIG_DM_VIDEO
  367. ulong addr;
  368. int ret;
  369. addr = gd->relocaddr;
  370. ret = video_reserve(&addr);
  371. if (ret)
  372. return ret;
  373. gd->relocaddr = addr;
  374. #elif defined(CONFIG_LCD)
  375. # ifdef CONFIG_FB_ADDR
  376. gd->fb_base = CONFIG_FB_ADDR;
  377. # else
  378. /* reserve memory for LCD display (always full pages) */
  379. gd->relocaddr = lcd_setmem(gd->relocaddr);
  380. gd->fb_base = gd->relocaddr;
  381. # endif /* CONFIG_FB_ADDR */
  382. #endif
  383. return 0;
  384. }
  385. static int reserve_trace(void)
  386. {
  387. #ifdef CONFIG_TRACE
  388. gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
  389. gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
  390. debug("Reserving %luk for trace data at: %08lx\n",
  391. (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
  392. #endif
  393. return 0;
  394. }
  395. static int reserve_uboot(void)
  396. {
  397. if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
  398. /*
  399. * reserve memory for U-Boot code, data & bss
  400. * round down to next 4 kB limit
  401. */
  402. gd->relocaddr -= gd->mon_len;
  403. gd->relocaddr &= ~(4096 - 1);
  404. #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
  405. /* round down to next 64 kB limit so that IVPR stays aligned */
  406. gd->relocaddr &= ~(65536 - 1);
  407. #endif
  408. debug("Reserving %ldk for U-Boot at: %08lx\n",
  409. gd->mon_len >> 10, gd->relocaddr);
  410. }
  411. gd->start_addr_sp = gd->relocaddr;
  412. return 0;
  413. }
  414. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  415. static int reserve_noncached(void)
  416. {
  417. /*
  418. * The value of gd->start_addr_sp must match the value of malloc_start
  419. * calculated in boatrd_f.c:initr_malloc(), which is passed to
  420. * board_r.c:mem_malloc_init() and then used by
  421. * cache.c:noncached_init()
  422. *
  423. * These calculations must match the code in cache.c:noncached_init()
  424. */
  425. gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
  426. MMU_SECTION_SIZE;
  427. gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
  428. MMU_SECTION_SIZE);
  429. debug("Reserving %dM for noncached_alloc() at: %08lx\n",
  430. CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
  431. return 0;
  432. }
  433. #endif
  434. /* reserve memory for malloc() area */
  435. static int reserve_malloc(void)
  436. {
  437. gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
  438. debug("Reserving %dk for malloc() at: %08lx\n",
  439. TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
  440. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  441. reserve_noncached();
  442. #endif
  443. return 0;
  444. }
  445. /* (permanently) allocate a Board Info struct */
  446. static int reserve_board(void)
  447. {
  448. if (!gd->bd) {
  449. gd->start_addr_sp -= sizeof(bd_t);
  450. gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
  451. memset(gd->bd, '\0', sizeof(bd_t));
  452. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  453. sizeof(bd_t), gd->start_addr_sp);
  454. }
  455. return 0;
  456. }
  457. static int setup_machine(void)
  458. {
  459. #ifdef CONFIG_MACH_TYPE
  460. gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
  461. #endif
  462. return 0;
  463. }
  464. static int reserve_global_data(void)
  465. {
  466. gd->start_addr_sp -= sizeof(gd_t);
  467. gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
  468. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  469. sizeof(gd_t), gd->start_addr_sp);
  470. return 0;
  471. }
  472. static int reserve_fdt(void)
  473. {
  474. #ifndef CONFIG_OF_EMBED
  475. /*
  476. * If the device tree is sitting immediately above our image then we
  477. * must relocate it. If it is embedded in the data section, then it
  478. * will be relocated with other data.
  479. */
  480. if (gd->fdt_blob) {
  481. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
  482. gd->start_addr_sp -= gd->fdt_size;
  483. gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
  484. debug("Reserving %lu Bytes for FDT at: %08lx\n",
  485. gd->fdt_size, gd->start_addr_sp);
  486. }
  487. #endif
  488. return 0;
  489. }
  490. static int reserve_bootstage(void)
  491. {
  492. #ifdef CONFIG_BOOTSTAGE
  493. int size = bootstage_get_size();
  494. gd->start_addr_sp -= size;
  495. gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
  496. debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
  497. gd->start_addr_sp);
  498. #endif
  499. return 0;
  500. }
  501. __weak int arch_reserve_stacks(void)
  502. {
  503. return 0;
  504. }
  505. static int reserve_stacks(void)
  506. {
  507. /* make stack pointer 16-byte aligned */
  508. gd->start_addr_sp -= 16;
  509. gd->start_addr_sp &= ~0xf;
  510. /*
  511. * let the architecture-specific code tailor gd->start_addr_sp and
  512. * gd->irq_sp
  513. */
  514. return arch_reserve_stacks();
  515. }
  516. static int reserve_bloblist(void)
  517. {
  518. #ifdef CONFIG_BLOBLIST
  519. gd->start_addr_sp &= ~0xf;
  520. gd->start_addr_sp -= CONFIG_BLOBLIST_SIZE;
  521. gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
  522. #endif
  523. return 0;
  524. }
  525. static int display_new_sp(void)
  526. {
  527. debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
  528. return 0;
  529. }
  530. #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
  531. defined(CONFIG_SH)
  532. static int setup_board_part1(void)
  533. {
  534. bd_t *bd = gd->bd;
  535. /*
  536. * Save local variables to board info struct
  537. */
  538. bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
  539. bd->bi_memsize = gd->ram_size; /* size in bytes */
  540. #ifdef CONFIG_SYS_SRAM_BASE
  541. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  542. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  543. #endif
  544. #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  545. bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
  546. #endif
  547. #if defined(CONFIG_M68K)
  548. bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
  549. #endif
  550. #if defined(CONFIG_MPC83xx)
  551. bd->bi_immrbar = CONFIG_SYS_IMMR;
  552. #endif
  553. return 0;
  554. }
  555. #endif
  556. #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
  557. static int setup_board_part2(void)
  558. {
  559. bd_t *bd = gd->bd;
  560. bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
  561. bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
  562. #if defined(CONFIG_CPM2)
  563. bd->bi_cpmfreq = gd->arch.cpm_clk;
  564. bd->bi_brgfreq = gd->arch.brg_clk;
  565. bd->bi_sccfreq = gd->arch.scc_clk;
  566. bd->bi_vco = gd->arch.vco_out;
  567. #endif /* CONFIG_CPM2 */
  568. #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
  569. bd->bi_pcifreq = gd->pci_clk;
  570. #endif
  571. #if defined(CONFIG_EXTRA_CLOCK)
  572. bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
  573. bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
  574. bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
  575. #endif
  576. return 0;
  577. }
  578. #endif
  579. #ifdef CONFIG_POST
  580. static int init_post(void)
  581. {
  582. post_bootmode_init();
  583. post_run(NULL, POST_ROM | post_bootmode_get(0));
  584. return 0;
  585. }
  586. #endif
  587. static int reloc_fdt(void)
  588. {
  589. #ifndef CONFIG_OF_EMBED
  590. if (gd->flags & GD_FLG_SKIP_RELOC)
  591. return 0;
  592. if (gd->new_fdt) {
  593. memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
  594. gd->fdt_blob = gd->new_fdt;
  595. }
  596. #endif
  597. return 0;
  598. }
  599. static int reloc_bootstage(void)
  600. {
  601. #ifdef CONFIG_BOOTSTAGE
  602. if (gd->flags & GD_FLG_SKIP_RELOC)
  603. return 0;
  604. if (gd->new_bootstage) {
  605. int size = bootstage_get_size();
  606. debug("Copying bootstage from %p to %p, size %x\n",
  607. gd->bootstage, gd->new_bootstage, size);
  608. memcpy(gd->new_bootstage, gd->bootstage, size);
  609. gd->bootstage = gd->new_bootstage;
  610. bootstage_relocate();
  611. }
  612. #endif
  613. return 0;
  614. }
  615. static int reloc_bloblist(void)
  616. {
  617. #ifdef CONFIG_BLOBLIST
  618. if (gd->flags & GD_FLG_SKIP_RELOC)
  619. return 0;
  620. if (gd->new_bloblist) {
  621. int size = CONFIG_BLOBLIST_SIZE;
  622. debug("Copying bloblist from %p to %p, size %x\n",
  623. gd->bloblist, gd->new_bloblist, size);
  624. memcpy(gd->new_bloblist, gd->bloblist, size);
  625. gd->bloblist = gd->new_bloblist;
  626. }
  627. #endif
  628. return 0;
  629. }
  630. static int setup_reloc(void)
  631. {
  632. if (gd->flags & GD_FLG_SKIP_RELOC) {
  633. debug("Skipping relocation due to flag\n");
  634. return 0;
  635. }
  636. #ifdef CONFIG_SYS_TEXT_BASE
  637. #ifdef ARM
  638. gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
  639. #elif defined(CONFIG_M68K)
  640. /*
  641. * On all ColdFire arch cpu, monitor code starts always
  642. * just after the default vector table location, so at 0x400
  643. */
  644. gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
  645. #elif !defined(CONFIG_SANDBOX)
  646. gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
  647. #endif
  648. #endif
  649. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  650. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  651. debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
  652. gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
  653. gd->start_addr_sp);
  654. return 0;
  655. }
  656. #ifdef CONFIG_OF_BOARD_FIXUP
  657. static int fix_fdt(void)
  658. {
  659. return board_fix_fdt((void *)gd->fdt_blob);
  660. }
  661. #endif
  662. /* ARM calls relocate_code from its crt0.S */
  663. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  664. !CONFIG_IS_ENABLED(X86_64)
  665. static int jump_to_copy(void)
  666. {
  667. if (gd->flags & GD_FLG_SKIP_RELOC)
  668. return 0;
  669. /*
  670. * x86 is special, but in a nice way. It uses a trampoline which
  671. * enables the dcache if possible.
  672. *
  673. * For now, other archs use relocate_code(), which is implemented
  674. * similarly for all archs. When we do generic relocation, hopefully
  675. * we can make all archs enable the dcache prior to relocation.
  676. */
  677. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  678. /*
  679. * SDRAM and console are now initialised. The final stack can now
  680. * be setup in SDRAM. Code execution will continue in Flash, but
  681. * with the stack in SDRAM and Global Data in temporary memory
  682. * (CPU cache)
  683. */
  684. arch_setup_gd(gd->new_gd);
  685. board_init_f_r_trampoline(gd->start_addr_sp);
  686. #else
  687. relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
  688. #endif
  689. return 0;
  690. }
  691. #endif
  692. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  693. static int initf_bootstage(void)
  694. {
  695. bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
  696. IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
  697. int ret;
  698. ret = bootstage_init(!from_spl);
  699. if (ret)
  700. return ret;
  701. if (from_spl) {
  702. const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
  703. CONFIG_BOOTSTAGE_STASH_SIZE);
  704. ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
  705. if (ret && ret != -ENOENT) {
  706. debug("Failed to unstash bootstage: err=%d\n", ret);
  707. return ret;
  708. }
  709. }
  710. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  711. return 0;
  712. }
  713. static int initf_console_record(void)
  714. {
  715. #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  716. return console_record_init();
  717. #else
  718. return 0;
  719. #endif
  720. }
  721. static int initf_dm(void)
  722. {
  723. #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  724. int ret;
  725. bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
  726. ret = dm_init_and_scan(true);
  727. bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
  728. if (ret)
  729. return ret;
  730. #endif
  731. #ifdef CONFIG_TIMER_EARLY
  732. ret = dm_timer_init();
  733. if (ret)
  734. return ret;
  735. #endif
  736. return 0;
  737. }
  738. /* Architecture-specific memory reservation */
  739. __weak int reserve_arch(void)
  740. {
  741. return 0;
  742. }
  743. __weak int arch_cpu_init_dm(void)
  744. {
  745. return 0;
  746. }
  747. static const init_fnc_t init_sequence_f[] = {
  748. setup_mon_len,
  749. #ifdef CONFIG_OF_CONTROL
  750. fdtdec_setup,
  751. #endif
  752. #ifdef CONFIG_TRACE_EARLY
  753. trace_early_init,
  754. #endif
  755. initf_malloc,
  756. log_init,
  757. initf_bootstage, /* uses its own timer, so does not need DM */
  758. #ifdef CONFIG_BLOBLIST
  759. bloblist_init,
  760. #endif
  761. setup_spl_handoff,
  762. initf_console_record,
  763. #if defined(CONFIG_HAVE_FSP)
  764. arch_fsp_init,
  765. #endif
  766. arch_cpu_init, /* basic arch cpu dependent setup */
  767. mach_cpu_init, /* SoC/machine dependent CPU setup */
  768. initf_dm,
  769. arch_cpu_init_dm,
  770. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  771. board_early_init_f,
  772. #endif
  773. #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
  774. /* get CPU and bus clocks according to the environment variable */
  775. get_clocks, /* get CPU and bus clocks (etc.) */
  776. #endif
  777. #if !defined(CONFIG_M68K)
  778. timer_init, /* initialize timer */
  779. #endif
  780. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  781. board_postclk_init,
  782. #endif
  783. env_init, /* initialize environment */
  784. init_baud_rate, /* initialze baudrate settings */
  785. serial_init, /* serial communications setup */
  786. console_init_f, /* stage 1 init of console */
  787. display_options, /* say that we are here */
  788. display_text_info, /* show debugging info if required */
  789. #if defined(CONFIG_PPC) || defined(CONFIG_SH) || defined(CONFIG_X86)
  790. checkcpu,
  791. #endif
  792. #if defined(CONFIG_SYSRESET)
  793. print_resetinfo,
  794. #endif
  795. #if defined(CONFIG_DISPLAY_CPUINFO)
  796. print_cpuinfo, /* display cpu info (and speed) */
  797. #endif
  798. #if defined(CONFIG_DTB_RESELECT)
  799. embedded_dtb_select,
  800. #endif
  801. #if defined(CONFIG_DISPLAY_BOARDINFO)
  802. show_board_info,
  803. #endif
  804. INIT_FUNC_WATCHDOG_INIT
  805. #if defined(CONFIG_MISC_INIT_F)
  806. misc_init_f,
  807. #endif
  808. INIT_FUNC_WATCHDOG_RESET
  809. #if defined(CONFIG_SYS_I2C)
  810. init_func_i2c,
  811. #endif
  812. #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
  813. init_func_vid,
  814. #endif
  815. announce_dram_init,
  816. dram_init, /* configure available RAM banks */
  817. #ifdef CONFIG_POST
  818. post_init_f,
  819. #endif
  820. INIT_FUNC_WATCHDOG_RESET
  821. #if defined(CONFIG_SYS_DRAM_TEST)
  822. testdram,
  823. #endif /* CONFIG_SYS_DRAM_TEST */
  824. INIT_FUNC_WATCHDOG_RESET
  825. #ifdef CONFIG_POST
  826. init_post,
  827. #endif
  828. INIT_FUNC_WATCHDOG_RESET
  829. /*
  830. * Now that we have DRAM mapped and working, we can
  831. * relocate the code and continue running from DRAM.
  832. *
  833. * Reserve memory at end of RAM for (top down in that order):
  834. * - area that won't get touched by U-Boot and Linux (optional)
  835. * - kernel log buffer
  836. * - protected RAM
  837. * - LCD framebuffer
  838. * - monitor code
  839. * - board info struct
  840. */
  841. setup_dest_addr,
  842. #ifdef CONFIG_PRAM
  843. reserve_pram,
  844. #endif
  845. reserve_round_4k,
  846. #ifdef CONFIG_ARM
  847. reserve_mmu,
  848. #endif
  849. reserve_video,
  850. reserve_trace,
  851. reserve_uboot,
  852. reserve_malloc,
  853. reserve_board,
  854. setup_machine,
  855. reserve_global_data,
  856. reserve_fdt,
  857. reserve_bootstage,
  858. reserve_bloblist,
  859. reserve_arch,
  860. reserve_stacks,
  861. dram_init_banksize,
  862. show_dram_config,
  863. #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
  864. defined(CONFIG_SH)
  865. setup_board_part1,
  866. #endif
  867. #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
  868. INIT_FUNC_WATCHDOG_RESET
  869. setup_board_part2,
  870. #endif
  871. display_new_sp,
  872. #ifdef CONFIG_OF_BOARD_FIXUP
  873. fix_fdt,
  874. #endif
  875. INIT_FUNC_WATCHDOG_RESET
  876. reloc_fdt,
  877. reloc_bootstage,
  878. reloc_bloblist,
  879. setup_reloc,
  880. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  881. copy_uboot_to_ram,
  882. do_elf_reloc_fixups,
  883. clear_bss,
  884. #endif
  885. #if defined(CONFIG_XTENSA)
  886. clear_bss,
  887. #endif
  888. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  889. !CONFIG_IS_ENABLED(X86_64)
  890. jump_to_copy,
  891. #endif
  892. NULL,
  893. };
  894. void board_init_f(ulong boot_flags)
  895. {
  896. gd->flags = boot_flags;
  897. gd->have_console = 0;
  898. if (initcall_run_list(init_sequence_f))
  899. hang();
  900. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  901. !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
  902. !defined(CONFIG_ARC) && !defined(CONFIG_CSKY)
  903. /* NOTREACHED - jump_to_copy() does not return */
  904. hang();
  905. #endif
  906. }
  907. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  908. /*
  909. * For now this code is only used on x86.
  910. *
  911. * init_sequence_f_r is the list of init functions which are run when
  912. * U-Boot is executing from Flash with a semi-limited 'C' environment.
  913. * The following limitations must be considered when implementing an
  914. * '_f_r' function:
  915. * - 'static' variables are read-only
  916. * - Global Data (gd->xxx) is read/write
  917. *
  918. * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
  919. * supported). It _should_, if possible, copy global data to RAM and
  920. * initialise the CPU caches (to speed up the relocation process)
  921. *
  922. * NOTE: At present only x86 uses this route, but it is intended that
  923. * all archs will move to this when generic relocation is implemented.
  924. */
  925. static const init_fnc_t init_sequence_f_r[] = {
  926. #if !CONFIG_IS_ENABLED(X86_64)
  927. init_cache_f_r,
  928. #endif
  929. NULL,
  930. };
  931. void board_init_f_r(void)
  932. {
  933. if (initcall_run_list(init_sequence_f_r))
  934. hang();
  935. /*
  936. * The pre-relocation drivers may be using memory that has now gone
  937. * away. Mark serial as unavailable - this will fall back to the debug
  938. * UART if available.
  939. *
  940. * Do the same with log drivers since the memory may not be available.
  941. */
  942. gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
  943. #ifdef CONFIG_TIMER
  944. gd->timer = NULL;
  945. #endif
  946. /*
  947. * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
  948. * Transfer execution from Flash to RAM by calculating the address
  949. * of the in-RAM copy of board_init_r() and calling it
  950. */
  951. (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
  952. /* NOTREACHED - board_init_r() does not return */
  953. hang();
  954. }
  955. #endif /* CONFIG_X86 */