tlb.c 2.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2008 Extreme Engineering Solutions, Inc.
  4. * Copyright 2008 Freescale Semiconductor, Inc.
  5. *
  6. * (C) Copyright 2000
  7. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  8. */
  9. #include <common.h>
  10. #include <asm/mmu.h>
  11. struct fsl_e_tlb_entry tlb_table[] = {
  12. /* TLB 0 - for temp stack in cache */
  13. SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR,
  14. MAS3_SX|MAS3_SW|MAS3_SR, 0,
  15. 0, 0, BOOKE_PAGESZ_4K, 0),
  16. SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
  17. CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
  18. MAS3_SX|MAS3_SW|MAS3_SR, 0,
  19. 0, 0, BOOKE_PAGESZ_4K, 0),
  20. SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
  21. CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
  22. MAS3_SX|MAS3_SW|MAS3_SR, 0,
  23. 0, 0, BOOKE_PAGESZ_4K, 0),
  24. SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
  25. CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
  26. MAS3_SX|MAS3_SW|MAS3_SR, 0,
  27. 0, 0, BOOKE_PAGESZ_4K, 0),
  28. /* W**G* - NOR flashes */
  29. /* This will be changed to *I*G* after relocation to RAM. */
  30. SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE2, CONFIG_SYS_FLASH_BASE2,
  31. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G,
  32. 0, 0, BOOKE_PAGESZ_256M, 1),
  33. SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS,
  34. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  35. 0, 1, BOOKE_PAGESZ_1M, 1),
  36. /* *I*G* - NAND flash */
  37. SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE,
  38. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  39. 0, 2, BOOKE_PAGESZ_1M, 1),
  40. #if CONFIG_PCI1
  41. /* *I*G* - PCI MEM */
  42. SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_MEM_PHYS, CONFIG_SYS_PCI1_MEM_PHYS,
  43. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  44. 0, 3, BOOKE_PAGESZ_1G, 1),
  45. #endif
  46. #if CONFIG_PCI2
  47. /* *I*G* - PCI MEM */
  48. SET_TLB_ENTRY(1, CONFIG_SYS_PCI2_MEM_PHYS, CONFIG_SYS_PCI2_MEM_PHYS,
  49. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  50. 0, 4, BOOKE_PAGESZ_256M, 1),
  51. #endif
  52. #if defined(CONFIG_PCI1) || defined(CONFIG_PCI2)
  53. /* *I*G* - PCI IO */
  54. SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_IO_PHYS, CONFIG_SYS_PCI1_IO_PHYS,
  55. MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
  56. 0, 5, BOOKE_PAGESZ_16M, 1),
  57. #endif
  58. };
  59. int num_tlb_entries = ARRAY_SIZE(tlb_table);