fpga.c 4.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2016 Stefan Roese <sr@denx.de>
  4. */
  5. #include <common.h>
  6. #include <altera.h>
  7. #include <errno.h>
  8. #include <asm/gpio.h>
  9. #include <asm/io.h>
  10. #include <asm/arch/cpu.h>
  11. #include <asm/arch/soc.h>
  12. #include <asm/arch-mvebu/spi.h>
  13. #include "theadorable.h"
  14. /*
  15. * FPGA programming support
  16. */
  17. static int fpga_pre_fn(int cookie)
  18. {
  19. int gpio_config = COOKIE2CONFIG(cookie);
  20. int gpio_done = COOKIE2DONE(cookie);
  21. int ret;
  22. debug("%s (%d): cookie=%08x gpio_config=%d gpio_done=%d\n",
  23. __func__, __LINE__, cookie, gpio_config, gpio_done);
  24. /* Configure config pin */
  25. /* Set to output */
  26. ret = gpio_request(gpio_config, "CONFIG");
  27. if (ret < 0)
  28. return ret;
  29. gpio_direction_output(gpio_config, 1);
  30. /* Configure done pin */
  31. /* Set to input */
  32. ret = gpio_request(gpio_done, "DONE");
  33. if (ret < 0)
  34. return ret;
  35. gpio_direction_input(gpio_done);
  36. return 0;
  37. }
  38. static int fpga_config_fn(int assert, int flush, int cookie)
  39. {
  40. int gpio_config = COOKIE2CONFIG(cookie);
  41. debug("%s (%d): cookie=%08x gpio_config=%d\n",
  42. __func__, __LINE__, cookie, gpio_config);
  43. if (assert)
  44. gpio_set_value(gpio_config, 1);
  45. else
  46. gpio_set_value(gpio_config, 0);
  47. return 0;
  48. }
  49. static int fpga_write_fn(const void *buf, size_t len, int flush, int cookie)
  50. {
  51. int spi_bus = COOKIE2SPI_BUS(cookie);
  52. int spi_dev = COOKIE2SPI_DEV(cookie);
  53. struct kwspi_registers *reg;
  54. u32 control_reg;
  55. u32 config_reg;
  56. void *dst;
  57. /*
  58. * Write data to FPGA attached to SPI bus via SPI direct write.
  59. * This results in the fastest and easiest way to program the
  60. * bitstream into the FPGA.
  61. */
  62. debug("%s (%d): cookie=%08x spi_bus=%d spi_dev=%d\n",
  63. __func__, __LINE__, cookie, spi_bus, spi_dev);
  64. if (spi_bus == 0) {
  65. reg = (struct kwspi_registers *)MVEBU_REGISTER(0x10600);
  66. dst = (void *)SPI_BUS0_DEV1_BASE;
  67. } else {
  68. reg = (struct kwspi_registers *)MVEBU_REGISTER(0x10680);
  69. dst = (void *)SPI_BUS1_DEV2_BASE;
  70. }
  71. /* Configure SPI controller for direct access mode */
  72. control_reg = readl(&reg->ctrl);
  73. config_reg = readl(&reg->cfg);
  74. writel(0x00000214, &reg->cfg); /* 27MHz clock */
  75. writel(0x00000000, &reg->dw_cfg); /* don't de-asset CS */
  76. writel(KWSPI_CSN_ACT, &reg->ctrl); /* activate CS */
  77. /* Copy data to the SPI direct mapped window */
  78. memcpy(dst, buf, len);
  79. /* Restore original register values */
  80. writel(control_reg, &reg->ctrl);
  81. writel(config_reg, &reg->cfg);
  82. return 0;
  83. }
  84. /* Returns the state of CONF_DONE Pin */
  85. static int fpga_done_fn(int cookie)
  86. {
  87. int gpio_done = COOKIE2DONE(cookie);
  88. unsigned long ts;
  89. debug("%s (%d): cookie=%08x gpio_done=%d\n",
  90. __func__, __LINE__, cookie, gpio_done);
  91. ts = get_timer(0);
  92. do {
  93. if (gpio_get_value(gpio_done))
  94. return 0;
  95. } while (get_timer(ts) < 1000);
  96. /* timeout so return error */
  97. return -ENODEV;
  98. }
  99. static altera_board_specific_func stratixv_fns = {
  100. .pre = fpga_pre_fn,
  101. .config = fpga_config_fn,
  102. .write = fpga_write_fn,
  103. .done = fpga_done_fn,
  104. };
  105. static Altera_desc altera_fpga[] = {
  106. {
  107. /* Family */
  108. Altera_StratixV,
  109. /* Interface type */
  110. passive_serial,
  111. /* No limitation as additional data will be ignored */
  112. -1,
  113. /* Device function table */
  114. (void *)&stratixv_fns,
  115. /* Base interface address specified in driver */
  116. NULL,
  117. /* Cookie implementation */
  118. /*
  119. * In this 32bit word the following information is coded:
  120. * Bit 31 ... Bit 0
  121. * SPI-Bus | SPI-Dev | Config-Pin | Done-Pin
  122. */
  123. FPGA_COOKIE(0, 1, 26, 7)
  124. },
  125. {
  126. /* Family */
  127. Altera_StratixV,
  128. /* Interface type */
  129. passive_serial,
  130. /* No limitation as additional data will be ignored */
  131. -1,
  132. /* Device function table */
  133. (void *)&stratixv_fns,
  134. /* Base interface address specified in driver */
  135. NULL,
  136. /* Cookie implementation */
  137. /*
  138. * In this 32bit word the following information is coded:
  139. * Bit 31 ... Bit 0
  140. * SPI-Bus | SPI-Dev | Config-Pin | Done-Pin
  141. */
  142. FPGA_COOKIE(1, 2, 29, 9)
  143. },
  144. };
  145. /* Add device descriptor to FPGA device table */
  146. void board_fpga_add(void)
  147. {
  148. int i;
  149. fpga_init();
  150. for (i = 0; i < ARRAY_SIZE(altera_fpga); i++)
  151. fpga_add(fpga_altera, &altera_fpga[i]);
  152. }