clk-lib.c 1.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2018 Synopsys, Inc. All rights reserved.
  4. * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
  5. */
  6. #include <clk.h>
  7. #include <dm/device.h>
  8. #include "clk-lib.h"
  9. #define HZ_IN_MHZ 1000000
  10. #define ceil(x, y) ({ ulong __x = (x), __y = (y); (__x + __y - 1) / __y; })
  11. int soc_clk_ctl(const char *name, ulong *rate, enum clk_ctl_ops ctl)
  12. {
  13. int ret;
  14. ulong mhz_rate, priv_rate;
  15. struct clk clk;
  16. /* Dummy fmeas device, just to be able to use standard clk_* api */
  17. struct udevice fmeas = {
  18. .name = "clk-fmeas",
  19. .node = ofnode_path("/clk-fmeas"),
  20. };
  21. ret = clk_get_by_name(&fmeas, name, &clk);
  22. if (ret) {
  23. pr_err("clock '%s' not found, err=%d\n", name, ret);
  24. return ret;
  25. }
  26. if (ctl & CLK_ON) {
  27. ret = clk_enable(&clk);
  28. if (ret && ret != -ENOSYS && ret != -ENOTSUPP)
  29. return ret;
  30. }
  31. if ((ctl & CLK_SET) && rate) {
  32. priv_rate = ctl & CLK_MHZ ? (*rate) * HZ_IN_MHZ : *rate;
  33. ret = clk_set_rate(&clk, priv_rate);
  34. if (ret)
  35. return ret;
  36. }
  37. if (ctl & CLK_OFF) {
  38. ret = clk_disable(&clk);
  39. if (ret) {
  40. pr_err("clock '%s' can't be disabled, err=%d\n", name, ret);
  41. return ret;
  42. }
  43. }
  44. priv_rate = clk_get_rate(&clk);
  45. clk_free(&clk);
  46. mhz_rate = ceil(priv_rate, HZ_IN_MHZ);
  47. if (ctl & CLK_MHZ)
  48. priv_rate = mhz_rate;
  49. if ((ctl & CLK_GET) && rate)
  50. *rate = priv_rate;
  51. if ((ctl & CLK_PRINT) && (ctl & CLK_MHZ))
  52. printf("HSDK: clock '%s' rate %lu MHz\n", name, priv_rate);
  53. else if (ctl & CLK_PRINT)
  54. printf("HSDK: clock '%s' rate %lu Hz\n", name, priv_rate);
  55. else
  56. debug("HSDK: clock '%s' rate %lu MHz\n", name, mhz_rate);
  57. return 0;
  58. }