sdram.c 2.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2008
  4. * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com.
  5. */
  6. #include <common.h>
  7. #include <asm/processor.h>
  8. #include <asm/immap_85xx.h>
  9. #include <fsl_ddr_sdram.h>
  10. #include <asm/processor.h>
  11. #include <asm/mmu.h>
  12. #include <spd_sdram.h>
  13. #if !defined(CONFIG_SPD_EEPROM)
  14. /*
  15. * Autodetect onboard DDR SDRAM on 85xx platforms
  16. *
  17. * NOTE: Some of the hardcoded values are hardware dependant,
  18. * so this should be extended for other future boards
  19. * using this routine!
  20. */
  21. phys_size_t fixed_sdram(void)
  22. {
  23. struct ccsr_ddr __iomem *ddr =
  24. (struct ccsr_ddr __iomem *)(CONFIG_SYS_FSL_DDR_ADDR);
  25. /*
  26. * Disable memory controller.
  27. */
  28. ddr->cs0_config = 0;
  29. ddr->sdram_cfg = 0;
  30. ddr->cs0_bnds = CONFIG_SYS_DDR_CS0_BNDS;
  31. ddr->cs0_config = CONFIG_SYS_DDR_CS0_CONFIG;
  32. ddr->timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
  33. ddr->timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
  34. ddr->timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
  35. ddr->sdram_mode = CONFIG_SYS_DDR_MODE;
  36. ddr->sdram_interval = CONFIG_SYS_DDR_INTERVAL;
  37. ddr->sdram_cfg_2 = CONFIG_SYS_DDR_CONFIG_2;
  38. ddr->sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CONTROL;
  39. asm ("sync;isync;msync");
  40. udelay(1000);
  41. ddr->sdram_cfg = CONFIG_SYS_DDR_CONFIG;
  42. asm ("sync; isync; msync");
  43. udelay(1000);
  44. if (get_ram_size(0, CONFIG_SYS_SDRAM_SIZE<<20) == CONFIG_SYS_SDRAM_SIZE<<20) {
  45. /*
  46. * OK, size detected -> all done
  47. */
  48. return CONFIG_SYS_SDRAM_SIZE<<20;
  49. }
  50. return 0; /* nothing found ! */
  51. }
  52. #endif
  53. #if defined(CONFIG_SYS_DRAM_TEST)
  54. int testdram (void)
  55. {
  56. uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START;
  57. uint *pend = (uint *) CONFIG_SYS_MEMTEST_END;
  58. uint *p;
  59. printf ("SDRAM test phase 1:\n");
  60. for (p = pstart; p < pend; p++)
  61. *p = 0xaaaaaaaa;
  62. for (p = pstart; p < pend; p++) {
  63. if (*p != 0xaaaaaaaa) {
  64. printf ("SDRAM test fails at: %08x\n", (uint) p);
  65. return 1;
  66. }
  67. }
  68. printf ("SDRAM test phase 2:\n");
  69. for (p = pstart; p < pend; p++)
  70. *p = 0x55555555;
  71. for (p = pstart; p < pend; p++) {
  72. if (*p != 0x55555555) {
  73. printf ("SDRAM test fails at: %08x\n", (uint) p);
  74. return 1;
  75. }
  76. }
  77. printf ("SDRAM test passed.\n");
  78. return 0;
  79. }
  80. #endif