fu540.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2019 Western Digital Corporation or its affiliates.
  4. *
  5. * Authors:
  6. * Anup Patel <anup.patel@wdc.com>
  7. */
  8. #include <common.h>
  9. #include <dm.h>
  10. #include <linux/delay.h>
  11. #include <linux/io.h>
  12. #ifdef CONFIG_MISC_INIT_R
  13. #define FU540_OTP_BASE_ADDR 0x10070000
  14. struct fu540_otp_regs {
  15. u32 pa; /* Address input */
  16. u32 paio; /* Program address input */
  17. u32 pas; /* Program redundancy cell selection input */
  18. u32 pce; /* OTP Macro enable input */
  19. u32 pclk; /* Clock input */
  20. u32 pdin; /* Write data input */
  21. u32 pdout; /* Read data output */
  22. u32 pdstb; /* Deep standby mode enable input (active low) */
  23. u32 pprog; /* Program mode enable input */
  24. u32 ptc; /* Test column enable input */
  25. u32 ptm; /* Test mode enable input */
  26. u32 ptm_rep;/* Repair function test mode enable input */
  27. u32 ptr; /* Test row enable input */
  28. u32 ptrim; /* Repair function enable input */
  29. u32 pwe; /* Write enable input (defines program cycle) */
  30. } __packed;
  31. #define BYTES_PER_FUSE 4
  32. #define NUM_FUSES 0x1000
  33. static int fu540_otp_read(int offset, void *buf, int size)
  34. {
  35. struct fu540_otp_regs *regs = (void __iomem *)FU540_OTP_BASE_ADDR;
  36. unsigned int i;
  37. int fuseidx = offset / BYTES_PER_FUSE;
  38. int fusecount = size / BYTES_PER_FUSE;
  39. u32 fusebuf[fusecount];
  40. /* check bounds */
  41. if (offset < 0 || size < 0)
  42. return -EINVAL;
  43. if (fuseidx >= NUM_FUSES)
  44. return -EINVAL;
  45. if ((fuseidx + fusecount) > NUM_FUSES)
  46. return -EINVAL;
  47. /* init OTP */
  48. writel(0x01, &regs->pdstb); /* wake up from stand-by */
  49. writel(0x01, &regs->ptrim); /* enable repair function */
  50. writel(0x01, &regs->pce); /* enable input */
  51. /* read all requested fuses */
  52. for (i = 0; i < fusecount; i++, fuseidx++) {
  53. writel(fuseidx, &regs->pa);
  54. /* cycle clock to read */
  55. writel(0x01, &regs->pclk);
  56. mdelay(1);
  57. writel(0x00, &regs->pclk);
  58. mdelay(1);
  59. /* read the value */
  60. fusebuf[i] = readl(&regs->pdout);
  61. }
  62. /* shut down */
  63. writel(0, &regs->pce);
  64. writel(0, &regs->ptrim);
  65. writel(0, &regs->pdstb);
  66. /* copy out */
  67. memcpy(buf, fusebuf, size);
  68. return 0;
  69. }
  70. static u32 fu540_read_serialnum(void)
  71. {
  72. int ret;
  73. u32 serial[2] = {0};
  74. for (int i = 0xfe * 4; i > 0; i -= 8) {
  75. ret = fu540_otp_read(i, serial, sizeof(serial));
  76. if (ret) {
  77. printf("%s: error reading from OTP\n", __func__);
  78. break;
  79. }
  80. if (serial[0] == ~serial[1])
  81. return serial[0];
  82. }
  83. return 0;
  84. }
  85. static void fu540_setup_macaddr(u32 serialnum)
  86. {
  87. /* Default MAC address */
  88. unsigned char mac[6] = { 0x70, 0xb3, 0xd5, 0x92, 0xf0, 0x00 };
  89. /*
  90. * We derive our board MAC address by ORing last three bytes
  91. * of board serial number to above default MAC address.
  92. *
  93. * This logic of deriving board MAC address is taken from
  94. * SiFive FSBL and is kept unchanged.
  95. */
  96. mac[5] |= (serialnum >> 0) & 0xff;
  97. mac[4] |= (serialnum >> 8) & 0xff;
  98. mac[3] |= (serialnum >> 16) & 0xff;
  99. /* Update environment variable */
  100. eth_env_set_enetaddr("ethaddr", mac);
  101. }
  102. int misc_init_r(void)
  103. {
  104. u32 serial_num;
  105. char buf[9] = {0};
  106. /* Set ethaddr environment variable from board serial number */
  107. if (!env_get("serial#")) {
  108. serial_num = fu540_read_serialnum();
  109. if (!serial_num) {
  110. WARN(true, "Board serial number should not be 0 !!\n");
  111. return 0;
  112. }
  113. snprintf(buf, sizeof(buf), "%08x", serial_num);
  114. env_set("serial#", buf);
  115. fu540_setup_macaddr(serial_num);
  116. }
  117. return 0;
  118. }
  119. #endif
  120. int board_init(void)
  121. {
  122. /* For now nothing to do here. */
  123. return 0;
  124. }