qos.c 47 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * board/renesas/porter/qos.c
  4. *
  5. * Copyright (C) 2015 Renesas Electronics Corporation
  6. * Copyright (C) 2015 Cogent Embedded, Inc.
  7. *
  8. */
  9. #include <common.h>
  10. #include <asm/processor.h>
  11. #include <asm/mach-types.h>
  12. #include <asm/io.h>
  13. #include <asm/arch/rmobile.h>
  14. /* QoS version 0.240 for ES1 and version 0.334 for ES2 */
  15. #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
  16. enum {
  17. DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
  18. DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
  19. DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
  20. DBSC3_15,
  21. DBSC3_NR,
  22. };
  23. static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
  24. [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
  25. [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
  26. [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
  27. [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
  28. [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
  29. [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
  30. [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
  31. [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
  32. [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
  33. [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
  34. [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
  35. [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
  36. [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
  37. [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
  38. [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
  39. [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
  40. };
  41. static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
  42. [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
  43. [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
  44. [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
  45. [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
  46. [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
  47. [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
  48. [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
  49. [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
  50. [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
  51. [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
  52. [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
  53. [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
  54. [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
  55. [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
  56. [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
  57. [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
  58. };
  59. static u32 dbsc3_1_r_qos_addr[DBSC3_NR] = {
  60. [DBSC3_00] = DBSC3_1_QOS_R0_BASE,
  61. [DBSC3_01] = DBSC3_1_QOS_R1_BASE,
  62. [DBSC3_02] = DBSC3_1_QOS_R2_BASE,
  63. [DBSC3_03] = DBSC3_1_QOS_R3_BASE,
  64. [DBSC3_04] = DBSC3_1_QOS_R4_BASE,
  65. [DBSC3_05] = DBSC3_1_QOS_R5_BASE,
  66. [DBSC3_06] = DBSC3_1_QOS_R6_BASE,
  67. [DBSC3_07] = DBSC3_1_QOS_R7_BASE,
  68. [DBSC3_08] = DBSC3_1_QOS_R8_BASE,
  69. [DBSC3_09] = DBSC3_1_QOS_R9_BASE,
  70. [DBSC3_10] = DBSC3_1_QOS_R10_BASE,
  71. [DBSC3_11] = DBSC3_1_QOS_R11_BASE,
  72. [DBSC3_12] = DBSC3_1_QOS_R12_BASE,
  73. [DBSC3_13] = DBSC3_1_QOS_R13_BASE,
  74. [DBSC3_14] = DBSC3_1_QOS_R14_BASE,
  75. [DBSC3_15] = DBSC3_1_QOS_R15_BASE,
  76. };
  77. static u32 dbsc3_1_w_qos_addr[DBSC3_NR] = {
  78. [DBSC3_00] = DBSC3_1_QOS_W0_BASE,
  79. [DBSC3_01] = DBSC3_1_QOS_W1_BASE,
  80. [DBSC3_02] = DBSC3_1_QOS_W2_BASE,
  81. [DBSC3_03] = DBSC3_1_QOS_W3_BASE,
  82. [DBSC3_04] = DBSC3_1_QOS_W4_BASE,
  83. [DBSC3_05] = DBSC3_1_QOS_W5_BASE,
  84. [DBSC3_06] = DBSC3_1_QOS_W6_BASE,
  85. [DBSC3_07] = DBSC3_1_QOS_W7_BASE,
  86. [DBSC3_08] = DBSC3_1_QOS_W8_BASE,
  87. [DBSC3_09] = DBSC3_1_QOS_W9_BASE,
  88. [DBSC3_10] = DBSC3_1_QOS_W10_BASE,
  89. [DBSC3_11] = DBSC3_1_QOS_W11_BASE,
  90. [DBSC3_12] = DBSC3_1_QOS_W12_BASE,
  91. [DBSC3_13] = DBSC3_1_QOS_W13_BASE,
  92. [DBSC3_14] = DBSC3_1_QOS_W14_BASE,
  93. [DBSC3_15] = DBSC3_1_QOS_W15_BASE,
  94. };
  95. void qos_init(void)
  96. {
  97. int i;
  98. struct rcar_s3c *s3c;
  99. struct rcar_s3c_qos *s3c_qos;
  100. struct rcar_dbsc3_qos *qos_addr;
  101. struct rcar_mxi *mxi;
  102. struct rcar_mxi_qos *mxi_qos;
  103. struct rcar_axi_qos *axi_qos;
  104. /* DBSC DBADJ2 */
  105. writel(0x20042004, DBSC3_0_DBADJ2);
  106. writel(0x20042004, DBSC3_1_DBADJ2);
  107. /* S3C -QoS */
  108. s3c = (struct rcar_s3c *)S3C_BASE;
  109. if (IS_R8A7791_ES2()) {
  110. /* Linear All mode */
  111. /* writel(0x00000000, &s3c->s3cadsplcr); */
  112. /* Linear Linear 0x7000 to 0x7800 mode */
  113. writel(0x00BF1B0C, &s3c->s3cadsplcr);
  114. /* Split Linear 0x6800 t 0x7000 mode */
  115. /* writel(0x00DF1B0C, &s3c->s3cadsplcr); */
  116. /* Ssplit All mode */
  117. /* writel(0x00FF1B0C, &s3c->s3cadsplcr); */
  118. writel(0x1F0B0908, &s3c->s3crorr);
  119. writel(0x1F0C0A08, &s3c->s3cworr);
  120. } else {
  121. writel(0x00FF1B1D, &s3c->s3cadsplcr);
  122. writel(0x1F0D0C0C, &s3c->s3crorr);
  123. writel(0x1F0D0C0A, &s3c->s3cworr);
  124. }
  125. /* QoS Control Registers */
  126. s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
  127. writel(0x00890089, &s3c_qos->s3cqos0);
  128. writel(0x20960010, &s3c_qos->s3cqos1);
  129. writel(0x20302030, &s3c_qos->s3cqos2);
  130. writel(0x20AA2200, &s3c_qos->s3cqos3);
  131. writel(0x00002032, &s3c_qos->s3cqos4);
  132. writel(0x20960010, &s3c_qos->s3cqos5);
  133. writel(0x20302030, &s3c_qos->s3cqos6);
  134. writel(0x20AA2200, &s3c_qos->s3cqos7);
  135. writel(0x00002032, &s3c_qos->s3cqos8);
  136. s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
  137. writel(0x00890089, &s3c_qos->s3cqos0);
  138. writel(0x20960010, &s3c_qos->s3cqos1);
  139. writel(0x20302030, &s3c_qos->s3cqos2);
  140. writel(0x20AA2200, &s3c_qos->s3cqos3);
  141. writel(0x00002032, &s3c_qos->s3cqos4);
  142. writel(0x20960010, &s3c_qos->s3cqos5);
  143. writel(0x20302030, &s3c_qos->s3cqos6);
  144. writel(0x20AA2200, &s3c_qos->s3cqos7);
  145. writel(0x00002032, &s3c_qos->s3cqos8);
  146. s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
  147. writel(0x00820082, &s3c_qos->s3cqos0);
  148. writel(0x20960020, &s3c_qos->s3cqos1);
  149. writel(0x20302030, &s3c_qos->s3cqos2);
  150. writel(0x20AA20DC, &s3c_qos->s3cqos3);
  151. writel(0x00002032, &s3c_qos->s3cqos4);
  152. writel(0x20960020, &s3c_qos->s3cqos5);
  153. writel(0x20302030, &s3c_qos->s3cqos6);
  154. writel(0x20AA20DC, &s3c_qos->s3cqos7);
  155. writel(0x00002032, &s3c_qos->s3cqos8);
  156. s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
  157. writel(0x00820082, &s3c_qos->s3cqos0);
  158. writel(0x20960020, &s3c_qos->s3cqos1);
  159. writel(0x20302030, &s3c_qos->s3cqos2);
  160. writel(0x20AA20FA, &s3c_qos->s3cqos3);
  161. writel(0x00002032, &s3c_qos->s3cqos4);
  162. writel(0x20960020, &s3c_qos->s3cqos5);
  163. writel(0x20302030, &s3c_qos->s3cqos6);
  164. writel(0x20AA20FA, &s3c_qos->s3cqos7);
  165. writel(0x00002032, &s3c_qos->s3cqos8);
  166. /* DBSC -QoS */
  167. /* DBSC0 - Read */
  168. for (i = DBSC3_00; i < DBSC3_NR; i++) {
  169. qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
  170. writel(0x00000002, &qos_addr->dblgcnt);
  171. writel(0x00002096, &qos_addr->dbtmval0);
  172. writel(0x00002064, &qos_addr->dbtmval1);
  173. writel(0x00002032, &qos_addr->dbtmval2);
  174. writel(0x00001FB0, &qos_addr->dbtmval3);
  175. writel(0x00000001, &qos_addr->dbrqctr);
  176. writel(0x00002078, &qos_addr->dbthres0);
  177. writel(0x0000204B, &qos_addr->dbthres1);
  178. writel(0x0000201E, &qos_addr->dbthres2);
  179. writel(0x00000001, &qos_addr->dblgqon);
  180. }
  181. /* DBSC0 - Write */
  182. for (i = DBSC3_00; i < DBSC3_NR; i++) {
  183. qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
  184. writel(0x00000002, &qos_addr->dblgcnt);
  185. writel(0x00002096, &qos_addr->dbtmval0);
  186. writel(0x00002064, &qos_addr->dbtmval1);
  187. writel(0x00002050, &qos_addr->dbtmval2);
  188. writel(0x0000203A, &qos_addr->dbtmval3);
  189. writel(0x00000001, &qos_addr->dbrqctr);
  190. writel(0x00002078, &qos_addr->dbthres0);
  191. writel(0x0000204B, &qos_addr->dbthres1);
  192. writel(0x0000203C, &qos_addr->dbthres2);
  193. writel(0x00000001, &qos_addr->dblgqon);
  194. }
  195. /* DBSC1 - Read */
  196. for (i = DBSC3_00; i < DBSC3_NR; i++) {
  197. qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_r_qos_addr[i];
  198. writel(0x00000002, &qos_addr->dblgcnt);
  199. writel(0x00002096, &qos_addr->dbtmval0);
  200. writel(0x00002064, &qos_addr->dbtmval1);
  201. writel(0x00002032, &qos_addr->dbtmval2);
  202. writel(0x00001FB0, &qos_addr->dbtmval3);
  203. writel(0x00000001, &qos_addr->dbrqctr);
  204. writel(0x00002078, &qos_addr->dbthres0);
  205. writel(0x0000204B, &qos_addr->dbthres1);
  206. writel(0x0000201E, &qos_addr->dbthres2);
  207. writel(0x00000001, &qos_addr->dblgqon);
  208. }
  209. /* DBSC1 - Write */
  210. for (i = DBSC3_00; i < DBSC3_NR; i++) {
  211. qos_addr = (struct rcar_dbsc3_qos *)dbsc3_1_w_qos_addr[i];
  212. writel(0x00000002, &qos_addr->dblgcnt);
  213. writel(0x00002096, &qos_addr->dbtmval0);
  214. writel(0x00002064, &qos_addr->dbtmval1);
  215. writel(0x00002050, &qos_addr->dbtmval2);
  216. writel(0x0000203A, &qos_addr->dbtmval3);
  217. writel(0x00000001, &qos_addr->dbrqctr);
  218. writel(0x00002078, &qos_addr->dbthres0);
  219. writel(0x0000204B, &qos_addr->dbthres1);
  220. writel(0x0000203C, &qos_addr->dbthres2);
  221. writel(0x00000001, &qos_addr->dblgqon);
  222. }
  223. /* CCI-400 -QoS */
  224. writel(0x20001000, CCI_400_MAXOT_1);
  225. writel(0x20001000, CCI_400_MAXOT_2);
  226. writel(0x0000000C, CCI_400_QOSCNTL_1);
  227. writel(0x0000000C, CCI_400_QOSCNTL_2);
  228. /* MXI -QoS */
  229. /* Transaction Control (MXI) */
  230. mxi = (struct rcar_mxi *)MXI_BASE;
  231. writel(0x00000013, &mxi->mxrtcr);
  232. writel(0x00000013, &mxi->mxwtcr);
  233. /* QoS Control (MXI) */
  234. mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
  235. writel(0x0000000C, &mxi_qos->vspdu0);
  236. writel(0x0000000C, &mxi_qos->vspdu1);
  237. writel(0x0000000E, &mxi_qos->du0);
  238. writel(0x0000000D, &mxi_qos->du1);
  239. /* AXI -QoS */
  240. /* Transaction Control (MXI) */
  241. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
  242. writel(0x00000002, &axi_qos->qosconf);
  243. writel(0x00002245, &axi_qos->qosctset0);
  244. writel(0x00002096, &axi_qos->qosctset1);
  245. writel(0x00002030, &axi_qos->qosctset2);
  246. writel(0x00002030, &axi_qos->qosctset3);
  247. writel(0x00000001, &axi_qos->qosreqctr);
  248. writel(0x00002064, &axi_qos->qosthres0);
  249. writel(0x00002004, &axi_qos->qosthres1);
  250. writel(0x00000000, &axi_qos->qosthres2);
  251. writel(0x00000001, &axi_qos->qosqon);
  252. axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
  253. writel(0x00000000, &axi_qos->qosconf);
  254. writel(0x000020A6, &axi_qos->qosctset0);
  255. writel(0x00000001, &axi_qos->qosreqctr);
  256. writel(0x00002064, &axi_qos->qosthres0);
  257. writel(0x00002004, &axi_qos->qosthres1);
  258. writel(0x00000000, &axi_qos->qosthres2);
  259. writel(0x00000001, &axi_qos->qosqon);
  260. axi_qos = (struct rcar_axi_qos *)SYS_AXI_G2D_BASE;
  261. writel(0x00000000, &axi_qos->qosconf);
  262. writel(0x000020A6, &axi_qos->qosctset0);
  263. writel(0x00000001, &axi_qos->qosreqctr);
  264. writel(0x00002064, &axi_qos->qosthres0);
  265. writel(0x00002004, &axi_qos->qosthres1);
  266. writel(0x00000000, &axi_qos->qosthres2);
  267. writel(0x00000001, &axi_qos->qosqon);
  268. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP0_BASE;
  269. writel(0x00000000, &axi_qos->qosconf);
  270. writel(0x00002021, &axi_qos->qosctset0);
  271. writel(0x00000001, &axi_qos->qosreqctr);
  272. writel(0x00002064, &axi_qos->qosthres0);
  273. writel(0x00002004, &axi_qos->qosthres1);
  274. writel(0x00000000, &axi_qos->qosthres2);
  275. writel(0x00000001, &axi_qos->qosqon);
  276. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMP1_BASE;
  277. writel(0x00000000, &axi_qos->qosconf);
  278. writel(0x00002037, &axi_qos->qosctset0);
  279. writel(0x00000001, &axi_qos->qosreqctr);
  280. writel(0x00002064, &axi_qos->qosthres0);
  281. writel(0x00002004, &axi_qos->qosthres1);
  282. writel(0x00000000, &axi_qos->qosthres2);
  283. writel(0x00000001, &axi_qos->qosqon);
  284. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
  285. writel(0x00000002, &axi_qos->qosconf);
  286. writel(0x00002245, &axi_qos->qosctset0);
  287. writel(0x00002096, &axi_qos->qosctset1);
  288. writel(0x00002030, &axi_qos->qosctset2);
  289. writel(0x00002030, &axi_qos->qosctset3);
  290. writel(0x00000001, &axi_qos->qosreqctr);
  291. writel(0x00002064, &axi_qos->qosthres0);
  292. writel(0x00002004, &axi_qos->qosthres1);
  293. writel(0x00000000, &axi_qos->qosthres2);
  294. writel(0x00000001, &axi_qos->qosqon);
  295. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
  296. writel(0x00000002, &axi_qos->qosconf);
  297. writel(0x00002245, &axi_qos->qosctset0);
  298. writel(0x00002096, &axi_qos->qosctset1);
  299. writel(0x00002030, &axi_qos->qosctset2);
  300. writel(0x00002030, &axi_qos->qosctset3);
  301. writel(0x00000001, &axi_qos->qosreqctr);
  302. writel(0x00002064, &axi_qos->qosthres0);
  303. writel(0x00002004, &axi_qos->qosthres1);
  304. writel(0x00000000, &axi_qos->qosthres2);
  305. writel(0x00000001, &axi_qos->qosqon);
  306. axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
  307. writel(0x00000002, &axi_qos->qosconf);
  308. writel(0x00002245, &axi_qos->qosctset0);
  309. writel(0x00002096, &axi_qos->qosctset1);
  310. writel(0x00002030, &axi_qos->qosctset2);
  311. writel(0x00002030, &axi_qos->qosctset3);
  312. writel(0x00000001, &axi_qos->qosreqctr);
  313. writel(0x00002064, &axi_qos->qosthres0);
  314. writel(0x00002004, &axi_qos->qosthres1);
  315. writel(0x00000000, &axi_qos->qosthres2);
  316. writel(0x00000001, &axi_qos->qosqon);
  317. axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
  318. writel(0x00000000, &axi_qos->qosconf);
  319. writel(0x0000214C, &axi_qos->qosctset0);
  320. writel(0x00000001, &axi_qos->qosreqctr);
  321. writel(0x00002064, &axi_qos->qosthres0);
  322. writel(0x00002004, &axi_qos->qosthres1);
  323. writel(0x00000000, &axi_qos->qosthres2);
  324. writel(0x00000001, &axi_qos->qosqon);
  325. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
  326. writel(0x00000001, &axi_qos->qosconf);
  327. writel(0x00002004, &axi_qos->qosctset0);
  328. writel(0x00002096, &axi_qos->qosctset1);
  329. writel(0x00002030, &axi_qos->qosctset2);
  330. writel(0x00002030, &axi_qos->qosctset3);
  331. writel(0x00000001, &axi_qos->qosreqctr);
  332. writel(0x00002064, &axi_qos->qosthres0);
  333. writel(0x00002004, &axi_qos->qosthres1);
  334. writel(0x00000000, &axi_qos->qosthres2);
  335. writel(0x00000001, &axi_qos->qosqon);
  336. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
  337. writel(0x00000001, &axi_qos->qosconf);
  338. writel(0x00002004, &axi_qos->qosctset0);
  339. writel(0x00002096, &axi_qos->qosctset1);
  340. writel(0x00002030, &axi_qos->qosctset2);
  341. writel(0x00002030, &axi_qos->qosctset3);
  342. writel(0x00000001, &axi_qos->qosreqctr);
  343. writel(0x00002064, &axi_qos->qosthres0);
  344. writel(0x00002004, &axi_qos->qosthres1);
  345. writel(0x00000000, &axi_qos->qosthres2);
  346. writel(0x00000001, &axi_qos->qosqon);
  347. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUR_BASE;
  348. writel(0x00000001, &axi_qos->qosconf);
  349. writel(0x00002004, &axi_qos->qosctset0);
  350. writel(0x00002096, &axi_qos->qosctset1);
  351. writel(0x00002030, &axi_qos->qosctset2);
  352. writel(0x00002030, &axi_qos->qosctset3);
  353. writel(0x00000001, &axi_qos->qosreqctr);
  354. writel(0x00002064, &axi_qos->qosthres0);
  355. writel(0x00002004, &axi_qos->qosthres1);
  356. writel(0x00000000, &axi_qos->qosthres2);
  357. writel(0x00000001, &axi_qos->qosqon);
  358. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
  359. writel(0x00000001, &axi_qos->qosconf);
  360. writel(0x00002004, &axi_qos->qosctset0);
  361. writel(0x00002096, &axi_qos->qosctset1);
  362. writel(0x00002030, &axi_qos->qosctset2);
  363. writel(0x00002030, &axi_qos->qosctset3);
  364. writel(0x00000001, &axi_qos->qosreqctr);
  365. writel(0x00002064, &axi_qos->qosthres0);
  366. writel(0x00002004, &axi_qos->qosthres1);
  367. writel(0x00000000, &axi_qos->qosthres2);
  368. writel(0x00000001, &axi_qos->qosqon);
  369. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
  370. writel(0x00000001, &axi_qos->qosconf);
  371. writel(0x00002004, &axi_qos->qosctset0);
  372. writel(0x00002096, &axi_qos->qosctset1);
  373. writel(0x00002030, &axi_qos->qosctset2);
  374. writel(0x00002030, &axi_qos->qosctset3);
  375. writel(0x00000001, &axi_qos->qosreqctr);
  376. writel(0x00002064, &axi_qos->qosthres0);
  377. writel(0x00002004, &axi_qos->qosthres1);
  378. writel(0x00000000, &axi_qos->qosthres2);
  379. writel(0x00000001, &axi_qos->qosqon);
  380. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB0_BASE;
  381. writel(0x00000000, &axi_qos->qosconf);
  382. writel(0x00002021, &axi_qos->qosctset0);
  383. writel(0x00000001, &axi_qos->qosreqctr);
  384. writel(0x00002064, &axi_qos->qosthres0);
  385. writel(0x00002004, &axi_qos->qosthres1);
  386. writel(0x00000000, &axi_qos->qosthres2);
  387. writel(0x00000001, &axi_qos->qosqon);
  388. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MTSB1_BASE;
  389. writel(0x00000000, &axi_qos->qosconf);
  390. writel(0x00002021, &axi_qos->qosctset0);
  391. writel(0x00000001, &axi_qos->qosreqctr);
  392. writel(0x00002064, &axi_qos->qosthres0);
  393. writel(0x00002004, &axi_qos->qosthres1);
  394. writel(0x00000000, &axi_qos->qosthres2);
  395. writel(0x00000001, &axi_qos->qosqon);
  396. axi_qos = (struct rcar_axi_qos *)SYS_AXI_PCI_BASE;
  397. writel(0x00000000, &axi_qos->qosconf);
  398. writel(0x0000214C, &axi_qos->qosctset0);
  399. writel(0x00000001, &axi_qos->qosreqctr);
  400. writel(0x00002064, &axi_qos->qosthres0);
  401. writel(0x00002004, &axi_qos->qosthres1);
  402. writel(0x00000000, &axi_qos->qosthres2);
  403. writel(0x00000001, &axi_qos->qosqon);
  404. axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
  405. writel(0x00000002, &axi_qos->qosconf);
  406. writel(0x00002245, &axi_qos->qosctset0);
  407. writel(0x00002096, &axi_qos->qosctset1);
  408. writel(0x00002030, &axi_qos->qosctset2);
  409. writel(0x00002030, &axi_qos->qosctset3);
  410. writel(0x00000001, &axi_qos->qosreqctr);
  411. writel(0x00002064, &axi_qos->qosthres0);
  412. writel(0x00002004, &axi_qos->qosthres1);
  413. writel(0x00000000, &axi_qos->qosthres2);
  414. writel(0x00000001, &axi_qos->qosqon);
  415. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
  416. writel(0x00000000, &axi_qos->qosconf);
  417. writel(0x000020A6, &axi_qos->qosctset0);
  418. writel(0x00000001, &axi_qos->qosreqctr);
  419. writel(0x00002064, &axi_qos->qosthres0);
  420. writel(0x00002004, &axi_qos->qosthres1);
  421. writel(0x00000000, &axi_qos->qosthres2);
  422. writel(0x00000001, &axi_qos->qosqon);
  423. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
  424. writel(0x00000000, &axi_qos->qosconf);
  425. writel(0x000020A6, &axi_qos->qosctset0);
  426. writel(0x00000001, &axi_qos->qosreqctr);
  427. writel(0x00002064, &axi_qos->qosthres0);
  428. writel(0x00002004, &axi_qos->qosthres1);
  429. writel(0x00000000, &axi_qos->qosthres2);
  430. writel(0x00000001, &axi_qos->qosqon);
  431. axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
  432. writel(0x00000000, &axi_qos->qosconf);
  433. writel(0x00002053, &axi_qos->qosctset0);
  434. writel(0x00000001, &axi_qos->qosreqctr);
  435. writel(0x00002064, &axi_qos->qosthres0);
  436. writel(0x00002004, &axi_qos->qosthres1);
  437. writel(0x00000000, &axi_qos->qosthres2);
  438. writel(0x00000001, &axi_qos->qosqon);
  439. axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB21_BASE;
  440. writel(0x00000000, &axi_qos->qosconf);
  441. writel(0x00002053, &axi_qos->qosctset0);
  442. writel(0x00000001, &axi_qos->qosreqctr);
  443. writel(0x00002064, &axi_qos->qosthres0);
  444. writel(0x00002004, &axi_qos->qosthres1);
  445. writel(0x00000000, &axi_qos->qosthres2);
  446. writel(0x00000001, &axi_qos->qosqon);
  447. axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
  448. writel(0x00000000, &axi_qos->qosconf);
  449. writel(0x00002053, &axi_qos->qosctset0);
  450. writel(0x00000001, &axi_qos->qosreqctr);
  451. writel(0x00002064, &axi_qos->qosthres0);
  452. writel(0x00002004, &axi_qos->qosthres1);
  453. writel(0x00000000, &axi_qos->qosthres2);
  454. writel(0x00000001, &axi_qos->qosqon);
  455. axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB30_BASE;
  456. writel(0x00000000, &axi_qos->qosconf);
  457. writel(0x0000214C, &axi_qos->qosctset0);
  458. writel(0x00000001, &axi_qos->qosreqctr);
  459. writel(0x00002064, &axi_qos->qosthres0);
  460. writel(0x00002004, &axi_qos->qosthres1);
  461. writel(0x00000000, &axi_qos->qosthres2);
  462. writel(0x00000001, &axi_qos->qosqon);
  463. axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE;
  464. writel(0x00000002, &axi_qos->qosconf);
  465. writel(0x00002245, &axi_qos->qosctset0);
  466. writel(0x00000001, &axi_qos->qosreqctr);
  467. writel(0x00002064, &axi_qos->qosthres0);
  468. writel(0x00002004, &axi_qos->qosthres1);
  469. writel(0x00000000, &axi_qos->qosthres2);
  470. writel(0x00000001, &axi_qos->qosqon);
  471. axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE;
  472. writel(0x00000000, &axi_qos->qosconf);
  473. writel(0x00002029, &axi_qos->qosctset0);
  474. writel(0x00000001, &axi_qos->qosreqctr);
  475. writel(0x00002064, &axi_qos->qosthres0);
  476. writel(0x00002004, &axi_qos->qosthres1);
  477. writel(0x00000000, &axi_qos->qosthres2);
  478. writel(0x00000001, &axi_qos->qosqon);
  479. axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE;
  480. writel(0x00000002, &axi_qos->qosconf);
  481. writel(0x00002245, &axi_qos->qosctset0);
  482. writel(0x00000001, &axi_qos->qosreqctr);
  483. writel(0x00002064, &axi_qos->qosthres0);
  484. writel(0x00002004, &axi_qos->qosthres1);
  485. writel(0x00000000, &axi_qos->qosthres2);
  486. writel(0x00000001, &axi_qos->qosqon);
  487. axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE;
  488. writel(0x00000000, &axi_qos->qosconf);
  489. writel(0x00002053, &axi_qos->qosctset0);
  490. writel(0x00000001, &axi_qos->qosreqctr);
  491. writel(0x00002064, &axi_qos->qosthres0);
  492. writel(0x00002004, &axi_qos->qosthres1);
  493. writel(0x00000000, &axi_qos->qosthres2);
  494. writel(0x00000001, &axi_qos->qosqon);
  495. axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE;
  496. writel(0x00000000, &axi_qos->qosconf);
  497. writel(0x000020A6, &axi_qos->qosctset0);
  498. writel(0x00000001, &axi_qos->qosreqctr);
  499. writel(0x00002064, &axi_qos->qosthres0);
  500. writel(0x00002004, &axi_qos->qosthres1);
  501. writel(0x00000000, &axi_qos->qosthres2);
  502. writel(0x00000001, &axi_qos->qosqon);
  503. axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE;
  504. writel(0x00000000, &axi_qos->qosconf);
  505. writel(0x00002053, &axi_qos->qosctset0);
  506. writel(0x00000001, &axi_qos->qosreqctr);
  507. writel(0x00002064, &axi_qos->qosthres0);
  508. writel(0x00002004, &axi_qos->qosthres1);
  509. writel(0x00000000, &axi_qos->qosthres2);
  510. writel(0x00000001, &axi_qos->qosqon);
  511. axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE;
  512. writel(0x00000002, &axi_qos->qosconf);
  513. writel(0x00002245, &axi_qos->qosctset0);
  514. writel(0x00000001, &axi_qos->qosreqctr);
  515. writel(0x00002064, &axi_qos->qosthres0);
  516. writel(0x00002004, &axi_qos->qosthres1);
  517. writel(0x00000000, &axi_qos->qosthres2);
  518. writel(0x00000001, &axi_qos->qosqon);
  519. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT0_BASE;
  520. writel(0x00000000, &axi_qos->qosconf);
  521. writel(0x00002053, &axi_qos->qosctset0);
  522. writel(0x00000001, &axi_qos->qosreqctr);
  523. writel(0x00002064, &axi_qos->qosthres0);
  524. writel(0x00002004, &axi_qos->qosthres1);
  525. writel(0x00000000, &axi_qos->qosthres2);
  526. writel(0x00000001, &axi_qos->qosqon);
  527. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SAT1_BASE;
  528. writel(0x00000000, &axi_qos->qosconf);
  529. writel(0x00002053, &axi_qos->qosctset0);
  530. writel(0x00000001, &axi_qos->qosreqctr);
  531. writel(0x00002064, &axi_qos->qosthres0);
  532. writel(0x00002004, &axi_qos->qosthres1);
  533. writel(0x00000000, &axi_qos->qosthres2);
  534. writel(0x00000001, &axi_qos->qosqon);
  535. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE;
  536. writel(0x00000000, &axi_qos->qosconf);
  537. writel(0x0000214C, &axi_qos->qosctset0);
  538. writel(0x00000001, &axi_qos->qosreqctr);
  539. writel(0x00002064, &axi_qos->qosthres0);
  540. writel(0x00002004, &axi_qos->qosthres1);
  541. writel(0x00000000, &axi_qos->qosthres2);
  542. writel(0x00000001, &axi_qos->qosqon);
  543. axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE;
  544. writel(0x00000000, &axi_qos->qosconf);
  545. writel(0x0000214C, &axi_qos->qosctset0);
  546. writel(0x00000001, &axi_qos->qosreqctr);
  547. writel(0x00002064, &axi_qos->qosthres0);
  548. writel(0x00002004, &axi_qos->qosthres1);
  549. writel(0x00000000, &axi_qos->qosthres2);
  550. writel(0x00000001, &axi_qos->qosqon);
  551. axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE;
  552. writel(0x00000000, &axi_qos->qosconf);
  553. writel(0x000020A6, &axi_qos->qosctset0);
  554. writel(0x00000001, &axi_qos->qosreqctr);
  555. writel(0x00002064, &axi_qos->qosthres0);
  556. writel(0x00002004, &axi_qos->qosthres1);
  557. writel(0x00000000, &axi_qos->qosthres2);
  558. writel(0x00000001, &axi_qos->qosqon);
  559. axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE;
  560. writel(0x00000000, &axi_qos->qosconf);
  561. writel(0x00002053, &axi_qos->qosctset0);
  562. writel(0x00000001, &axi_qos->qosreqctr);
  563. writel(0x00002064, &axi_qos->qosthres0);
  564. writel(0x00002004, &axi_qos->qosthres1);
  565. writel(0x00000000, &axi_qos->qosthres2);
  566. writel(0x00000001, &axi_qos->qosqon);
  567. axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE;
  568. writel(0x00000000, &axi_qos->qosconf);
  569. writel(0x00002053, &axi_qos->qosctset0);
  570. writel(0x00000001, &axi_qos->qosreqctr);
  571. writel(0x00002064, &axi_qos->qosthres0);
  572. writel(0x00002004, &axi_qos->qosthres1);
  573. writel(0x00000000, &axi_qos->qosthres2);
  574. writel(0x00000001, &axi_qos->qosqon);
  575. /* QoS Register (RT-AXI) */
  576. axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
  577. writel(0x00000000, &axi_qos->qosconf);
  578. writel(0x00002053, &axi_qos->qosctset0);
  579. writel(0x00002096, &axi_qos->qosctset1);
  580. writel(0x00002030, &axi_qos->qosctset2);
  581. writel(0x00002030, &axi_qos->qosctset3);
  582. writel(0x00000001, &axi_qos->qosreqctr);
  583. writel(0x00002064, &axi_qos->qosthres0);
  584. writel(0x00002004, &axi_qos->qosthres1);
  585. writel(0x00000000, &axi_qos->qosthres2);
  586. writel(0x00000001, &axi_qos->qosqon);
  587. axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE;
  588. writel(0x00000000, &axi_qos->qosconf);
  589. writel(0x00002053, &axi_qos->qosctset0);
  590. writel(0x00002096, &axi_qos->qosctset1);
  591. writel(0x00002030, &axi_qos->qosctset2);
  592. writel(0x00002030, &axi_qos->qosctset3);
  593. writel(0x00000001, &axi_qos->qosreqctr);
  594. writel(0x00002064, &axi_qos->qosthres0);
  595. writel(0x00002004, &axi_qos->qosthres1);
  596. writel(0x00000000, &axi_qos->qosthres2);
  597. writel(0x00000001, &axi_qos->qosqon);
  598. axi_qos = (struct rcar_axi_qos *)RT_AXI_RDM_BASE;
  599. writel(0x00000000, &axi_qos->qosconf);
  600. writel(0x00002299, &axi_qos->qosctset0);
  601. writel(0x00000001, &axi_qos->qosreqctr);
  602. writel(0x00002064, &axi_qos->qosthres0);
  603. writel(0x00002004, &axi_qos->qosthres1);
  604. writel(0x00000000, &axi_qos->qosthres2);
  605. writel(0x00000001, &axi_qos->qosqon);
  606. axi_qos = (struct rcar_axi_qos *)RT_AXI_RDS_BASE;
  607. writel(0x00000000, &axi_qos->qosconf);
  608. writel(0x00002029, &axi_qos->qosctset0);
  609. writel(0x00000001, &axi_qos->qosreqctr);
  610. writel(0x00002064, &axi_qos->qosthres0);
  611. writel(0x00002004, &axi_qos->qosthres1);
  612. writel(0x00000000, &axi_qos->qosthres2);
  613. writel(0x00000001, &axi_qos->qosqon);
  614. axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
  615. writel(0x00000002, &axi_qos->qosconf);
  616. writel(0x00002245, &axi_qos->qosctset0);
  617. writel(0x00002096, &axi_qos->qosctset1);
  618. writel(0x00002030, &axi_qos->qosctset2);
  619. writel(0x00002030, &axi_qos->qosctset3);
  620. writel(0x00000001, &axi_qos->qosreqctr);
  621. writel(0x00002064, &axi_qos->qosthres0);
  622. writel(0x00002004, &axi_qos->qosthres1);
  623. writel(0x00000000, &axi_qos->qosthres2);
  624. writel(0x00000001, &axi_qos->qosqon);
  625. axi_qos = (struct rcar_axi_qos *)RT_AXI_STPRO_BASE;
  626. writel(0x00000000, &axi_qos->qosconf);
  627. writel(0x00002029, &axi_qos->qosctset0);
  628. writel(0x00002096, &axi_qos->qosctset1);
  629. writel(0x00002030, &axi_qos->qosctset2);
  630. writel(0x00002030, &axi_qos->qosctset3);
  631. writel(0x00000001, &axi_qos->qosreqctr);
  632. writel(0x00002064, &axi_qos->qosthres0);
  633. writel(0x00002004, &axi_qos->qosthres1);
  634. writel(0x00000000, &axi_qos->qosthres2);
  635. writel(0x00000001, &axi_qos->qosqon);
  636. axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE;
  637. writel(0x00000002, &axi_qos->qosconf);
  638. writel(0x00002245, &axi_qos->qosctset0);
  639. writel(0x00000001, &axi_qos->qosreqctr);
  640. writel(0x00002064, &axi_qos->qosthres0);
  641. writel(0x00002004, &axi_qos->qosthres1);
  642. writel(0x00000000, &axi_qos->qosthres2);
  643. writel(0x00000001, &axi_qos->qosqon);
  644. /* QoS Register (MP-AXI) */
  645. axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
  646. writel(0x00000000, &axi_qos->qosconf);
  647. writel(0x00002037, &axi_qos->qosctset0);
  648. writel(0x00000001, &axi_qos->qosreqctr);
  649. writel(0x00002064, &axi_qos->qosthres0);
  650. writel(0x00002004, &axi_qos->qosthres1);
  651. writel(0x00000000, &axi_qos->qosthres2);
  652. writel(0x00000001, &axi_qos->qosqon);
  653. axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
  654. writel(0x00000001, &axi_qos->qosconf);
  655. writel(0x00002014, &axi_qos->qosctset0);
  656. writel(0x00000040, &axi_qos->qosreqctr);
  657. writel(0x00002064, &axi_qos->qosthres0);
  658. writel(0x00002004, &axi_qos->qosthres1);
  659. writel(0x00000000, &axi_qos->qosthres2);
  660. writel(0x00000001, &axi_qos->qosqon);
  661. axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
  662. writel(0x00000001, &axi_qos->qosconf);
  663. writel(0x00002014, &axi_qos->qosctset0);
  664. writel(0x00000040, &axi_qos->qosreqctr);
  665. writel(0x00002064, &axi_qos->qosthres0);
  666. writel(0x00002004, &axi_qos->qosthres1);
  667. writel(0x00000000, &axi_qos->qosthres2);
  668. writel(0x00000001, &axi_qos->qosqon);
  669. axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
  670. writel(0x00000001, &axi_qos->qosconf);
  671. writel(0x00001FF0, &axi_qos->qosctset0);
  672. writel(0x00000020, &axi_qos->qosreqctr);
  673. writel(0x00002064, &axi_qos->qosthres0);
  674. writel(0x00002004, &axi_qos->qosthres1);
  675. writel(0x00002001, &axi_qos->qosthres2);
  676. writel(0x00000001, &axi_qos->qosqon);
  677. axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
  678. writel(0x00000001, &axi_qos->qosconf);
  679. writel(0x00002004, &axi_qos->qosctset0);
  680. writel(0x00002096, &axi_qos->qosctset1);
  681. writel(0x00002030, &axi_qos->qosctset2);
  682. writel(0x00002030, &axi_qos->qosctset3);
  683. writel(0x00000001, &axi_qos->qosreqctr);
  684. writel(0x00002064, &axi_qos->qosthres0);
  685. writel(0x00002004, &axi_qos->qosthres1);
  686. writel(0x00000000, &axi_qos->qosthres2);
  687. writel(0x00000001, &axi_qos->qosqon);
  688. axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
  689. writel(0x00000000, &axi_qos->qosconf);
  690. writel(0x00002053, &axi_qos->qosctset0);
  691. writel(0x00000001, &axi_qos->qosreqctr);
  692. writel(0x00002064, &axi_qos->qosthres0);
  693. writel(0x00002004, &axi_qos->qosthres1);
  694. writel(0x00000000, &axi_qos->qosthres2);
  695. writel(0x00000001, &axi_qos->qosqon);
  696. axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
  697. writel(0x00000000, &axi_qos->qosconf);
  698. writel(0x0000206E, &axi_qos->qosctset0);
  699. writel(0x00000001, &axi_qos->qosreqctr);
  700. writel(0x00002064, &axi_qos->qosthres0);
  701. writel(0x00002004, &axi_qos->qosthres1);
  702. writel(0x00000000, &axi_qos->qosthres2);
  703. writel(0x00000001, &axi_qos->qosqon);
  704. /* QoS Register (SYS-AXI256) */
  705. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
  706. writel(0x00000002, &axi_qos->qosconf);
  707. if (IS_R8A7791_ES2())
  708. writel(0x000020EB, &axi_qos->qosctset0);
  709. else
  710. writel(0x00002245, &axi_qos->qosctset0);
  711. writel(0x00002096, &axi_qos->qosctset1);
  712. writel(0x00002030, &axi_qos->qosctset2);
  713. writel(0x00002030, &axi_qos->qosctset3);
  714. writel(0x00000001, &axi_qos->qosreqctr);
  715. writel(0x00002064, &axi_qos->qosthres0);
  716. writel(0x00002004, &axi_qos->qosthres1);
  717. writel(0x00000000, &axi_qos->qosthres2);
  718. writel(0x00000001, &axi_qos->qosqon);
  719. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
  720. writel(0x00000002, &axi_qos->qosconf);
  721. if (IS_R8A7791_ES2())
  722. writel(0x000020EB, &axi_qos->qosctset0);
  723. else
  724. writel(0x00002245, &axi_qos->qosctset0);
  725. writel(0x00002096, &axi_qos->qosctset1);
  726. writel(0x00002030, &axi_qos->qosctset2);
  727. writel(0x00002030, &axi_qos->qosctset3);
  728. writel(0x00000001, &axi_qos->qosreqctr);
  729. writel(0x00002064, &axi_qos->qosthres0);
  730. writel(0x00002004, &axi_qos->qosthres1);
  731. writel(0x00000000, &axi_qos->qosthres2);
  732. writel(0x00000001, &axi_qos->qosqon);
  733. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
  734. writel(0x00000002, &axi_qos->qosconf);
  735. if (IS_R8A7791_ES2())
  736. writel(0x000020EB, &axi_qos->qosctset0);
  737. else
  738. writel(0x00002245, &axi_qos->qosctset0);
  739. writel(0x00002096, &axi_qos->qosctset1);
  740. writel(0x00002030, &axi_qos->qosctset2);
  741. writel(0x00002030, &axi_qos->qosctset3);
  742. writel(0x00000001, &axi_qos->qosreqctr);
  743. writel(0x00002064, &axi_qos->qosthres0);
  744. writel(0x00002004, &axi_qos->qosthres1);
  745. writel(0x00000000, &axi_qos->qosthres2);
  746. writel(0x00000001, &axi_qos->qosqon);
  747. axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
  748. writel(0x00000002, &axi_qos->qosconf);
  749. writel(0x00002245, &axi_qos->qosctset0);
  750. writel(0x00002096, &axi_qos->qosctset1);
  751. writel(0x00002030, &axi_qos->qosctset2);
  752. writel(0x00002030, &axi_qos->qosctset3);
  753. writel(0x00000001, &axi_qos->qosreqctr);
  754. writel(0x00002064, &axi_qos->qosthres0);
  755. writel(0x00002004, &axi_qos->qosthres1);
  756. writel(0x00000000, &axi_qos->qosthres2);
  757. writel(0x00000001, &axi_qos->qosqon);
  758. /* QoS Register (CCI-AXI) */
  759. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
  760. writel(0x00000001, &axi_qos->qosconf);
  761. writel(0x00002004, &axi_qos->qosctset0);
  762. writel(0x00002096, &axi_qos->qosctset1);
  763. writel(0x00002030, &axi_qos->qosctset2);
  764. writel(0x00002030, &axi_qos->qosctset3);
  765. writel(0x00000001, &axi_qos->qosreqctr);
  766. writel(0x00002064, &axi_qos->qosthres0);
  767. writel(0x00002004, &axi_qos->qosthres1);
  768. writel(0x00000000, &axi_qos->qosthres2);
  769. writel(0x00000001, &axi_qos->qosqon);
  770. axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
  771. writel(0x00000002, &axi_qos->qosconf);
  772. writel(0x00002245, &axi_qos->qosctset0);
  773. writel(0x00002096, &axi_qos->qosctset1);
  774. writel(0x00002030, &axi_qos->qosctset2);
  775. writel(0x00002030, &axi_qos->qosctset3);
  776. writel(0x00000001, &axi_qos->qosreqctr);
  777. writel(0x00002064, &axi_qos->qosthres0);
  778. writel(0x00002004, &axi_qos->qosthres1);
  779. writel(0x00000000, &axi_qos->qosthres2);
  780. writel(0x00000001, &axi_qos->qosqon);
  781. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
  782. writel(0x00000001, &axi_qos->qosconf);
  783. writel(0x00002004, &axi_qos->qosctset0);
  784. writel(0x00002096, &axi_qos->qosctset1);
  785. writel(0x00002030, &axi_qos->qosctset2);
  786. writel(0x00002030, &axi_qos->qosctset3);
  787. writel(0x00000001, &axi_qos->qosreqctr);
  788. writel(0x00002064, &axi_qos->qosthres0);
  789. writel(0x00002004, &axi_qos->qosthres1);
  790. writel(0x00000000, &axi_qos->qosthres2);
  791. writel(0x00000001, &axi_qos->qosqon);
  792. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
  793. writel(0x00000001, &axi_qos->qosconf);
  794. writel(0x00002004, &axi_qos->qosctset0);
  795. writel(0x00002096, &axi_qos->qosctset1);
  796. writel(0x00002030, &axi_qos->qosctset2);
  797. writel(0x00002030, &axi_qos->qosctset3);
  798. writel(0x00000001, &axi_qos->qosreqctr);
  799. writel(0x00002064, &axi_qos->qosthres0);
  800. writel(0x00002004, &axi_qos->qosthres1);
  801. writel(0x00000000, &axi_qos->qosthres2);
  802. writel(0x00000001, &axi_qos->qosqon);
  803. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
  804. writel(0x00000001, &axi_qos->qosconf);
  805. writel(0x00002004, &axi_qos->qosctset0);
  806. writel(0x00002096, &axi_qos->qosctset1);
  807. writel(0x00002030, &axi_qos->qosctset2);
  808. writel(0x00002030, &axi_qos->qosctset3);
  809. writel(0x00000001, &axi_qos->qosreqctr);
  810. writel(0x00002064, &axi_qos->qosthres0);
  811. writel(0x00002004, &axi_qos->qosthres1);
  812. writel(0x00000000, &axi_qos->qosthres2);
  813. writel(0x00000001, &axi_qos->qosqon);
  814. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
  815. writel(0x00000002, &axi_qos->qosconf);
  816. writel(0x00002245, &axi_qos->qosctset0);
  817. writel(0x00002096, &axi_qos->qosctset1);
  818. writel(0x00002030, &axi_qos->qosctset2);
  819. writel(0x00002030, &axi_qos->qosctset3);
  820. writel(0x00000001, &axi_qos->qosreqctr);
  821. writel(0x00002064, &axi_qos->qosthres0);
  822. writel(0x00002004, &axi_qos->qosthres1);
  823. writel(0x00000000, &axi_qos->qosthres2);
  824. writel(0x00000001, &axi_qos->qosqon);
  825. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
  826. writel(0x00000001, &axi_qos->qosconf);
  827. writel(0x00002004, &axi_qos->qosctset0);
  828. writel(0x00002096, &axi_qos->qosctset1);
  829. writel(0x00002030, &axi_qos->qosctset2);
  830. writel(0x00002030, &axi_qos->qosctset3);
  831. writel(0x00000001, &axi_qos->qosreqctr);
  832. writel(0x00002064, &axi_qos->qosthres0);
  833. writel(0x00002004, &axi_qos->qosthres1);
  834. writel(0x00000000, &axi_qos->qosthres2);
  835. writel(0x00000001, &axi_qos->qosqon);
  836. axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
  837. writel(0x00000001, &axi_qos->qosconf);
  838. writel(0x00002004, &axi_qos->qosctset0);
  839. writel(0x00002096, &axi_qos->qosctset1);
  840. writel(0x00002030, &axi_qos->qosctset2);
  841. writel(0x00002030, &axi_qos->qosctset3);
  842. writel(0x00000001, &axi_qos->qosreqctr);
  843. writel(0x00002064, &axi_qos->qosthres0);
  844. writel(0x00002004, &axi_qos->qosthres1);
  845. writel(0x00000000, &axi_qos->qosthres2);
  846. writel(0x00000001, &axi_qos->qosqon);
  847. /* QoS Register (Media-AXI) */
  848. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE;
  849. writel(0x00000002, &axi_qos->qosconf);
  850. writel(0x000020DC, &axi_qos->qosctset0);
  851. writel(0x00002096, &axi_qos->qosctset1);
  852. writel(0x00002030, &axi_qos->qosctset2);
  853. writel(0x00002030, &axi_qos->qosctset3);
  854. writel(0x00000020, &axi_qos->qosreqctr);
  855. writel(0x000020AA, &axi_qos->qosthres0);
  856. writel(0x00002032, &axi_qos->qosthres1);
  857. writel(0x00000001, &axi_qos->qosthres2);
  858. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE;
  859. writel(0x00000002, &axi_qos->qosconf);
  860. writel(0x000020DC, &axi_qos->qosctset0);
  861. writel(0x00002096, &axi_qos->qosctset1);
  862. writel(0x00002030, &axi_qos->qosctset2);
  863. writel(0x00002030, &axi_qos->qosctset3);
  864. writel(0x00000020, &axi_qos->qosreqctr);
  865. writel(0x000020AA, &axi_qos->qosthres0);
  866. writel(0x00002032, &axi_qos->qosthres1);
  867. writel(0x00000001, &axi_qos->qosthres2);
  868. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPR_BASE;
  869. writel(0x00000001, &axi_qos->qosconf);
  870. writel(0x00002190, &axi_qos->qosctset0);
  871. writel(0x00000020, &axi_qos->qosreqctr);
  872. writel(0x00002064, &axi_qos->qosthres0);
  873. writel(0x00002004, &axi_qos->qosthres1);
  874. writel(0x00000001, &axi_qos->qosthres2);
  875. writel(0x00000001, &axi_qos->qosqon);
  876. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_JPW_BASE;
  877. writel(0x00000001, &axi_qos->qosconf);
  878. writel(0x00002190, &axi_qos->qosctset0);
  879. writel(0x00000020, &axi_qos->qosreqctr);
  880. if (IS_R8A7791_ES2()) {
  881. writel(0x00000001, &axi_qos->qosthres0);
  882. writel(0x00000001, &axi_qos->qosthres1);
  883. } else {
  884. writel(0x00002064, &axi_qos->qosthres0);
  885. writel(0x00002004, &axi_qos->qosthres1);
  886. }
  887. writel(0x00000001, &axi_qos->qosthres2);
  888. writel(0x00000001, &axi_qos->qosqon);
  889. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
  890. writel(0x00000001, &axi_qos->qosconf);
  891. writel(0x00002190, &axi_qos->qosctset0);
  892. writel(0x00000020, &axi_qos->qosreqctr);
  893. writel(0x00002064, &axi_qos->qosthres0);
  894. writel(0x00002004, &axi_qos->qosthres1);
  895. writel(0x00000001, &axi_qos->qosthres2);
  896. writel(0x00000001, &axi_qos->qosqon);
  897. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
  898. writel(0x00000001, &axi_qos->qosconf);
  899. writel(0x00002190, &axi_qos->qosctset0);
  900. writel(0x00000020, &axi_qos->qosreqctr);
  901. writel(0x00002064, &axi_qos->qosthres0);
  902. writel(0x00002004, &axi_qos->qosthres1);
  903. writel(0x00000001, &axi_qos->qosthres2);
  904. writel(0x00000001, &axi_qos->qosqon);
  905. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
  906. writel(0x00000001, &axi_qos->qosconf);
  907. writel(0x00002190, &axi_qos->qosctset0);
  908. writel(0x00000020, &axi_qos->qosreqctr);
  909. writel(0x00002064, &axi_qos->qosthres0);
  910. writel(0x00002004, &axi_qos->qosthres1);
  911. writel(0x00000001, &axi_qos->qosthres2);
  912. writel(0x00000001, &axi_qos->qosqon);
  913. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
  914. writel(0x00000001, &axi_qos->qosconf);
  915. writel(0x00002190, &axi_qos->qosctset0);
  916. writel(0x00000020, &axi_qos->qosreqctr);
  917. if (IS_R8A7791_ES2()) {
  918. writel(0x00000001, &axi_qos->qosthres0);
  919. writel(0x00000001, &axi_qos->qosthres1);
  920. } else {
  921. writel(0x00002064, &axi_qos->qosthres0);
  922. writel(0x00002004, &axi_qos->qosthres1);
  923. }
  924. writel(0x00000001, &axi_qos->qosthres2);
  925. writel(0x00000001, &axi_qos->qosqon);
  926. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
  927. writel(0x00000001, &axi_qos->qosconf);
  928. writel(0x00002190, &axi_qos->qosctset0);
  929. writel(0x00000020, &axi_qos->qosreqctr);
  930. writel(0x00002064, &axi_qos->qosthres0);
  931. writel(0x00002004, &axi_qos->qosthres1);
  932. writel(0x00000001, &axi_qos->qosthres2);
  933. writel(0x00000001, &axi_qos->qosqon);
  934. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
  935. writel(0x00000001, &axi_qos->qosconf);
  936. writel(0x00002190, &axi_qos->qosctset0);
  937. writel(0x00000020, &axi_qos->qosreqctr);
  938. if (IS_R8A7791_ES2()) {
  939. writel(0x00000001, &axi_qos->qosthres0);
  940. writel(0x00000001, &axi_qos->qosthres1);
  941. } else {
  942. writel(0x00002064, &axi_qos->qosthres0);
  943. writel(0x00002004, &axi_qos->qosthres1);
  944. }
  945. writel(0x00000001, &axi_qos->qosthres2);
  946. writel(0x00000001, &axi_qos->qosqon);
  947. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CR_BASE;
  948. writel(0x00000001, &axi_qos->qosconf);
  949. writel(0x00002190, &axi_qos->qosctset0);
  950. writel(0x00000020, &axi_qos->qosreqctr);
  951. writel(0x00002064, &axi_qos->qosthres0);
  952. writel(0x00002004, &axi_qos->qosthres1);
  953. writel(0x00000001, &axi_qos->qosthres2);
  954. writel(0x00000001, &axi_qos->qosqon);
  955. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU1CW_BASE;
  956. writel(0x00000001, &axi_qos->qosconf);
  957. writel(0x00002190, &axi_qos->qosctset0);
  958. writel(0x00000020, &axi_qos->qosreqctr);
  959. if (IS_R8A7791_ES2()) {
  960. writel(0x00000001, &axi_qos->qosthres0);
  961. writel(0x00000001, &axi_qos->qosthres1);
  962. } else {
  963. writel(0x00002064, &axi_qos->qosthres0);
  964. writel(0x00002004, &axi_qos->qosthres1);
  965. }
  966. writel(0x00000001, &axi_qos->qosthres2);
  967. writel(0x00000001, &axi_qos->qosqon);
  968. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
  969. writel(0x00000001, &axi_qos->qosconf);
  970. if (IS_R8A7791_ES2())
  971. writel(0x00001FF0, &axi_qos->qosctset0);
  972. else
  973. writel(0x000020C8, &axi_qos->qosctset0);
  974. writel(0x00000020, &axi_qos->qosreqctr);
  975. writel(0x00002064, &axi_qos->qosthres0);
  976. writel(0x00002004, &axi_qos->qosthres1);
  977. if (IS_R8A7791_ES2())
  978. writel(0x00002001, &axi_qos->qosthres2);
  979. else
  980. writel(0x00000001, &axi_qos->qosthres2);
  981. writel(0x00000001, &axi_qos->qosqon);
  982. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
  983. writel(0x00000001, &axi_qos->qosconf);
  984. writel(0x000020C8, &axi_qos->qosctset0);
  985. writel(0x00000020, &axi_qos->qosreqctr);
  986. writel(0x00002064, &axi_qos->qosthres0);
  987. writel(0x00002004, &axi_qos->qosthres1);
  988. writel(0x00000001, &axi_qos->qosthres2);
  989. writel(0x00000001, &axi_qos->qosqon);
  990. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
  991. writel(0x00000001, &axi_qos->qosconf);
  992. writel(0x000020C8, &axi_qos->qosctset0);
  993. writel(0x00000020, &axi_qos->qosreqctr);
  994. if (IS_R8A7791_ES2()) {
  995. writel(0x00000001, &axi_qos->qosthres0);
  996. writel(0x00000001, &axi_qos->qosthres1);
  997. } else {
  998. writel(0x00002064, &axi_qos->qosthres0);
  999. writel(0x00002004, &axi_qos->qosthres1);
  1000. }
  1001. writel(0x00000001, &axi_qos->qosthres2);
  1002. writel(0x00000001, &axi_qos->qosqon);
  1003. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
  1004. writel(0x00000001, &axi_qos->qosconf);
  1005. writel(0x000020C8, &axi_qos->qosctset0);
  1006. writel(0x00000020, &axi_qos->qosreqctr);
  1007. writel(0x00002064, &axi_qos->qosthres0);
  1008. writel(0x00002004, &axi_qos->qosthres1);
  1009. writel(0x00000001, &axi_qos->qosthres2);
  1010. writel(0x00000001, &axi_qos->qosqon);
  1011. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
  1012. writel(0x00000001, &axi_qos->qosconf);
  1013. writel(0x000020C8, &axi_qos->qosctset0);
  1014. writel(0x00000020, &axi_qos->qosreqctr);
  1015. writel(0x00002064, &axi_qos->qosthres0);
  1016. writel(0x00002004, &axi_qos->qosthres1);
  1017. writel(0x00000001, &axi_qos->qosthres2);
  1018. writel(0x00000001, &axi_qos->qosqon);
  1019. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
  1020. writel(0x00000001, &axi_qos->qosconf);
  1021. writel(0x000020C8, &axi_qos->qosctset0);
  1022. writel(0x00000020, &axi_qos->qosreqctr);
  1023. writel(0x00002064, &axi_qos->qosthres0);
  1024. writel(0x00002004, &axi_qos->qosthres1);
  1025. writel(0x00000001, &axi_qos->qosthres2);
  1026. writel(0x00000001, &axi_qos->qosqon);
  1027. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
  1028. writel(0x00000001, &axi_qos->qosconf);
  1029. writel(0x000020C8, &axi_qos->qosctset0);
  1030. writel(0x00000020, &axi_qos->qosreqctr);
  1031. if (IS_R8A7791_ES2()) {
  1032. writel(0x00000001, &axi_qos->qosthres0);
  1033. writel(0x00000001, &axi_qos->qosthres1);
  1034. } else {
  1035. writel(0x00002064, &axi_qos->qosthres0);
  1036. writel(0x00002004, &axi_qos->qosthres1);
  1037. }
  1038. writel(0x00000001, &axi_qos->qosthres2);
  1039. writel(0x00000001, &axi_qos->qosqon);
  1040. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1R_BASE;
  1041. writel(0x00000001, &axi_qos->qosconf);
  1042. writel(0x000020C8, &axi_qos->qosctset0);
  1043. writel(0x00000020, &axi_qos->qosreqctr);
  1044. writel(0x00002064, &axi_qos->qosthres0);
  1045. writel(0x00002004, &axi_qos->qosthres1);
  1046. writel(0x00000001, &axi_qos->qosthres2);
  1047. writel(0x00000001, &axi_qos->qosqon);
  1048. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP1W_BASE;
  1049. writel(0x00000001, &axi_qos->qosconf);
  1050. writel(0x000020C8, &axi_qos->qosctset0);
  1051. writel(0x00000020, &axi_qos->qosreqctr);
  1052. if (IS_R8A7791_ES2()) {
  1053. writel(0x00000001, &axi_qos->qosthres0);
  1054. writel(0x00000001, &axi_qos->qosthres1);
  1055. } else {
  1056. writel(0x00002064, &axi_qos->qosthres0);
  1057. writel(0x00002004, &axi_qos->qosthres1);
  1058. }
  1059. writel(0x00000001, &axi_qos->qosthres2);
  1060. writel(0x00000001, &axi_qos->qosqon);
  1061. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
  1062. writel(0x00000001, &axi_qos->qosconf);
  1063. writel(0x000020C8, &axi_qos->qosctset0);
  1064. writel(0x00000020, &axi_qos->qosreqctr);
  1065. writel(0x00002064, &axi_qos->qosthres0);
  1066. writel(0x00002004, &axi_qos->qosthres1);
  1067. writel(0x00000001, &axi_qos->qosthres2);
  1068. writel(0x00000001, &axi_qos->qosqon);
  1069. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
  1070. writel(0x00000001, &axi_qos->qosconf);
  1071. writel(0x000020C8, &axi_qos->qosctset0);
  1072. writel(0x00000020, &axi_qos->qosreqctr);
  1073. writel(0x00002064, &axi_qos->qosthres0);
  1074. writel(0x00002004, &axi_qos->qosthres1);
  1075. writel(0x00000001, &axi_qos->qosthres2);
  1076. writel(0x00000001, &axi_qos->qosqon);
  1077. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
  1078. if (IS_R8A7791_ES2())
  1079. writel(0x00000003, &axi_qos->qosconf);
  1080. else
  1081. writel(0x00000000, &axi_qos->qosconf);
  1082. writel(0x000020C8, &axi_qos->qosctset0);
  1083. writel(0x00002064, &axi_qos->qosthres0);
  1084. writel(0x00002004, &axi_qos->qosthres1);
  1085. writel(0x00000001, &axi_qos->qosthres2);
  1086. writel(0x00000001, &axi_qos->qosqon);
  1087. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
  1088. if (IS_R8A7791_ES2())
  1089. writel(0x00000003, &axi_qos->qosconf);
  1090. else
  1091. writel(0x00000000, &axi_qos->qosconf);
  1092. writel(0x000020C8, &axi_qos->qosctset0);
  1093. writel(0x00002064, &axi_qos->qosthres0);
  1094. writel(0x00002004, &axi_qos->qosthres1);
  1095. writel(0x00000001, &axi_qos->qosthres2);
  1096. writel(0x00000001, &axi_qos->qosqon);
  1097. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1R_BASE;
  1098. if (IS_R8A7791_ES2())
  1099. writel(0x00000003, &axi_qos->qosconf);
  1100. else
  1101. writel(0x00000000, &axi_qos->qosconf);
  1102. writel(0x000020C8, &axi_qos->qosctset0);
  1103. writel(0x00002064, &axi_qos->qosthres0);
  1104. writel(0x00002004, &axi_qos->qosthres1);
  1105. writel(0x00000001, &axi_qos->qosthres2);
  1106. writel(0x00000001, &axi_qos->qosqon);
  1107. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD1W_BASE;
  1108. if (IS_R8A7791_ES2())
  1109. writel(0x00000003, &axi_qos->qosconf);
  1110. else
  1111. writel(0x00000000, &axi_qos->qosconf);
  1112. writel(0x000020C8, &axi_qos->qosctset0);
  1113. writel(0x00002064, &axi_qos->qosthres0);
  1114. writel(0x00002004, &axi_qos->qosthres1);
  1115. writel(0x00000001, &axi_qos->qosthres2);
  1116. writel(0x00000001, &axi_qos->qosqon);
  1117. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
  1118. if (IS_R8A7791_ES2())
  1119. writel(0x00000003, &axi_qos->qosconf);
  1120. else
  1121. writel(0x00000000, &axi_qos->qosconf);
  1122. writel(0x00002063, &axi_qos->qosctset0);
  1123. writel(0x00000001, &axi_qos->qosreqctr);
  1124. writel(0x00002064, &axi_qos->qosthres0);
  1125. writel(0x00002004, &axi_qos->qosthres1);
  1126. writel(0x00000001, &axi_qos->qosthres2);
  1127. writel(0x00000001, &axi_qos->qosqon);
  1128. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
  1129. if (IS_R8A7791_ES2())
  1130. writel(0x00000000, &axi_qos->qosconf);
  1131. else
  1132. writel(0x00000000, &axi_qos->qosconf);
  1133. writel(0x00002063, &axi_qos->qosctset0);
  1134. writel(0x00000001, &axi_qos->qosreqctr);
  1135. writel(0x00002064, &axi_qos->qosthres0);
  1136. writel(0x00002004, &axi_qos->qosthres1);
  1137. writel(0x00000001, &axi_qos->qosthres2);
  1138. writel(0x00000001, &axi_qos->qosqon);
  1139. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
  1140. writel(0x00000001, &axi_qos->qosconf);
  1141. writel(0x00002073, &axi_qos->qosctset0);
  1142. writel(0x00000020, &axi_qos->qosreqctr);
  1143. writel(0x00002064, &axi_qos->qosthres0);
  1144. writel(0x00002004, &axi_qos->qosthres1);
  1145. writel(0x00000001, &axi_qos->qosthres2);
  1146. writel(0x00000001, &axi_qos->qosqon);
  1147. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
  1148. writel(0x00000001, &axi_qos->qosconf);
  1149. writel(0x00002073, &axi_qos->qosctset0);
  1150. writel(0x00000020, &axi_qos->qosreqctr);
  1151. if (IS_R8A7791_ES2()) {
  1152. writel(0x00000001, &axi_qos->qosthres0);
  1153. writel(0x00000001, &axi_qos->qosthres1);
  1154. } else {
  1155. writel(0x00002064, &axi_qos->qosthres0);
  1156. writel(0x00002004, &axi_qos->qosthres1);
  1157. }
  1158. writel(0x00000001, &axi_qos->qosthres2);
  1159. writel(0x00000001, &axi_qos->qosqon);
  1160. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
  1161. writel(0x00000001, &axi_qos->qosconf);
  1162. writel(0x00002073, &axi_qos->qosctset0);
  1163. writel(0x00000020, &axi_qos->qosreqctr);
  1164. writel(0x00002064, &axi_qos->qosthres0);
  1165. writel(0x00002004, &axi_qos->qosthres1);
  1166. writel(0x00000001, &axi_qos->qosthres2);
  1167. writel(0x00000001, &axi_qos->qosqon);
  1168. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
  1169. writel(0x00000001, &axi_qos->qosconf);
  1170. writel(0x00002073, &axi_qos->qosctset0);
  1171. writel(0x00000020, &axi_qos->qosreqctr);
  1172. if (IS_R8A7791_ES2()) {
  1173. writel(0x00000001, &axi_qos->qosthres0);
  1174. writel(0x00000001, &axi_qos->qosthres1);
  1175. } else {
  1176. writel(0x00002064, &axi_qos->qosthres0);
  1177. writel(0x00002004, &axi_qos->qosthres1);
  1178. }
  1179. writel(0x00000001, &axi_qos->qosthres2);
  1180. writel(0x00000001, &axi_qos->qosqon);
  1181. axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
  1182. writel(0x00000001, &axi_qos->qosconf);
  1183. writel(0x00002073, &axi_qos->qosctset0);
  1184. writel(0x00000020, &axi_qos->qosreqctr);
  1185. writel(0x00002064, &axi_qos->qosthres0);
  1186. writel(0x00002004, &axi_qos->qosthres1);
  1187. writel(0x00000001, &axi_qos->qosthres2);
  1188. writel(0x00000001, &axi_qos->qosqon);
  1189. }
  1190. #else /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */
  1191. void qos_init(void)
  1192. {
  1193. }
  1194. #endif /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */