cairo.h 18 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) DENX
  4. * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
  5. *
  6. * Original code (C) Copyright 2010
  7. * Robert Aigner (ra@spiid.net)
  8. */
  9. #ifndef _EVM_H_
  10. #define _EVM_H_
  11. const omap3_sysinfo sysinfo = {
  12. DDR_DISCRETE,
  13. "OMAP3 Cairo board",
  14. "NAND",
  15. };
  16. /*
  17. * OMAP3 Cairo handheld hardware revision
  18. */
  19. enum {
  20. OMAP3_CAIRO_BOARD_GEN_1 = 0, /* Cairo handheld V01 */
  21. OMAP3_CAIRO_BOARD_GEN_2,
  22. };
  23. #define MUX_CAIRO() \
  24. MUX_VAL(CONTROL_PADCONF_GPIO112, (IEN | PTD | EN | M7)) \
  25. MUX_VAL(CONTROL_PADCONF_GPIO113, (IEN | PTD | EN | M7)) \
  26. MUX_VAL(CONTROL_PADCONF_GPIO114, (IEN | PTD | EN | M7)) \
  27. MUX_VAL(CONTROL_PADCONF_GPIO115, (IEN | PTD | EN | M7)) \
  28. MUX_VAL(CONTROL_PADCONF_GPIO126, (IEN | PTD | EN | M7)) \
  29. MUX_VAL(CONTROL_PADCONF_GPIO127, (IEN | PTD | EN | M7)) \
  30. MUX_VAL(CONTROL_PADCONF_GPIO128, (IEN | PTD | EN | M7)) \
  31. MUX_VAL(CONTROL_PADCONF_GPIO129, (IEN | PTD | EN | M7)) \
  32. MUX_VAL(CONTROL_PADCONF_CAM_D0, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
  33. MUX_VAL(CONTROL_PADCONF_CAM_D1, (IEN | DIS | SB_HIZ | M4)) \
  34. MUX_VAL(CONTROL_PADCONF_CAM_D2, (IEN | DIS | SB_HIZ | M7)) \
  35. MUX_VAL(CONTROL_PADCONF_CAM_D3, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
  36. MUX_VAL(CONTROL_PADCONF_CAM_D4, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
  37. MUX_VAL(CONTROL_PADCONF_CAM_D5, (IEN | PTD | EN | M7)) \
  38. MUX_VAL(CONTROL_PADCONF_CAM_D6, (IEN | PTD | EN | SB_HIZ | SB_PD | M7)) \
  39. MUX_VAL(CONTROL_PADCONF_CAM_D7, (IEN | PTD | EN | M7)) \
  40. MUX_VAL(CONTROL_PADCONF_CAM_D8, (IEN | DIS | SB_HIZ | M7)) \
  41. MUX_VAL(CONTROL_PADCONF_CAM_D9, (IEN | DIS | SB_HIZ | M4)) \
  42. MUX_VAL(CONTROL_PADCONF_CAM_D10, (IEN | PTD | EN | M7)) \
  43. MUX_VAL(CONTROL_PADCONF_CAM_D11, (IEN | PTD | EN | SB_LOW | SB_PD | M4)) \
  44. MUX_VAL(CONTROL_PADCONF_CAM_FLD, (IEN | DIS | SB_HIZ | M4)) \
  45. MUX_VAL(CONTROL_PADCONF_CAM_HS, (IEN | PTD | EN | SB_LOW | SB_PD | M4)) \
  46. MUX_VAL(CONTROL_PADCONF_CAM_PCLK, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
  47. MUX_VAL(CONTROL_PADCONF_CAM_STROBE, (IDIS | PTU | EN | SB_HI | SB_PU | M4)) \
  48. MUX_VAL(CONTROL_PADCONF_CAM_VS, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
  49. MUX_VAL(CONTROL_PADCONF_CAM_WEN, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
  50. MUX_VAL(CONTROL_PADCONF_CAM_XCLKA, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
  51. MUX_VAL(CONTROL_PADCONF_CAM_XCLKB, (IEN | DIS | SB_HIZ | SB_PD | M7)) \
  52. MUX_VAL(CONTROL_PADCONF_DSS_ACBIAS, (IDIS | PTD | EN | SB_HIZ | SB_PD | M0)) \
  53. MUX_VAL(CONTROL_PADCONF_DSS_DATA0, (IDIS | PTD | EN | M0)) \
  54. MUX_VAL(CONTROL_PADCONF_DSS_DATA1, (IDIS | PTD | EN | M0)) \
  55. MUX_VAL(CONTROL_PADCONF_DSS_DATA2, (IDIS | PTD | EN | M0)) \
  56. MUX_VAL(CONTROL_PADCONF_DSS_DATA3, (IDIS | PTD | EN | M0)) \
  57. MUX_VAL(CONTROL_PADCONF_DSS_DATA4, (IDIS | PTD | EN | M0)) \
  58. MUX_VAL(CONTROL_PADCONF_DSS_DATA5, (IDIS | PTD | EN | M0)) \
  59. MUX_VAL(CONTROL_PADCONF_DSS_DATA6, (IDIS | PTD | EN | M0)) \
  60. MUX_VAL(CONTROL_PADCONF_DSS_DATA7, (IDIS | PTD | EN | M0)) \
  61. MUX_VAL(CONTROL_PADCONF_DSS_DATA8, (IDIS | PTD | EN | M0)) \
  62. MUX_VAL(CONTROL_PADCONF_DSS_DATA9, (IDIS | PTD | EN | M0)) \
  63. MUX_VAL(CONTROL_PADCONF_DSS_DATA10, (IDIS | PTD | EN | M0)) \
  64. MUX_VAL(CONTROL_PADCONF_DSS_DATA11, (IDIS | PTD | EN | M0)) \
  65. MUX_VAL(CONTROL_PADCONF_DSS_DATA12, (IDIS | PTD | EN | M0)) \
  66. MUX_VAL(CONTROL_PADCONF_DSS_DATA13, (IDIS | PTD | EN | M0)) \
  67. MUX_VAL(CONTROL_PADCONF_DSS_DATA14, (IDIS | PTD | EN | M0)) \
  68. MUX_VAL(CONTROL_PADCONF_DSS_DATA15, (IDIS | PTD | EN | M0)) \
  69. MUX_VAL(CONTROL_PADCONF_DSS_DATA16, (IDIS | PTD | EN | M0)) \
  70. MUX_VAL(CONTROL_PADCONF_DSS_DATA17, (IDIS | PTD | EN | M0)) \
  71. MUX_VAL(CONTROL_PADCONF_DSS_DATA18, (IDIS | PTD | EN | M0)) \
  72. MUX_VAL(CONTROL_PADCONF_DSS_DATA19, (IDIS | PTD | EN | M0)) \
  73. MUX_VAL(CONTROL_PADCONF_DSS_DATA20, (IDIS | PTU | EN | M0)) \
  74. MUX_VAL(CONTROL_PADCONF_DSS_DATA21, (IDIS | PTD | EN | M0)) \
  75. MUX_VAL(CONTROL_PADCONF_DSS_DATA22, (IDIS | PTD | EN | M0)) \
  76. MUX_VAL(CONTROL_PADCONF_DSS_DATA23, (IDIS | PTD | EN | M0)) \
  77. MUX_VAL(CONTROL_PADCONF_DSS_HSYNC, (IDIS | PTU | EN | M0)) \
  78. MUX_VAL(CONTROL_PADCONF_DSS_PCLK, (IDIS | PTU | EN | M0)) \
  79. MUX_VAL(CONTROL_PADCONF_DSS_VSYNC, (IDIS | PTU | EN | M0)) \
  80. MUX_VAL(CONTROL_PADCONF_ETK_CLK_ES2, (IDIS | PTU | EN | M3)) \
  81. MUX_VAL(CONTROL_PADCONF_ETK_CTL_ES2, (IDIS | PTU | EN | M3)) \
  82. MUX_VAL(CONTROL_PADCONF_ETK_D0_ES2, (IEN | PTU | EN | M3)) \
  83. MUX_VAL(CONTROL_PADCONF_ETK_D1_ES2, (IEN | PTU | EN | M3)) \
  84. MUX_VAL(CONTROL_PADCONF_ETK_D2_ES2, (IEN | PTU | EN | M3)) \
  85. MUX_VAL(CONTROL_PADCONF_ETK_D3_ES2, (IEN | PTU | EN | M3)) \
  86. MUX_VAL(CONTROL_PADCONF_ETK_D4_ES2, (IEN | PTD | EN | M3)) \
  87. MUX_VAL(CONTROL_PADCONF_ETK_D5_ES2, (IEN | PTD | EN | M3)) \
  88. MUX_VAL(CONTROL_PADCONF_ETK_D6_ES2, (IEN | PTD | EN | M3)) \
  89. MUX_VAL(CONTROL_PADCONF_ETK_D7_ES2, (IEN | PTD | EN | M3)) \
  90. MUX_VAL(CONTROL_PADCONF_ETK_D8_ES2, (IEN | PTD | EN | M3)) \
  91. MUX_VAL(CONTROL_PADCONF_ETK_D9_ES2, (IEN | PTD | EN | M3)) \
  92. MUX_VAL(CONTROL_PADCONF_ETK_D10_ES2, (IDIS | PTD | EN | M3)) \
  93. MUX_VAL(CONTROL_PADCONF_ETK_D11_ES2, (IDIS | PTD | EN | M3)) \
  94. MUX_VAL(CONTROL_PADCONF_ETK_D12_ES2, (IEN | PTD | EN | M3)) \
  95. MUX_VAL(CONTROL_PADCONF_ETK_D13_ES2, (IEN | PTD | EN | M3)) \
  96. MUX_VAL(CONTROL_PADCONF_ETK_D14_ES2, (IEN | PTD | EN | M3)) \
  97. MUX_VAL(CONTROL_PADCONF_ETK_D15_ES2, (IEN | PTD | EN | M3)) \
  98. MUX_VAL(CONTROL_PADCONF_GPMC_A1, (IEN | PTD | EN | M7)) \
  99. MUX_VAL(CONTROL_PADCONF_GPMC_A2, (IEN | PTD | EN | M7)) \
  100. MUX_VAL(CONTROL_PADCONF_GPMC_A3, (IEN | PTD | EN | M7)) \
  101. MUX_VAL(CONTROL_PADCONF_GPMC_A4, (IEN | PTD | EN | M7)) \
  102. MUX_VAL(CONTROL_PADCONF_GPMC_A5, (IEN | PTD | EN | M7)) \
  103. MUX_VAL(CONTROL_PADCONF_GPMC_A6, (IEN | PTU | EN | M7)) \
  104. MUX_VAL(CONTROL_PADCONF_GPMC_A7, (IEN | PTU | EN | M7)) \
  105. MUX_VAL(CONTROL_PADCONF_GPMC_A8, (IEN | PTU | EN | M7)) \
  106. MUX_VAL(CONTROL_PADCONF_GPMC_A9, (IEN | PTU | EN | M7)) \
  107. MUX_VAL(CONTROL_PADCONF_GPMC_A10, (IEN | PTU | EN | M7)) \
  108. MUX_VAL(CONTROL_PADCONF_GPMC_A11, (IEN | PTD | EN | M7)) \
  109. MUX_VAL(CONTROL_PADCONF_GPMC_CLK, (IEN | DIS | M7)) \
  110. MUX_VAL(CONTROL_PADCONF_GPMC_D0, (IEN | PTU | EN | M0)) \
  111. MUX_VAL(CONTROL_PADCONF_GPMC_D1, (IEN | PTU | EN | M0)) \
  112. MUX_VAL(CONTROL_PADCONF_GPMC_D2, (IEN | PTU | EN | M0)) \
  113. MUX_VAL(CONTROL_PADCONF_GPMC_D3, (IEN | PTU | EN | M0)) \
  114. MUX_VAL(CONTROL_PADCONF_GPMC_D4, (IEN | PTU | EN | M0)) \
  115. MUX_VAL(CONTROL_PADCONF_GPMC_D5, (IEN | PTU | EN | M0)) \
  116. MUX_VAL(CONTROL_PADCONF_GPMC_D6, (IEN | PTU | EN | M0)) \
  117. MUX_VAL(CONTROL_PADCONF_GPMC_D7, (IEN | PTU | EN | M0)) \
  118. MUX_VAL(CONTROL_PADCONF_GPMC_D8, (IEN | PTU | EN | M7)) \
  119. MUX_VAL(CONTROL_PADCONF_GPMC_D9, (IEN | PTU | EN | M7)) \
  120. MUX_VAL(CONTROL_PADCONF_GPMC_D10, (IEN | PTU | EN | M7)) \
  121. MUX_VAL(CONTROL_PADCONF_GPMC_D11, (IEN | PTU | EN | M7)) \
  122. MUX_VAL(CONTROL_PADCONF_GPMC_D12, (IEN | PTU | EN | M7)) \
  123. MUX_VAL(CONTROL_PADCONF_GPMC_D13, (IEN | PTU | EN | M7)) \
  124. MUX_VAL(CONTROL_PADCONF_GPMC_D14, (IEN | PTU | EN | M7)) \
  125. MUX_VAL(CONTROL_PADCONF_GPMC_D15, (IEN | PTU | EN | M7)) \
  126. MUX_VAL(CONTROL_PADCONF_GPMC_NADV_ALE, (IDIS | DIS | M0)) \
  127. MUX_VAL(CONTROL_PADCONF_GPMC_NBE0_CLE, (IDIS | DIS | M0)) \
  128. MUX_VAL(CONTROL_PADCONF_GPMC_NBE1, (IEN | PTD | EN | M7)) \
  129. MUX_VAL(CONTROL_PADCONF_GPMC_NCS0, (IDIS | DIS | SB_HIZ | SB_PD | M0)) \
  130. MUX_VAL(CONTROL_PADCONF_GPMC_NCS1, (IEN | DIS | M7)) \
  131. MUX_VAL(CONTROL_PADCONF_GPMC_NCS2, (IEN | PTU | EN | M7)) \
  132. MUX_VAL(CONTROL_PADCONF_GPMC_NCS3, (IEN | PTU | EN | M7)) \
  133. MUX_VAL(CONTROL_PADCONF_GPMC_NCS4, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \
  134. MUX_VAL(CONTROL_PADCONF_GPMC_NCS5, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \
  135. MUX_VAL(CONTROL_PADCONF_GPMC_NCS6, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \
  136. MUX_VAL(CONTROL_PADCONF_GPMC_NCS7, (IDIS | DIS | SB_HIZ | SB_PD | M3)) \
  137. MUX_VAL(CONTROL_PADCONF_GPMC_NOE, (IDIS | DIS | M0)) \
  138. MUX_VAL(CONTROL_PADCONF_GPMC_NWE, (IDIS | DIS | M0)) \
  139. MUX_VAL(CONTROL_PADCONF_GPMC_NWP, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \
  140. MUX_VAL(CONTROL_PADCONF_GPMC_WAIT0, (IEN | DIS | SB_HIZ | M0)) \
  141. MUX_VAL(CONTROL_PADCONF_GPMC_WAIT1, (IEN | PTU | EN | M7)) \
  142. MUX_VAL(CONTROL_PADCONF_GPMC_WAIT2, (IEN | PTU | EN | M7)) \
  143. MUX_VAL(CONTROL_PADCONF_GPMC_WAIT3, (IEN | PTU | EN | M7)) \
  144. MUX_VAL(CONTROL_PADCONF_HDQ_SIO, (IEN | DIS | SB_HIZ | M4)) \
  145. MUX_VAL(CONTROL_PADCONF_HSUSB0_CLK, (IEN | PTD | EN | M0)) \
  146. MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA0, (IEN | PTD | EN | M0)) \
  147. MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA1, (IEN | PTD | EN | M0)) \
  148. MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA2, (IEN | PTD | EN | M0)) \
  149. MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA3, (IEN | PTD | EN | M0)) \
  150. MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA4, (IEN | PTD | EN | M0)) \
  151. MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA5, (IEN | PTD | EN | M0)) \
  152. MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA6, (IEN | PTD | EN | M0)) \
  153. MUX_VAL(CONTROL_PADCONF_HSUSB0_DATA7, (IEN | PTD | EN | M0)) \
  154. MUX_VAL(CONTROL_PADCONF_HSUSB0_DIR, (IEN | PTD | EN | M0)) \
  155. MUX_VAL(CONTROL_PADCONF_HSUSB0_NXT, (IEN | PTD | EN | M0)) \
  156. MUX_VAL(CONTROL_PADCONF_HSUSB0_STP, (IDIS | PTU | EN | M0)) \
  157. MUX_VAL(CONTROL_PADCONF_I2C1_SCL, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  158. MUX_VAL(CONTROL_PADCONF_I2C1_SDA, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  159. MUX_VAL(CONTROL_PADCONF_I2C2_SCL, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  160. MUX_VAL(CONTROL_PADCONF_I2C2_SDA, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  161. MUX_VAL(CONTROL_PADCONF_I2C3_SCL, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
  162. MUX_VAL(CONTROL_PADCONF_I2C3_SDA, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
  163. MUX_VAL(CONTROL_PADCONF_I2C4_SCL, (IEN | PTU | EN | M7)) \
  164. MUX_VAL(CONTROL_PADCONF_I2C4_SDA, (IEN | PTU | EN | M7)) \
  165. MUX_VAL(CONTROL_PADCONF_JTAG_EMU0, (IEN | PTU | EN | M0)) \
  166. MUX_VAL(CONTROL_PADCONF_JTAG_EMU1, (IEN | PTU | EN | M0)) \
  167. MUX_VAL(CONTROL_PADCONF_JTAG_NTRST, (IEN | PTD | EN | M0)) \
  168. MUX_VAL(CONTROL_PADCONF_JTAG_RTCK, (IDIS | DIS | M0)) \
  169. MUX_VAL(CONTROL_PADCONF_JTAG_TCK, (IEN | PTD | EN | M0)) \
  170. MUX_VAL(CONTROL_PADCONF_JTAG_TDI, (IEN | PTU | EN | M0)) \
  171. MUX_VAL(CONTROL_PADCONF_JTAG_TDO, (IDIS | DIS | M0)) \
  172. MUX_VAL(CONTROL_PADCONF_JTAG_TMS, (IEN | PTU | EN | M0)) \
  173. MUX_VAL(CONTROL_PADCONF_MCBSP_CLKS, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
  174. MUX_VAL(CONTROL_PADCONF_MCBSP1_CLKR, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
  175. MUX_VAL(CONTROL_PADCONF_MCBSP1_CLKX, (IEN | DIS | SB_HIZ | M4)) \
  176. MUX_VAL(CONTROL_PADCONF_MCBSP1_DR, (IEN | DIS | SB_HIZ | M4)) \
  177. MUX_VAL(CONTROL_PADCONF_MCBSP1_DX, (IEN | DIS | SB_HIZ | SB_PD | M7)) \
  178. MUX_VAL(CONTROL_PADCONF_MCBSP1_FSR, (IEN | PTD | EN | M7)) \
  179. MUX_VAL(CONTROL_PADCONF_MCBSP1_FSX, (IEN | DIS | SB_HIZ | M4)) \
  180. MUX_VAL(CONTROL_PADCONF_MCBSP2_CLKX, (IEN | PTD | EN | M7)) \
  181. MUX_VAL(CONTROL_PADCONF_MCBSP2_DR, (IEN | PTD | EN | M7)) \
  182. MUX_VAL(CONTROL_PADCONF_MCBSP2_DX, (IEN | PTD | EN | M7)) \
  183. MUX_VAL(CONTROL_PADCONF_MCBSP2_FSX, (IEN | PTD | EN | M7)) \
  184. MUX_VAL(CONTROL_PADCONF_MCBSP3_CLKX, (IDIS | DIS | SB_HIZ | SB_PU | M1)) \
  185. MUX_VAL(CONTROL_PADCONF_MCBSP3_DR, (IDIS | PTD | EN | SB_LOW | SB_PD | M4)) \
  186. MUX_VAL(CONTROL_PADCONF_MCBSP3_DX, (IEN | PTD | EN | M7)) \
  187. MUX_VAL(CONTROL_PADCONF_MCBSP3_FSX, (IEN | PTU | EN | SB_HIZ | SB_PU | M1)) \
  188. MUX_VAL(CONTROL_PADCONF_MCBSP4_CLKX, (IEN | PTD | EN | M7)) \
  189. MUX_VAL(CONTROL_PADCONF_MCBSP4_DR, (IEN | PTD | EN | M7)) \
  190. MUX_VAL(CONTROL_PADCONF_MCBSP4_DX, (IEN | PTD | EN | M7)) \
  191. MUX_VAL(CONTROL_PADCONF_MCBSP4_FSX, (IEN | PTD | EN | M7)) \
  192. MUX_VAL(CONTROL_PADCONF_MCSPI1_CLK, (IEN | PTD | EN | M0)) \
  193. MUX_VAL(CONTROL_PADCONF_MCSPI1_CS0, (IEN | PTU | EN | SB_HIZ | SB_PD | M0)) \
  194. MUX_VAL(CONTROL_PADCONF_MCSPI1_CS1, (IEN | PTU | EN | M7)) \
  195. MUX_VAL(CONTROL_PADCONF_MCSPI1_CS2, (IEN | PTU | EN | M7)) \
  196. MUX_VAL(CONTROL_PADCONF_MCSPI1_CS3, (IEN | PTU | EN | M3)) \
  197. MUX_VAL(CONTROL_PADCONF_MCSPI1_SIMO, (IEN | PTD | EN | M0)) \
  198. MUX_VAL(CONTROL_PADCONF_MCSPI1_SOMI, (IEN | PTD | EN | M0)) \
  199. MUX_VAL(CONTROL_PADCONF_MCSPI2_CLK, (IEN | PTD | EN | M3)) \
  200. MUX_VAL(CONTROL_PADCONF_MCSPI2_CS0, (IEN | PTU | EN | M3)) \
  201. MUX_VAL(CONTROL_PADCONF_MCSPI2_CS1, (IEN | PTD | EN | M3)) \
  202. MUX_VAL(CONTROL_PADCONF_MCSPI2_SIMO, (IEN | PTD | EN | M3)) \
  203. MUX_VAL(CONTROL_PADCONF_MCSPI2_SOMI, (IEN | PTD | EN | M3)) \
  204. MUX_VAL(CONTROL_PADCONF_MMC1_CLK, (IDIS | PTU | EN | SB_HIZ | SB_PU | M0)) \
  205. MUX_VAL(CONTROL_PADCONF_MMC1_CMD, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  206. MUX_VAL(CONTROL_PADCONF_MMC1_DAT0, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  207. MUX_VAL(CONTROL_PADCONF_MMC1_DAT1, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  208. MUX_VAL(CONTROL_PADCONF_MMC1_DAT2, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  209. MUX_VAL(CONTROL_PADCONF_MMC1_DAT3, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  210. MUX_VAL(CONTROL_PADCONF_MMC2_CLK, (IEN | PTD | EN | SB_HIZ | SB_PU | M0)) \
  211. MUX_VAL(CONTROL_PADCONF_MMC2_CMD, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  212. MUX_VAL(CONTROL_PADCONF_MMC2_DAT0, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  213. MUX_VAL(CONTROL_PADCONF_MMC2_DAT1, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  214. MUX_VAL(CONTROL_PADCONF_MMC2_DAT2, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  215. MUX_VAL(CONTROL_PADCONF_MMC2_DAT3, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  216. MUX_VAL(CONTROL_PADCONF_MMC2_DAT4, (IDIS | DIS | SB_HIZ | M0)) \
  217. MUX_VAL(CONTROL_PADCONF_MMC2_DAT5, (IDIS | DIS | SB_HIZ | M0)) \
  218. MUX_VAL(CONTROL_PADCONF_MMC2_DAT6, (IDIS | DIS | SB_HIZ | M0)) \
  219. MUX_VAL(CONTROL_PADCONF_MMC2_DAT7, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  220. MUX_VAL(CONTROL_PADCONF_SDRC_A0, (IDIS | DIS | M0)) \
  221. MUX_VAL(CONTROL_PADCONF_SDRC_A1, (IDIS | DIS | M0)) \
  222. MUX_VAL(CONTROL_PADCONF_SDRC_A2, (IDIS | DIS | M0)) \
  223. MUX_VAL(CONTROL_PADCONF_SDRC_A3, (IDIS | DIS | M0)) \
  224. MUX_VAL(CONTROL_PADCONF_SDRC_A4, (IDIS | DIS | M0)) \
  225. MUX_VAL(CONTROL_PADCONF_SDRC_A5, (IDIS | DIS | M0)) \
  226. MUX_VAL(CONTROL_PADCONF_SDRC_A6, (IDIS | DIS | M0)) \
  227. MUX_VAL(CONTROL_PADCONF_SDRC_A7, (IDIS | DIS | M0)) \
  228. MUX_VAL(CONTROL_PADCONF_SDRC_A8, (IDIS | DIS | M0)) \
  229. MUX_VAL(CONTROL_PADCONF_SDRC_A9, (IDIS | DIS | M0)) \
  230. MUX_VAL(CONTROL_PADCONF_SDRC_A10, (IDIS | DIS | M0)) \
  231. MUX_VAL(CONTROL_PADCONF_SDRC_A11, (IDIS | DIS | M0)) \
  232. MUX_VAL(CONTROL_PADCONF_SDRC_A12, (IDIS | DIS | M0)) \
  233. MUX_VAL(CONTROL_PADCONF_SDRC_A13, (IDIS | DIS | M0)) \
  234. MUX_VAL(CONTROL_PADCONF_SDRC_A14, (IDIS | DIS | M0)) \
  235. MUX_VAL(CONTROL_PADCONF_SDRC_BA0, (IDIS | DIS | M0)) \
  236. MUX_VAL(CONTROL_PADCONF_SDRC_BA1, (IDIS | DIS | M0)) \
  237. MUX_VAL(CONTROL_PADCONF_SDRC_CKE0, (IDIS | DIS | M0)) \
  238. MUX_VAL(CONTROL_PADCONF_SDRC_CKE1, (IDIS | DIS | M7)) \
  239. MUX_VAL(CONTROL_PADCONF_SDRC_CLK, (IEN | DIS | M0)) \
  240. MUX_VAL(CONTROL_PADCONF_SDRC_D0, (IEN | DIS | M0)) \
  241. MUX_VAL(CONTROL_PADCONF_SDRC_D1, (IEN | DIS | M0)) \
  242. MUX_VAL(CONTROL_PADCONF_SDRC_D2, (IEN | DIS | M0)) \
  243. MUX_VAL(CONTROL_PADCONF_SDRC_D3, (IEN | DIS | M0)) \
  244. MUX_VAL(CONTROL_PADCONF_SDRC_D4, (IEN | DIS | M0)) \
  245. MUX_VAL(CONTROL_PADCONF_SDRC_D5, (IEN | DIS | M0)) \
  246. MUX_VAL(CONTROL_PADCONF_SDRC_D6, (IEN | DIS | M0)) \
  247. MUX_VAL(CONTROL_PADCONF_SDRC_D7, (IEN | DIS | M0)) \
  248. MUX_VAL(CONTROL_PADCONF_SDRC_D8, (IEN | DIS | M0)) \
  249. MUX_VAL(CONTROL_PADCONF_SDRC_D9, (IEN | DIS | M0)) \
  250. MUX_VAL(CONTROL_PADCONF_SDRC_D10, (IEN | DIS | M0)) \
  251. MUX_VAL(CONTROL_PADCONF_SDRC_D11, (IEN | DIS | M0)) \
  252. MUX_VAL(CONTROL_PADCONF_SDRC_D12, (IEN | DIS | M0)) \
  253. MUX_VAL(CONTROL_PADCONF_SDRC_D13, (IEN | DIS | M0)) \
  254. MUX_VAL(CONTROL_PADCONF_SDRC_D14, (IEN | DIS | M0)) \
  255. MUX_VAL(CONTROL_PADCONF_SDRC_D15, (IEN | DIS | M0)) \
  256. MUX_VAL(CONTROL_PADCONF_SDRC_D16, (IEN | DIS | M0)) \
  257. MUX_VAL(CONTROL_PADCONF_SDRC_D17, (IEN | DIS | M0)) \
  258. MUX_VAL(CONTROL_PADCONF_SDRC_D18, (IEN | DIS | M0)) \
  259. MUX_VAL(CONTROL_PADCONF_SDRC_D19, (IEN | DIS | M0)) \
  260. MUX_VAL(CONTROL_PADCONF_SDRC_D20, (IEN | DIS | M0)) \
  261. MUX_VAL(CONTROL_PADCONF_SDRC_D21, (IEN | DIS | M0)) \
  262. MUX_VAL(CONTROL_PADCONF_SDRC_D22, (IEN | DIS | M0)) \
  263. MUX_VAL(CONTROL_PADCONF_SDRC_D23, (IEN | DIS | M0)) \
  264. MUX_VAL(CONTROL_PADCONF_SDRC_D24, (IEN | DIS | M0)) \
  265. MUX_VAL(CONTROL_PADCONF_SDRC_D25, (IEN | DIS | M0)) \
  266. MUX_VAL(CONTROL_PADCONF_SDRC_D26, (IEN | DIS | M0)) \
  267. MUX_VAL(CONTROL_PADCONF_SDRC_D27, (IEN | DIS | M0)) \
  268. MUX_VAL(CONTROL_PADCONF_SDRC_D28, (IEN | DIS | M0)) \
  269. MUX_VAL(CONTROL_PADCONF_SDRC_D29, (IEN | DIS | M0)) \
  270. MUX_VAL(CONTROL_PADCONF_SDRC_D30, (IEN | DIS | M0)) \
  271. MUX_VAL(CONTROL_PADCONF_SDRC_D31, (IEN | DIS | M0)) \
  272. MUX_VAL(CONTROL_PADCONF_SDRC_DM0, (IDIS | DIS | M0)) \
  273. MUX_VAL(CONTROL_PADCONF_SDRC_DM1, (IDIS | DIS | M0)) \
  274. MUX_VAL(CONTROL_PADCONF_SDRC_DM2, (IDIS | DIS | M0)) \
  275. MUX_VAL(CONTROL_PADCONF_SDRC_DM3, (IDIS | DIS | M0)) \
  276. MUX_VAL(CONTROL_PADCONF_SDRC_DQS0, (IEN | DIS | M0)) \
  277. MUX_VAL(CONTROL_PADCONF_SDRC_DQS1, (IEN | DIS | M0)) \
  278. MUX_VAL(CONTROL_PADCONF_SDRC_DQS2, (IEN | DIS | M0)) \
  279. MUX_VAL(CONTROL_PADCONF_SDRC_DQS3, (IEN | DIS | M0)) \
  280. MUX_VAL(CONTROL_PADCONF_SDRC_NCAS, (IDIS | DIS | M0)) \
  281. MUX_VAL(CONTROL_PADCONF_SDRC_NCLK, (IDIS | DIS | M0)) \
  282. MUX_VAL(CONTROL_PADCONF_SDRC_NCS0, (IDIS | DIS | M0)) \
  283. MUX_VAL(CONTROL_PADCONF_SDRC_NCS1, (IDIS | DIS | M0)) \
  284. MUX_VAL(CONTROL_PADCONF_SDRC_NRAS, (IDIS | DIS | M0)) \
  285. MUX_VAL(CONTROL_PADCONF_SDRC_NWE, (IDIS | DIS | M0)) \
  286. MUX_VAL(CONTROL_PADCONF_SYS_32K, (IEN | DIS | M0)) \
  287. MUX_VAL(CONTROL_PADCONF_SYS_BOOT0, (IEN | DIS | M0)) \
  288. MUX_VAL(CONTROL_PADCONF_SYS_BOOT1, (IEN | DIS | M0)) \
  289. MUX_VAL(CONTROL_PADCONF_SYS_BOOT2, (IEN | DIS | M0)) \
  290. MUX_VAL(CONTROL_PADCONF_SYS_BOOT3, (IEN | DIS | M0)) \
  291. MUX_VAL(CONTROL_PADCONF_SYS_BOOT4, (IEN | DIS | M0)) \
  292. MUX_VAL(CONTROL_PADCONF_SYS_BOOT5, (IEN | DIS | M0)) \
  293. MUX_VAL(CONTROL_PADCONF_SYS_BOOT6, (IEN | DIS | M0)) \
  294. MUX_VAL(CONTROL_PADCONF_SYS_CLKOUT1, (IDIS | PTD | EN | M0)) \
  295. MUX_VAL(CONTROL_PADCONF_SYS_CLKOUT2, (IDIS | PTD | EN | M0)) \
  296. MUX_VAL(CONTROL_PADCONF_SYS_CLKREQ, (IEN | DIS | M0)) \
  297. MUX_VAL(CONTROL_PADCONF_SYS_NIRQ, (IEN | PTU | EN | M0)) \
  298. MUX_VAL(CONTROL_PADCONF_SYS_NRESWARM, (IEN | PTU | EN | M0)) \
  299. MUX_VAL(CONTROL_PADCONF_SYS_OFF_MODE, (IDIS | PTD | EN | M0)) \
  300. MUX_VAL(CONTROL_PADCONF_UART1_CTS, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  301. MUX_VAL(CONTROL_PADCONF_UART1_RTS, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \
  302. MUX_VAL(CONTROL_PADCONF_UART1_RX, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  303. MUX_VAL(CONTROL_PADCONF_UART1_TX, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \
  304. MUX_VAL(CONTROL_PADCONF_UART2_CTS, (IEN | PTU | EN | M7)) \
  305. MUX_VAL(CONTROL_PADCONF_UART2_RTS, (IEN | PTU | EN | M7)) \
  306. MUX_VAL(CONTROL_PADCONF_UART2_RX, (IEN | PTU | EN | M7)) \
  307. MUX_VAL(CONTROL_PADCONF_UART2_TX, (IEN | PTU | EN | M7)) \
  308. MUX_VAL(CONTROL_PADCONF_UART3_CTS_RCTX, \
  309. (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  310. MUX_VAL(CONTROL_PADCONF_UART3_RTS_SD, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \
  311. MUX_VAL(CONTROL_PADCONF_UART3_RX_IRRX, (IEN | PTU | EN | SB_HIZ | SB_PU | M0)) \
  312. MUX_VAL(CONTROL_PADCONF_UART3_TX_IRTX, (IDIS | DIS | SB_HIZ | SB_PU | M0)) \
  313. #endif