pinmux-config-dalmore.h 16 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
  4. */
  5. #ifndef _PINMUX_CONFIG_DALMORE_H_
  6. #define _PINMUX_CONFIG_DALMORE_H_
  7. #define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io) \
  8. { \
  9. .pingrp = PMUX_PINGRP_##_pingrp, \
  10. .func = PMUX_FUNC_##_mux, \
  11. .pull = PMUX_PULL_##_pull, \
  12. .tristate = PMUX_TRI_##_tri, \
  13. .io = PMUX_PIN_##_io, \
  14. .lock = PMUX_PIN_LOCK_DEFAULT, \
  15. .od = PMUX_PIN_OD_DEFAULT, \
  16. .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
  17. }
  18. #define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \
  19. { \
  20. .pingrp = PMUX_PINGRP_##_pingrp, \
  21. .func = PMUX_FUNC_##_mux, \
  22. .pull = PMUX_PULL_##_pull, \
  23. .tristate = PMUX_TRI_##_tri, \
  24. .io = PMUX_PIN_##_io, \
  25. .lock = PMUX_PIN_LOCK_##_lock, \
  26. .od = PMUX_PIN_OD_##_od, \
  27. .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
  28. }
  29. #define DDC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _rcv_sel) \
  30. { \
  31. .pingrp = PMUX_PINGRP_##_pingrp, \
  32. .func = PMUX_FUNC_##_mux, \
  33. .pull = PMUX_PULL_##_pull, \
  34. .tristate = PMUX_TRI_##_tri, \
  35. .io = PMUX_PIN_##_io, \
  36. .lock = PMUX_PIN_LOCK_##_lock, \
  37. .rcv_sel = PMUX_PIN_RCV_SEL_##_rcv_sel, \
  38. .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
  39. }
  40. #define VI_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
  41. { \
  42. .pingrp = PMUX_PINGRP_##_pingrp, \
  43. .func = PMUX_FUNC_##_mux, \
  44. .pull = PMUX_PULL_##_pull, \
  45. .tristate = PMUX_TRI_##_tri, \
  46. .io = PMUX_PIN_##_io, \
  47. .lock = PMUX_PIN_LOCK_##_lock, \
  48. .od = PMUX_PIN_OD_DEFAULT, \
  49. .ioreset = PMUX_PIN_IO_RESET_##_ioreset \
  50. }
  51. #define CEC_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od) \
  52. { \
  53. .pingrp = PMUX_PINGRP_##_pingrp, \
  54. .func = PMUX_FUNC_##_mux, \
  55. .pull = PMUX_PULL_##_pull, \
  56. .tristate = PMUX_TRI_##_tri, \
  57. .io = PMUX_PIN_##_io, \
  58. .lock = PMUX_PIN_LOCK_##_lock, \
  59. .od = PMUX_PIN_OD_##_od, \
  60. .ioreset = PMUX_PIN_IO_RESET_DEFAULT, \
  61. }
  62. #define USB_PINMUX CEC_PINMUX
  63. #define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
  64. { \
  65. .drvgrp = PMUX_DRVGRP_##_drvgrp, \
  66. .slwf = _slwf, \
  67. .slwr = _slwr, \
  68. .drvup = _drvup, \
  69. .drvdn = _drvdn, \
  70. .lpmd = PMUX_LPMD_##_lpmd, \
  71. .schmt = PMUX_SCHMT_##_schmt, \
  72. .hsm = PMUX_HSM_##_hsm, \
  73. }
  74. static struct pmux_pingrp_config tegra114_pinmux_common[] = {
  75. /* EXTPERIPH1 pinmux */
  76. DEFAULT_PINMUX(CLK1_OUT_PW4, EXTPERIPH1, NORMAL, NORMAL, OUTPUT),
  77. /* I2S0 pinmux */
  78. DEFAULT_PINMUX(DAP1_DIN_PN1, I2S0, NORMAL, TRISTATE, INPUT),
  79. DEFAULT_PINMUX(DAP1_DOUT_PN2, I2S0, NORMAL, NORMAL, INPUT),
  80. DEFAULT_PINMUX(DAP1_FS_PN0, I2S0, NORMAL, NORMAL, INPUT),
  81. DEFAULT_PINMUX(DAP1_SCLK_PN3, I2S0, NORMAL, NORMAL, INPUT),
  82. /* I2S1 pinmux */
  83. DEFAULT_PINMUX(DAP2_DIN_PA4, I2S1, NORMAL, TRISTATE, INPUT),
  84. DEFAULT_PINMUX(DAP2_DOUT_PA5, I2S1, NORMAL, NORMAL, INPUT),
  85. DEFAULT_PINMUX(DAP2_FS_PA2, I2S1, NORMAL, NORMAL, INPUT),
  86. DEFAULT_PINMUX(DAP2_SCLK_PA3, I2S1, NORMAL, NORMAL, INPUT),
  87. /* I2S3 pinmux */
  88. DEFAULT_PINMUX(DAP4_DIN_PP5, I2S3, NORMAL, NORMAL, INPUT),
  89. DEFAULT_PINMUX(DAP4_DOUT_PP6, I2S3, NORMAL, NORMAL, INPUT),
  90. DEFAULT_PINMUX(DAP4_FS_PP4, I2S3, NORMAL, NORMAL, INPUT),
  91. DEFAULT_PINMUX(DAP4_SCLK_PP7, I2S3, NORMAL, NORMAL, INPUT),
  92. /* CLDVFS pinmux */
  93. DEFAULT_PINMUX(DVFS_PWM_PX0, CLDVFS, NORMAL, NORMAL, OUTPUT),
  94. DEFAULT_PINMUX(DVFS_CLK_PX2, CLDVFS, NORMAL, NORMAL, OUTPUT),
  95. /* ULPI pinmux */
  96. DEFAULT_PINMUX(ULPI_CLK_PY0, ULPI, NORMAL, NORMAL, INPUT),
  97. DEFAULT_PINMUX(ULPI_DATA0_PO1, ULPI, NORMAL, NORMAL, INPUT),
  98. DEFAULT_PINMUX(ULPI_DATA1_PO2, ULPI, NORMAL, NORMAL, INPUT),
  99. DEFAULT_PINMUX(ULPI_DATA2_PO3, ULPI, NORMAL, NORMAL, INPUT),
  100. DEFAULT_PINMUX(ULPI_DATA3_PO4, ULPI, NORMAL, NORMAL, INPUT),
  101. DEFAULT_PINMUX(ULPI_DATA4_PO5, ULPI, NORMAL, NORMAL, INPUT),
  102. DEFAULT_PINMUX(ULPI_DATA5_PO6, ULPI, NORMAL, NORMAL, INPUT),
  103. DEFAULT_PINMUX(ULPI_DATA6_PO7, ULPI, NORMAL, NORMAL, INPUT),
  104. DEFAULT_PINMUX(ULPI_DATA7_PO0, ULPI, NORMAL, NORMAL, INPUT),
  105. DEFAULT_PINMUX(ULPI_DIR_PY1, ULPI, NORMAL, TRISTATE, INPUT),
  106. DEFAULT_PINMUX(ULPI_NXT_PY2, ULPI, NORMAL, TRISTATE, INPUT),
  107. DEFAULT_PINMUX(ULPI_STP_PY3, ULPI, NORMAL, NORMAL, OUTPUT),
  108. /* I2C3 pinmux */
  109. I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
  110. I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
  111. /* VI pinmux */
  112. VI_PINMUX(CAM_MCLK_PCC0, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
  113. /* VI_ALT1 pinmux */
  114. VI_PINMUX(PBB0, VI_ALT3, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
  115. /* VGP4 pinmux */
  116. VI_PINMUX(PBB4, VGP4, NORMAL, NORMAL, OUTPUT, DEFAULT, DEFAULT),
  117. /* I2C2 pinmux */
  118. I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
  119. I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
  120. /* UARTD pinmux */
  121. DEFAULT_PINMUX(GMI_A16_PJ7, UARTD, NORMAL, NORMAL, OUTPUT),
  122. DEFAULT_PINMUX(GMI_A17_PB0, UARTD, NORMAL, TRISTATE, INPUT),
  123. DEFAULT_PINMUX(GMI_A18_PB1, UARTD, NORMAL, TRISTATE, INPUT),
  124. DEFAULT_PINMUX(GMI_A19_PK7, UARTD, NORMAL, NORMAL, OUTPUT),
  125. /* SPI4 pinmux */
  126. DEFAULT_PINMUX(GMI_AD5_PG5, SPI4, NORMAL, NORMAL, INPUT),
  127. DEFAULT_PINMUX(GMI_AD6_PG6, SPI4, UP, NORMAL, INPUT),
  128. DEFAULT_PINMUX(GMI_AD7_PG7, SPI4, UP, NORMAL, INPUT),
  129. DEFAULT_PINMUX(GMI_AD12_PH4, RSVD1, NORMAL, NORMAL, OUTPUT),
  130. DEFAULT_PINMUX(GMI_CS6_N_PI3, SPI4, NORMAL, NORMAL, INPUT),
  131. DEFAULT_PINMUX(GMI_WR_N_PI0, SPI4, NORMAL, NORMAL, INPUT),
  132. /* PWM1 pinmux */
  133. DEFAULT_PINMUX(GMI_AD9_PH1, PWM1, NORMAL, NORMAL, OUTPUT),
  134. /* SOC pinmux */
  135. DEFAULT_PINMUX(GMI_CS1_N_PJ2, SOC, NORMAL, TRISTATE, INPUT),
  136. DEFAULT_PINMUX(GMI_OE_N_PI1, SOC, NORMAL, TRISTATE, INPUT),
  137. /* EXTPERIPH2 pinmux */
  138. DEFAULT_PINMUX(CLK2_OUT_PW5, EXTPERIPH2, NORMAL, NORMAL, OUTPUT),
  139. /* SDMMC1 pinmux */
  140. DEFAULT_PINMUX(SDMMC1_CLK_PZ0, SDMMC1, NORMAL, NORMAL, INPUT),
  141. DEFAULT_PINMUX(SDMMC1_CMD_PZ1, SDMMC1, UP, NORMAL, INPUT),
  142. DEFAULT_PINMUX(SDMMC1_DAT0_PY7, SDMMC1, UP, NORMAL, INPUT),
  143. DEFAULT_PINMUX(SDMMC1_DAT1_PY6, SDMMC1, UP, NORMAL, INPUT),
  144. DEFAULT_PINMUX(SDMMC1_DAT2_PY5, SDMMC1, UP, NORMAL, INPUT),
  145. DEFAULT_PINMUX(SDMMC1_DAT3_PY4, SDMMC1, UP, NORMAL, INPUT),
  146. /* SDMMC3 pinmux */
  147. DEFAULT_PINMUX(SDMMC3_CLK_PA6, SDMMC3, NORMAL, NORMAL, INPUT),
  148. DEFAULT_PINMUX(SDMMC3_CMD_PA7, SDMMC3, UP, NORMAL, INPUT),
  149. DEFAULT_PINMUX(SDMMC3_DAT0_PB7, SDMMC3, UP, NORMAL, INPUT),
  150. DEFAULT_PINMUX(SDMMC3_DAT1_PB6, SDMMC3, UP, NORMAL, INPUT),
  151. DEFAULT_PINMUX(SDMMC3_DAT2_PB5, SDMMC3, UP, NORMAL, INPUT),
  152. DEFAULT_PINMUX(SDMMC3_DAT3_PB4, SDMMC3, UP, NORMAL, INPUT),
  153. DEFAULT_PINMUX(SDMMC3_CLK_LB_IN_PEE5, SDMMC3, UP, TRISTATE, INPUT),
  154. DEFAULT_PINMUX(SDMMC3_CLK_LB_OUT_PEE4, SDMMC3, DOWN, NORMAL, INPUT),
  155. /* SDMMC4 pinmux */
  156. DEFAULT_PINMUX(SDMMC4_CLK_PCC4, SDMMC4, NORMAL, NORMAL, INPUT),
  157. DEFAULT_PINMUX(SDMMC4_CMD_PT7, SDMMC4, UP, NORMAL, INPUT),
  158. DEFAULT_PINMUX(SDMMC4_DAT0_PAA0, SDMMC4, UP, NORMAL, INPUT),
  159. DEFAULT_PINMUX(SDMMC4_DAT1_PAA1, SDMMC4, UP, NORMAL, INPUT),
  160. DEFAULT_PINMUX(SDMMC4_DAT2_PAA2, SDMMC4, UP, NORMAL, INPUT),
  161. DEFAULT_PINMUX(SDMMC4_DAT3_PAA3, SDMMC4, UP, NORMAL, INPUT),
  162. DEFAULT_PINMUX(SDMMC4_DAT4_PAA4, SDMMC4, UP, NORMAL, INPUT),
  163. DEFAULT_PINMUX(SDMMC4_DAT5_PAA5, SDMMC4, UP, NORMAL, INPUT),
  164. DEFAULT_PINMUX(SDMMC4_DAT6_PAA6, SDMMC4, UP, NORMAL, INPUT),
  165. DEFAULT_PINMUX(SDMMC4_DAT7_PAA7, SDMMC4, UP, NORMAL, INPUT),
  166. /* BLINK pinmux */
  167. DEFAULT_PINMUX(CLK_32K_OUT_PA0, BLINK, NORMAL, NORMAL, OUTPUT),
  168. /* KBC pinmux */
  169. DEFAULT_PINMUX(KB_COL0_PQ0, KBC, UP, NORMAL, INPUT),
  170. DEFAULT_PINMUX(KB_COL1_PQ1, KBC, UP, NORMAL, INPUT),
  171. DEFAULT_PINMUX(KB_COL2_PQ2, KBC, UP, NORMAL, INPUT),
  172. DEFAULT_PINMUX(KB_ROW0_PR0, KBC, UP, NORMAL, INPUT),
  173. DEFAULT_PINMUX(KB_ROW1_PR1, KBC, UP, NORMAL, INPUT),
  174. DEFAULT_PINMUX(KB_ROW2_PR2, KBC, UP, NORMAL, INPUT),
  175. /*Audio Codec*/
  176. DEFAULT_PINMUX(DAP3_DIN_PP1, RSVD1, NORMAL, TRISTATE, OUTPUT),
  177. DEFAULT_PINMUX(DAP3_SCLK_PP3, RSVD1, NORMAL, TRISTATE, OUTPUT),
  178. DEFAULT_PINMUX(PV0, RSVD1, NORMAL, TRISTATE, OUTPUT),
  179. DEFAULT_PINMUX(KB_ROW7_PR7, RSVD1, UP, NORMAL, INPUT),
  180. /* UARTA pinmux */
  181. DEFAULT_PINMUX(KB_ROW10_PS2, UARTA, NORMAL, TRISTATE, INPUT),
  182. DEFAULT_PINMUX(KB_ROW9_PS1, UARTA, NORMAL, NORMAL, OUTPUT),
  183. /* I2CPWR pinmux (I2C5) */
  184. I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
  185. I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
  186. /* SYSCLK pinmux */
  187. DEFAULT_PINMUX(SYS_CLK_REQ_PZ5, SYSCLK, NORMAL, NORMAL, OUTPUT),
  188. /* RTCK pinmux */
  189. DEFAULT_PINMUX(JTAG_RTCK, RTCK, NORMAL, NORMAL, INPUT),
  190. /* CLK pinmux */
  191. DEFAULT_PINMUX(CLK_32K_IN, CLK, NORMAL, TRISTATE, INPUT),
  192. /* PWRON pinmux */
  193. DEFAULT_PINMUX(CORE_PWR_REQ, PWRON, NORMAL, NORMAL, OUTPUT),
  194. /* CPU pinmux */
  195. DEFAULT_PINMUX(CPU_PWR_REQ, CPU, NORMAL, NORMAL, OUTPUT),
  196. /* PMI pinmux */
  197. DEFAULT_PINMUX(PWR_INT_N, PMI, NORMAL, TRISTATE, INPUT),
  198. /* RESET_OUT_N pinmux */
  199. DEFAULT_PINMUX(RESET_OUT_N, RESET_OUT_N, NORMAL, NORMAL, OUTPUT),
  200. /* EXTPERIPH3 pinmux */
  201. DEFAULT_PINMUX(CLK3_OUT_PEE0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT),
  202. /* I2C1 pinmux */
  203. I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
  204. I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
  205. /* UARTB pinmux */
  206. DEFAULT_PINMUX(UART2_CTS_N_PJ5, UARTB, NORMAL, TRISTATE, INPUT),
  207. DEFAULT_PINMUX(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, OUTPUT),
  208. /* IRDA pinmux */
  209. DEFAULT_PINMUX(UART2_RXD_PC3, IRDA, NORMAL, TRISTATE, INPUT),
  210. DEFAULT_PINMUX(UART2_TXD_PC2, IRDA, NORMAL, NORMAL, OUTPUT),
  211. /* UARTC pinmux */
  212. DEFAULT_PINMUX(UART3_CTS_N_PA1, UARTC, NORMAL, TRISTATE, INPUT),
  213. DEFAULT_PINMUX(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT),
  214. DEFAULT_PINMUX(UART3_RXD_PW7, UARTC, NORMAL, TRISTATE, INPUT),
  215. DEFAULT_PINMUX(UART3_TXD_PW6, UARTC, NORMAL, NORMAL, OUTPUT),
  216. /* OWR pinmux */
  217. DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT),
  218. /* CEC pinmux */
  219. CEC_PINMUX(HDMI_CEC_PEE3, CEC, NORMAL, NORMAL, INPUT, DEFAULT, DISABLE),
  220. /* I2C4 pinmux */
  221. DDC_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
  222. DDC_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
  223. /* USB pinmux */
  224. USB_PINMUX(USB_VBUS_EN0_PN4, USB, NORMAL, NORMAL, INPUT, DEFAULT, ENABLE),
  225. /* nct */
  226. DEFAULT_PINMUX(GPIO_X6_AUD_PX6, SPI6, UP, TRISTATE, INPUT),
  227. };
  228. static struct pmux_pingrp_config unused_pins_lowpower[] = {
  229. DEFAULT_PINMUX(CLK1_REQ_PEE2, RSVD3, DOWN, TRISTATE, OUTPUT),
  230. DEFAULT_PINMUX(USB_VBUS_EN1_PN5, RSVD3, DOWN, TRISTATE, OUTPUT),
  231. };
  232. /* Initially setting all used GPIO's to non-TRISTATE */
  233. static struct pmux_pingrp_config tegra114_pinmux_set_nontristate[] = {
  234. DEFAULT_PINMUX(GPIO_X4_AUD_PX4, RSVD1, DOWN, NORMAL, OUTPUT),
  235. DEFAULT_PINMUX(GPIO_X5_AUD_PX5, RSVD1, UP, NORMAL, INPUT),
  236. DEFAULT_PINMUX(GPIO_X6_AUD_PX6, RSVD3, UP, NORMAL, INPUT),
  237. DEFAULT_PINMUX(GPIO_X7_AUD_PX7, RSVD1, DOWN, NORMAL, OUTPUT),
  238. DEFAULT_PINMUX(GPIO_W2_AUD_PW2, RSVD1, UP, NORMAL, INPUT),
  239. DEFAULT_PINMUX(GPIO_W3_AUD_PW3, SPI6, UP, NORMAL, INPUT),
  240. DEFAULT_PINMUX(GPIO_X1_AUD_PX1, RSVD3, DOWN, NORMAL, INPUT),
  241. DEFAULT_PINMUX(GPIO_X3_AUD_PX3, RSVD3, UP, NORMAL, INPUT),
  242. DEFAULT_PINMUX(DAP3_FS_PP0, I2S2, DOWN, NORMAL, OUTPUT),
  243. DEFAULT_PINMUX(DAP3_DIN_PP1, I2S2, DOWN, NORMAL, OUTPUT),
  244. DEFAULT_PINMUX(DAP3_DOUT_PP2, I2S2, DOWN, NORMAL, OUTPUT),
  245. DEFAULT_PINMUX(DAP3_SCLK_PP3, I2S2, DOWN, NORMAL, OUTPUT),
  246. DEFAULT_PINMUX(PV0, RSVD3, NORMAL, NORMAL, INPUT),
  247. DEFAULT_PINMUX(PV1, RSVD1, NORMAL, NORMAL, INPUT),
  248. DEFAULT_PINMUX(PBB3, RSVD3, DOWN, NORMAL, OUTPUT),
  249. DEFAULT_PINMUX(PBB5, RSVD3, DOWN, NORMAL, OUTPUT),
  250. DEFAULT_PINMUX(PBB6, RSVD3, DOWN, NORMAL, OUTPUT),
  251. DEFAULT_PINMUX(PBB7, RSVD3, DOWN, NORMAL, OUTPUT),
  252. DEFAULT_PINMUX(PCC1, RSVD3, DOWN, NORMAL, INPUT),
  253. DEFAULT_PINMUX(PCC2, RSVD3, DOWN, NORMAL, INPUT),
  254. DEFAULT_PINMUX(GMI_AD0_PG0, GMI, NORMAL, NORMAL, OUTPUT),
  255. DEFAULT_PINMUX(GMI_AD1_PG1, GMI, NORMAL, NORMAL, OUTPUT),
  256. DEFAULT_PINMUX(GMI_AD10_PH2, GMI, DOWN, NORMAL, OUTPUT),
  257. DEFAULT_PINMUX(GMI_AD11_PH3, GMI, DOWN, NORMAL, OUTPUT),
  258. DEFAULT_PINMUX(GMI_AD12_PH4, GMI, UP, NORMAL, INPUT),
  259. DEFAULT_PINMUX(GMI_AD13_PH5, GMI, DOWN, NORMAL, OUTPUT),
  260. DEFAULT_PINMUX(GMI_AD2_PG2, GMI, NORMAL, NORMAL, INPUT),
  261. DEFAULT_PINMUX(GMI_AD3_PG3, GMI, NORMAL, NORMAL, INPUT),
  262. DEFAULT_PINMUX(GMI_AD8_PH0, GMI, DOWN, NORMAL, OUTPUT),
  263. DEFAULT_PINMUX(GMI_ADV_N_PK0, GMI, UP, NORMAL, INPUT),
  264. DEFAULT_PINMUX(GMI_CLK_PK1, GMI, DOWN, NORMAL, OUTPUT),
  265. DEFAULT_PINMUX(GMI_CS0_N_PJ0, GMI, UP, NORMAL, INPUT),
  266. DEFAULT_PINMUX(GMI_CS2_N_PK3, GMI, UP, NORMAL, INPUT),
  267. DEFAULT_PINMUX(GMI_CS3_N_PK4, GMI, UP, NORMAL, OUTPUT),
  268. DEFAULT_PINMUX(GMI_CS4_N_PK2, GMI, UP, NORMAL, INPUT),
  269. DEFAULT_PINMUX(GMI_CS7_N_PI6, GMI, UP, NORMAL, INPUT),
  270. DEFAULT_PINMUX(GMI_DQS_P_PJ3, GMI, UP, NORMAL, INPUT),
  271. DEFAULT_PINMUX(GMI_IORDY_PI5, GMI, UP, NORMAL, INPUT),
  272. DEFAULT_PINMUX(GMI_WP_N_PC7, GMI, UP, NORMAL, INPUT),
  273. DEFAULT_PINMUX(SDMMC1_WP_N_PV3, SPI4, UP, NORMAL, OUTPUT),
  274. DEFAULT_PINMUX(CLK2_REQ_PCC5, RSVD3, NORMAL, NORMAL, OUTPUT),
  275. DEFAULT_PINMUX(KB_COL3_PQ3, KBC, UP, NORMAL, OUTPUT),
  276. DEFAULT_PINMUX(KB_COL4_PQ4, SDMMC3, UP, NORMAL, INPUT),
  277. DEFAULT_PINMUX(KB_COL5_PQ5, KBC, UP, NORMAL, INPUT),
  278. DEFAULT_PINMUX(KB_COL6_PQ6, KBC, UP, NORMAL, OUTPUT),
  279. DEFAULT_PINMUX(KB_COL7_PQ7, KBC, UP, NORMAL, OUTPUT),
  280. DEFAULT_PINMUX(KB_ROW3_PR3, KBC, DOWN, NORMAL, INPUT),
  281. DEFAULT_PINMUX(KB_ROW4_PR4, KBC, DOWN, NORMAL, INPUT),
  282. DEFAULT_PINMUX(KB_ROW6_PR6, KBC, DOWN, NORMAL, INPUT),
  283. DEFAULT_PINMUX(KB_ROW8_PS0, KBC, UP, NORMAL, INPUT),
  284. DEFAULT_PINMUX(CLK3_REQ_PEE1, RSVD3, NORMAL, NORMAL, OUTPUT),
  285. DEFAULT_PINMUX(PU4, RSVD3, NORMAL, NORMAL, OUTPUT),
  286. DEFAULT_PINMUX(PU5, RSVD3, NORMAL, NORMAL, INPUT),
  287. DEFAULT_PINMUX(PU6, RSVD3, NORMAL, NORMAL, INPUT),
  288. DEFAULT_PINMUX(HDMI_INT_PN7, RSVD1, DOWN, NORMAL, INPUT),
  289. DEFAULT_PINMUX(GMI_AD9_PH1, PWM1, NORMAL, NORMAL, OUTPUT),
  290. DEFAULT_PINMUX(SPDIF_IN_PK6, USB, NORMAL, NORMAL, INPUT),
  291. DEFAULT_PINMUX(SDMMC3_CD_N_PV2, SDMMC3, UP, NORMAL, INPUT),
  292. };
  293. static struct pmux_drvgrp_config dalmore_padctrl[] = {
  294. /* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
  295. DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
  296. SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE),
  297. };
  298. #endif /* PINMUX_CONFIG_COMMON_H */