eth.c 4.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2014 Freescale Semiconductor, Inc.
  4. *
  5. * This file handles the board muxing between the RGMII/SGMII PHYs on
  6. * Freescale LS1021AQDS board. The RGMII PHYs are the three on-board 1Gb
  7. * ports. The SGMII PHYs are provided by the standard Freescale four-port
  8. * SGMII riser card.
  9. *
  10. * Muxing is handled via the PIXIS BRDCFG4 register. The EMI1 bits control
  11. * muxing among the RGMII PHYs and the SGMII PHYs. The value for RGMII depends
  12. * on which port is used. The value for SGMII depends on which slot the riser
  13. * is inserted in.
  14. */
  15. #include <common.h>
  16. #include <netdev.h>
  17. #include <asm/arch/fsl_serdes.h>
  18. #include <fsl_mdio.h>
  19. #include <tsec.h>
  20. #include <malloc.h>
  21. #include "../common/sgmii_riser.h"
  22. #include "../common/qixis.h"
  23. #define EMI1_MASK 0x1f
  24. #define EMI1_RGMII0 1
  25. #define EMI1_RGMII1 2
  26. #define EMI1_RGMII2 3
  27. #define EMI1_SGMII1 0x1c
  28. #define EMI1_SGMII2 0x1d
  29. struct ls1021a_mdio {
  30. struct mii_dev *realbus;
  31. };
  32. static void ls1021a_mux_mdio(int addr)
  33. {
  34. u8 brdcfg4;
  35. brdcfg4 = QIXIS_READ(brdcfg[4]);
  36. brdcfg4 &= EMI1_MASK;
  37. switch (addr) {
  38. case EMI1_RGMII0:
  39. brdcfg4 |= 0;
  40. break;
  41. case EMI1_RGMII1:
  42. brdcfg4 |= 0x20;
  43. break;
  44. case EMI1_RGMII2:
  45. brdcfg4 |= 0x40;
  46. break;
  47. case EMI1_SGMII1:
  48. brdcfg4 |= 0x60;
  49. break;
  50. case EMI1_SGMII2:
  51. brdcfg4 |= 0x80;
  52. break;
  53. default:
  54. brdcfg4 |= 0xa0;
  55. break;
  56. }
  57. QIXIS_WRITE(brdcfg[4], brdcfg4);
  58. }
  59. static int ls1021a_mdio_read(struct mii_dev *bus, int addr, int devad,
  60. int regnum)
  61. {
  62. struct ls1021a_mdio *priv = bus->priv;
  63. ls1021a_mux_mdio(addr);
  64. return priv->realbus->read(priv->realbus, addr, devad, regnum);
  65. }
  66. static int ls1021a_mdio_write(struct mii_dev *bus, int addr, int devad,
  67. int regnum, u16 value)
  68. {
  69. struct ls1021a_mdio *priv = bus->priv;
  70. ls1021a_mux_mdio(addr);
  71. return priv->realbus->write(priv->realbus, addr, devad, regnum, value);
  72. }
  73. static int ls1021a_mdio_reset(struct mii_dev *bus)
  74. {
  75. struct ls1021a_mdio *priv = bus->priv;
  76. return priv->realbus->reset(priv->realbus);
  77. }
  78. static int ls1021a_mdio_init(char *realbusname, char *fakebusname)
  79. {
  80. struct ls1021a_mdio *lsmdio;
  81. struct mii_dev *bus = mdio_alloc();
  82. if (!bus) {
  83. printf("Failed to allocate LS102xA MDIO bus\n");
  84. return -1;
  85. }
  86. lsmdio = malloc(sizeof(*lsmdio));
  87. if (!lsmdio) {
  88. printf("Failed to allocate LS102xA private data\n");
  89. free(bus);
  90. return -1;
  91. }
  92. bus->read = ls1021a_mdio_read;
  93. bus->write = ls1021a_mdio_write;
  94. bus->reset = ls1021a_mdio_reset;
  95. strcpy(bus->name, fakebusname);
  96. lsmdio->realbus = miiphy_get_dev_by_name(realbusname);
  97. if (!lsmdio->realbus) {
  98. printf("No bus with name %s\n", realbusname);
  99. free(bus);
  100. free(lsmdio);
  101. return -1;
  102. }
  103. bus->priv = lsmdio;
  104. return mdio_register(bus);
  105. }
  106. int board_eth_init(bd_t *bis)
  107. {
  108. struct fsl_pq_mdio_info mdio_info;
  109. struct tsec_info_struct tsec_info[3];
  110. int num = 0;
  111. #ifdef CONFIG_TSEC1
  112. SET_STD_TSEC_INFO(tsec_info[num], 1);
  113. if (is_serdes_configured(SGMII_TSEC1)) {
  114. puts("eTSEC1 is in sgmii mode\n");
  115. tsec_info[num].flags |= TSEC_SGMII;
  116. tsec_info[num].mii_devname = "LS1021A_SGMII_MDIO";
  117. } else {
  118. tsec_info[num].mii_devname = "LS1021A_RGMII_MDIO";
  119. }
  120. num++;
  121. #endif
  122. #ifdef CONFIG_TSEC2
  123. SET_STD_TSEC_INFO(tsec_info[num], 2);
  124. if (is_serdes_configured(SGMII_TSEC2)) {
  125. puts("eTSEC2 is in sgmii mode\n");
  126. tsec_info[num].flags |= TSEC_SGMII;
  127. tsec_info[num].mii_devname = "LS1021A_SGMII_MDIO";
  128. } else {
  129. tsec_info[num].mii_devname = "LS1021A_RGMII_MDIO";
  130. }
  131. num++;
  132. #endif
  133. #ifdef CONFIG_TSEC3
  134. SET_STD_TSEC_INFO(tsec_info[num], 3);
  135. tsec_info[num].mii_devname = "LS1021A_RGMII_MDIO";
  136. num++;
  137. #endif
  138. if (!num) {
  139. printf("No TSECs initialized\n");
  140. return 0;
  141. }
  142. #ifdef CONFIG_FSL_SGMII_RISER
  143. fsl_sgmii_riser_init(tsec_info, num);
  144. #endif
  145. mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR;
  146. mdio_info.name = DEFAULT_MII_NAME;
  147. fsl_pq_mdio_init(bis, &mdio_info);
  148. /* Register the virtual MDIO front-ends */
  149. ls1021a_mdio_init(DEFAULT_MII_NAME, "LS1021A_RGMII_MDIO");
  150. ls1021a_mdio_init(DEFAULT_MII_NAME, "LS1021A_SGMII_MDIO");
  151. tsec_eth_init(bis, tsec_info, num);
  152. return pci_eth_init(bis);
  153. }