ls1012afrdm.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2017-2018 NXP
  4. */
  5. #include <common.h>
  6. #include <i2c.h>
  7. #include <asm/io.h>
  8. #include <asm/arch/clock.h>
  9. #include <asm/arch/fsl_serdes.h>
  10. #ifdef CONFIG_FSL_LS_PPA
  11. #include <asm/arch/ppa.h>
  12. #endif
  13. #include <asm/arch/mmu.h>
  14. #include <asm/arch/soc.h>
  15. #include <fsl_esdhc.h>
  16. #include <hwconfig.h>
  17. #include <env_internal.h>
  18. #include <fsl_mmdc.h>
  19. #include <netdev.h>
  20. #include <fsl_sec.h>
  21. DECLARE_GLOBAL_DATA_PTR;
  22. static inline int get_board_version(void)
  23. {
  24. uint32_t val;
  25. #ifdef CONFIG_TARGET_LS1012AFRDM
  26. val = 0;
  27. #else
  28. struct ccsr_gpio *pgpio = (void *)(GPIO2_BASE_ADDR);
  29. val = in_be32(&pgpio->gpdat) & BOARD_REV_MASK;/*Get GPIO2 11,12,14*/
  30. #endif
  31. return val;
  32. }
  33. int checkboard(void)
  34. {
  35. #ifdef CONFIG_TARGET_LS1012AFRDM
  36. puts("Board: LS1012AFRDM ");
  37. #else
  38. int rev;
  39. rev = get_board_version();
  40. puts("Board: FRWY-LS1012A ");
  41. puts("Version");
  42. switch (rev) {
  43. case BOARD_REV_A_B:
  44. puts(": RevA/B ");
  45. break;
  46. case BOARD_REV_C:
  47. puts(": RevC ");
  48. break;
  49. default:
  50. puts(": unknown");
  51. break;
  52. }
  53. #endif
  54. return 0;
  55. }
  56. #ifdef CONFIG_TARGET_LS1012AFRWY
  57. int esdhc_status_fixup(void *blob, const char *compat)
  58. {
  59. char esdhc0_path[] = "/soc/esdhc@1560000";
  60. char esdhc1_path[] = "/soc/esdhc@1580000";
  61. do_fixup_by_path(blob, esdhc0_path, "status", "okay",
  62. sizeof("okay"), 1);
  63. do_fixup_by_path(blob, esdhc1_path, "status", "disabled",
  64. sizeof("disabled"), 1);
  65. return 0;
  66. }
  67. #endif
  68. #ifdef CONFIG_TFABOOT
  69. int dram_init(void)
  70. {
  71. #ifdef CONFIG_TARGET_LS1012AFRWY
  72. int board_rev;
  73. #endif
  74. gd->ram_size = tfa_get_dram_size();
  75. if (!gd->ram_size) {
  76. #ifdef CONFIG_TARGET_LS1012AFRWY
  77. board_rev = get_board_version();
  78. if (board_rev & BOARD_REV_C)
  79. gd->ram_size = SYS_SDRAM_SIZE_1024;
  80. else
  81. gd->ram_size = SYS_SDRAM_SIZE_512;
  82. #else
  83. gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
  84. #endif
  85. }
  86. return 0;
  87. }
  88. #else
  89. int dram_init(void)
  90. {
  91. #ifdef CONFIG_TARGET_LS1012AFRWY
  92. int board_rev;
  93. #endif
  94. struct fsl_mmdc_info mparam = {
  95. 0x04180000, /* mdctl */
  96. 0x00030035, /* mdpdc */
  97. 0x12554000, /* mdotc */
  98. 0xbabf7954, /* mdcfg0 */
  99. 0xdb328f64, /* mdcfg1 */
  100. 0x01ff00db, /* mdcfg2 */
  101. 0x00001680, /* mdmisc */
  102. 0x0f3c8000, /* mdref */
  103. 0x00002000, /* mdrwd */
  104. 0x00bf1023, /* mdor */
  105. 0x0000003f, /* mdasp */
  106. 0x0000022a, /* mpodtctrl */
  107. 0xa1390003, /* mpzqhwctrl */
  108. };
  109. #ifdef CONFIG_TARGET_LS1012AFRWY
  110. board_rev = get_board_version();
  111. if (board_rev == BOARD_REV_C) {
  112. mparam.mdctl = 0x05180000;
  113. gd->ram_size = SYS_SDRAM_SIZE_1024;
  114. } else {
  115. gd->ram_size = SYS_SDRAM_SIZE_512;
  116. }
  117. #else
  118. gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
  119. #endif
  120. mmdc_init(&mparam);
  121. #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
  122. /* This will break-before-make MMU for DDR */
  123. update_early_mmu_table();
  124. #endif
  125. return 0;
  126. }
  127. #endif
  128. int board_early_init_f(void)
  129. {
  130. fsl_lsch2_early_init_f();
  131. return 0;
  132. }
  133. int board_init(void)
  134. {
  135. struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR +
  136. CONFIG_SYS_CCI400_OFFSET);
  137. /*
  138. * Set CCI-400 control override register to enable barrier
  139. * transaction
  140. */
  141. if (current_el() == 3)
  142. out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
  143. #ifdef CONFIG_ENV_IS_NOWHERE
  144. gd->env_addr = (ulong)&default_environment[0];
  145. #endif
  146. #ifdef CONFIG_FSL_CAAM
  147. sec_init();
  148. #endif
  149. #ifdef CONFIG_FSL_LS_PPA
  150. ppa_init();
  151. #endif
  152. return 0;
  153. }
  154. int ft_board_setup(void *blob, bd_t *bd)
  155. {
  156. arch_fixup_fdt(blob);
  157. ft_cpu_setup(blob, bd);
  158. return 0;
  159. }