flash.c 7.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2000-2003
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. */
  6. #include <common.h>
  7. #include <console.h>
  8. #include <cpu_func.h>
  9. #include <irq_func.h>
  10. #define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
  11. #define FLASH_BANK_SIZE 0x200000
  12. flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
  13. void flash_print_info (flash_info_t * info)
  14. {
  15. int i;
  16. switch (info->flash_id & FLASH_VENDMASK) {
  17. case (AMD_MANUFACT & FLASH_VENDMASK):
  18. printf ("AMD: ");
  19. break;
  20. default:
  21. printf ("Unknown Vendor ");
  22. break;
  23. }
  24. switch (info->flash_id & FLASH_TYPEMASK) {
  25. case (AMD_ID_PL160CB & FLASH_TYPEMASK):
  26. printf ("AM29PL160CB (16Mbit)\n");
  27. break;
  28. default:
  29. printf ("Unknown Chip Type\n");
  30. goto Done;
  31. break;
  32. }
  33. printf (" Size: %ld MB in %d Sectors\n",
  34. info->size >> 20, info->sector_count);
  35. printf (" Sector Start Addresses:");
  36. for (i = 0; i < info->sector_count; i++) {
  37. if ((i % 5) == 0) {
  38. printf ("\n ");
  39. }
  40. printf (" %08lX%s", info->start[i],
  41. info->protect[i] ? " (RO)" : " ");
  42. }
  43. printf ("\n");
  44. Done:
  45. return;
  46. }
  47. unsigned long flash_init (void)
  48. {
  49. int i, j;
  50. ulong size = 0;
  51. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  52. ulong flashbase = 0;
  53. flash_info[i].flash_id =
  54. (AMD_MANUFACT & FLASH_VENDMASK) |
  55. (AMD_ID_PL160CB & FLASH_TYPEMASK);
  56. flash_info[i].size = FLASH_BANK_SIZE;
  57. flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
  58. memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
  59. if (i == 0)
  60. flashbase = PHYS_FLASH_1;
  61. else
  62. panic ("configured to many flash banks!\n");
  63. for (j = 0; j < flash_info[i].sector_count; j++) {
  64. if (j == 0) {
  65. /* 1st is 16 KiB */
  66. flash_info[i].start[j] = flashbase;
  67. }
  68. if ((j >= 1) && (j <= 2)) {
  69. /* 2nd and 3rd are 8 KiB */
  70. flash_info[i].start[j] =
  71. flashbase + 0x4000 + 0x2000 * (j - 1);
  72. }
  73. if (j == 3) {
  74. /* 4th is 224 KiB */
  75. flash_info[i].start[j] = flashbase + 0x8000;
  76. }
  77. if ((j >= 4) && (j <= 10)) {
  78. /* rest is 256 KiB */
  79. flash_info[i].start[j] =
  80. flashbase + 0x40000 + 0x40000 * (j -
  81. 4);
  82. }
  83. }
  84. size += flash_info[i].size;
  85. }
  86. flash_protect (FLAG_PROTECT_SET,
  87. CONFIG_SYS_FLASH_BASE,
  88. CONFIG_SYS_FLASH_BASE + 0x3ffff, &flash_info[0]);
  89. return size;
  90. }
  91. #define CMD_READ_ARRAY 0x00F0
  92. #define CMD_UNLOCK1 0x00AA
  93. #define CMD_UNLOCK2 0x0055
  94. #define CMD_ERASE_SETUP 0x0080
  95. #define CMD_ERASE_CONFIRM 0x0030
  96. #define CMD_PROGRAM 0x00A0
  97. #define CMD_UNLOCK_BYPASS 0x0020
  98. #define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555<<1)))
  99. #define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA<<1)))
  100. #define BIT_ERASE_DONE 0x0080
  101. #define BIT_RDY_MASK 0x0080
  102. #define BIT_PROGRAM_ERROR 0x0020
  103. #define BIT_TIMEOUT 0x80000000 /* our flag */
  104. #define READY 1
  105. #define ERR 2
  106. #define TMO 4
  107. int flash_erase (flash_info_t * info, int s_first, int s_last)
  108. {
  109. ulong result;
  110. int iflag, cflag, prot, sect;
  111. int rc = ERR_OK;
  112. int chip1;
  113. ulong start;
  114. /* first look for protection bits */
  115. if (info->flash_id == FLASH_UNKNOWN)
  116. return ERR_UNKNOWN_FLASH_TYPE;
  117. if ((s_first < 0) || (s_first > s_last)) {
  118. return ERR_INVAL;
  119. }
  120. if ((info->flash_id & FLASH_VENDMASK) !=
  121. (AMD_MANUFACT & FLASH_VENDMASK)) {
  122. return ERR_UNKNOWN_FLASH_VENDOR;
  123. }
  124. prot = 0;
  125. for (sect = s_first; sect <= s_last; ++sect) {
  126. if (info->protect[sect]) {
  127. prot++;
  128. }
  129. }
  130. if (prot)
  131. return ERR_PROTECTED;
  132. /*
  133. * Disable interrupts which might cause a timeout
  134. * here. Remember that our exception vectors are
  135. * at address 0 in the flash, and we don't want a
  136. * (ticker) exception to happen while the flash
  137. * chip is in programming mode.
  138. */
  139. cflag = icache_status();
  140. icache_disable();
  141. iflag = disable_interrupts();
  142. printf ("\n");
  143. /* Start erase on unprotected sectors */
  144. for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
  145. printf ("Erasing sector %2d ... ", sect);
  146. /* arm simple, non interrupt dependent timer */
  147. start = get_timer(0);
  148. if (info->protect[sect] == 0) { /* not protected */
  149. volatile u16 *addr =
  150. (volatile u16 *) (info->start[sect]);
  151. MEM_FLASH_ADDR1 = CMD_UNLOCK1;
  152. MEM_FLASH_ADDR2 = CMD_UNLOCK2;
  153. MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
  154. MEM_FLASH_ADDR1 = CMD_UNLOCK1;
  155. MEM_FLASH_ADDR2 = CMD_UNLOCK2;
  156. *addr = CMD_ERASE_CONFIRM;
  157. /* wait until flash is ready */
  158. chip1 = 0;
  159. do {
  160. result = *addr;
  161. /* check timeout */
  162. if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  163. MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
  164. chip1 = TMO;
  165. break;
  166. }
  167. if (!chip1
  168. && (result & 0xFFFF) & BIT_ERASE_DONE)
  169. chip1 = READY;
  170. } while (!chip1);
  171. MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
  172. if (chip1 == ERR) {
  173. rc = ERR_PROG_ERROR;
  174. goto outahere;
  175. }
  176. if (chip1 == TMO) {
  177. rc = ERR_TIMEOUT;
  178. goto outahere;
  179. }
  180. printf ("ok.\n");
  181. } else { /* it was protected */
  182. printf ("protected!\n");
  183. }
  184. }
  185. if (ctrlc ())
  186. printf ("User Interrupt!\n");
  187. outahere:
  188. /* allow flash to settle - wait 10 ms */
  189. udelay (10000);
  190. if (iflag)
  191. enable_interrupts();
  192. if (cflag)
  193. icache_enable();
  194. return rc;
  195. }
  196. static int write_word (flash_info_t * info, ulong dest, ulong data)
  197. {
  198. volatile u16 *addr = (volatile u16 *) dest;
  199. ulong result;
  200. int rc = ERR_OK;
  201. int cflag, iflag;
  202. int chip1;
  203. ulong start;
  204. /*
  205. * Check if Flash is (sufficiently) erased
  206. */
  207. result = *addr;
  208. if ((result & data) != data)
  209. return ERR_NOT_ERASED;
  210. /*
  211. * Disable interrupts which might cause a timeout
  212. * here. Remember that our exception vectors are
  213. * at address 0 in the flash, and we don't want a
  214. * (ticker) exception to happen while the flash
  215. * chip is in programming mode.
  216. */
  217. cflag = icache_status();
  218. icache_disable();
  219. iflag = disable_interrupts();
  220. MEM_FLASH_ADDR1 = CMD_UNLOCK1;
  221. MEM_FLASH_ADDR2 = CMD_UNLOCK2;
  222. MEM_FLASH_ADDR1 = CMD_PROGRAM;
  223. *addr = data;
  224. /* arm simple, non interrupt dependent timer */
  225. start = get_timer(0);
  226. /* wait until flash is ready */
  227. chip1 = 0;
  228. do {
  229. result = *addr;
  230. /* check timeout */
  231. if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  232. chip1 = ERR | TMO;
  233. break;
  234. }
  235. if (!chip1 && ((result & 0x80) == (data & 0x80)))
  236. chip1 = READY;
  237. } while (!chip1);
  238. *addr = CMD_READ_ARRAY;
  239. if (chip1 == ERR || *addr != data)
  240. rc = ERR_PROG_ERROR;
  241. if (iflag)
  242. enable_interrupts();
  243. if (cflag)
  244. icache_enable();
  245. return rc;
  246. }
  247. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  248. {
  249. ulong wp, data;
  250. int rc;
  251. if (addr & 1) {
  252. printf ("unaligned destination not supported\n");
  253. return ERR_ALIGN;
  254. }
  255. #if 0
  256. if (cnt & 1) {
  257. printf ("odd transfer sizes not supported\n");
  258. return ERR_ALIGN;
  259. }
  260. #endif
  261. wp = addr;
  262. if (addr & 1) {
  263. data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *)
  264. src);
  265. if ((rc = write_word (info, wp - 1, data)) != 0) {
  266. return (rc);
  267. }
  268. src += 1;
  269. wp += 1;
  270. cnt -= 1;
  271. }
  272. while (cnt >= 2) {
  273. data = *((volatile u16 *) src);
  274. if ((rc = write_word (info, wp, data)) != 0) {
  275. return (rc);
  276. }
  277. src += 2;
  278. wp += 2;
  279. cnt -= 2;
  280. }
  281. if (cnt == 1) {
  282. data = (*((volatile u8 *) src) << 8) |
  283. *((volatile u8 *) (wp + 1));
  284. if ((rc = write_word (info, wp, data)) != 0) {
  285. return (rc);
  286. }
  287. src += 1;
  288. wp += 1;
  289. cnt -= 1;
  290. }
  291. return ERR_OK;
  292. }