platinum.h 2.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2014 Stefan Roese <sr@denx.de>
  4. */
  5. #ifndef _PLATINUM_H_
  6. #define _PLATINUM_H_
  7. #include <miiphy.h>
  8. #include <asm/arch/crm_regs.h>
  9. #include <asm/io.h>
  10. /* Defines */
  11. #define ECSPI1_PAD_CLK (PAD_CTL_SRE_SLOW | PAD_CTL_PUS_100K_DOWN | \
  12. PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \
  13. PAD_CTL_HYS)
  14. #define ECSPI2_PAD_CLK (PAD_CTL_SRE_FAST | PAD_CTL_PUS_100K_DOWN | \
  15. PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
  16. PAD_CTL_HYS)
  17. #define ECSPI_PAD_MOSI (PAD_CTL_SRE_SLOW | PAD_CTL_PUS_100K_DOWN | \
  18. PAD_CTL_SPEED_LOW | PAD_CTL_DSE_120ohm | \
  19. PAD_CTL_HYS)
  20. #define ECSPI_PAD_MISO (PAD_CTL_SRE_FAST | PAD_CTL_PUS_100K_DOWN | \
  21. PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \
  22. PAD_CTL_HYS)
  23. #define ECSPI_PAD_SS (PAD_CTL_SRE_SLOW | PAD_CTL_PUS_100K_UP | \
  24. PAD_CTL_SPEED_LOW | PAD_CTL_DSE_120ohm | \
  25. PAD_CTL_HYS)
  26. #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
  27. PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
  28. #define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
  29. PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
  30. PAD_CTL_ODE | PAD_CTL_SRE_FAST)
  31. #define I2C_PAD_CTRL_SCL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_LOW | \
  32. PAD_CTL_DSE_80ohm | PAD_CTL_HYS | \
  33. PAD_CTL_ODE | PAD_CTL_SRE_SLOW)
  34. #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
  35. PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | \
  36. PAD_CTL_HYS)
  37. #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \
  38. PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | \
  39. PAD_CTL_HYS)
  40. #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
  41. #define PC_SCL MUX_PAD_CTRL(I2C_PAD_CTRL_SCL)
  42. /* Prototypes */
  43. int platinum_setup_enet(void);
  44. int platinum_setup_i2c(void);
  45. int platinum_setup_spi(void);
  46. int platinum_setup_uart(void);
  47. int platinum_phy_config(struct phy_device *phydev);
  48. int platinum_init_gpio(void);
  49. int platinum_init_usb(void);
  50. int platinum_init_finished(void);
  51. static inline void ccgr_init(void)
  52. {
  53. struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
  54. writel(0x00C03F3F, &ccm->CCGR0);
  55. writel(0x0030FC03, &ccm->CCGR1);
  56. writel(0x0FFFC000, &ccm->CCGR2);
  57. writel(0x3FF00000, &ccm->CCGR3);
  58. writel(0xFFFFF300, &ccm->CCGR4); /* enable NAND/GPMI/BCH clks */
  59. writel(0x0F0000C3, &ccm->CCGR5);
  60. writel(0x000003FF, &ccm->CCGR6);
  61. }
  62. #endif /* _PLATINUM_H_ */