nt5cc256m16cp.cfg 2.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2013 Boundary Devices
  4. */
  5. /* ZQ Calibration */
  6. DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xa1390003
  7. DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001F001F
  8. DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x001F001F
  9. DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x001F001F
  10. DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x001F001F
  11. /*
  12. * DQS gating, read delay, write delay calibration values
  13. */
  14. DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42190217
  15. DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x017B017B
  16. DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x4176017B
  17. DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x015F016C
  18. DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4C4C4D4C
  19. DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4A4D4C48
  20. DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3F3F3F40
  21. DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x3538382E
  22. /* read data bit delay */
  23. DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333
  24. DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333
  25. DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333
  26. DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333
  27. DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333
  28. DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333
  29. DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333
  30. DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333
  31. /* Complete calibration by forced measurment */
  32. DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800
  33. DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800
  34. /* in DDR3, 64-bit mode, only MMDC0 is initiated */
  35. DATA 4, MX6_MMDC_P0_MDPDC, 0x00020025
  36. DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030
  37. DATA 4, MX6_MMDC_P0_MDCFG0, 0x676B5313
  38. DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8B63
  39. DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB
  40. DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740
  41. DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000
  42. DATA 4, MX6_MMDC_P0_MDRWD, 0x000026d2
  43. DATA 4, MX6_MMDC_P0_MDOR, 0x006B1023
  44. DATA 4, MX6_MMDC_P0_MDASP, 0x00000027
  45. DATA 4, MX6_MMDC_P0_MDCTL, 0x84190000
  46. DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032
  47. DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033
  48. DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031
  49. DATA 4, MX6_MMDC_P0_MDSCR, 0x05208030
  50. DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040
  51. /* final ddr setup */
  52. DATA 4, MX6_MMDC_P0_MDREF, 0x00005800
  53. DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00011117
  54. DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00011117
  55. DATA 4, MX6_MMDC_P0_MDPDC, 0x00025565
  56. DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006
  57. DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000