cache-pl310.c 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2010
  4. * Texas Instruments, <www.ti.com>
  5. * Aneesh V <aneesh@ti.com>
  6. */
  7. #include <linux/types.h>
  8. #include <asm/io.h>
  9. #include <asm/armv7.h>
  10. #include <asm/pl310.h>
  11. #include <config.h>
  12. #include <common.h>
  13. struct pl310_regs *const pl310 = (struct pl310_regs *)CONFIG_SYS_PL310_BASE;
  14. static void pl310_cache_sync(void)
  15. {
  16. writel(0, &pl310->pl310_cache_sync);
  17. }
  18. static void pl310_background_op_all_ways(u32 *op_reg)
  19. {
  20. u32 assoc_16, associativity, way_mask;
  21. assoc_16 = readl(&pl310->pl310_aux_ctrl) &
  22. PL310_AUX_CTRL_ASSOCIATIVITY_MASK;
  23. if (assoc_16)
  24. associativity = 16;
  25. else
  26. associativity = 8;
  27. way_mask = (1 << associativity) - 1;
  28. /* Invalidate all ways */
  29. writel(way_mask, op_reg);
  30. /* Wait for all ways to be invalidated */
  31. while (readl(op_reg) & way_mask)
  32. ;
  33. pl310_cache_sync();
  34. }
  35. void v7_outer_cache_inval_all(void)
  36. {
  37. pl310_background_op_all_ways(&pl310->pl310_inv_way);
  38. }
  39. void v7_outer_cache_flush_all(void)
  40. {
  41. pl310_background_op_all_ways(&pl310->pl310_clean_inv_way);
  42. }
  43. /* Flush(clean invalidate) memory from start to stop-1 */
  44. void v7_outer_cache_flush_range(u32 start, u32 stop)
  45. {
  46. /* PL310 currently supports only 32 bytes cache line */
  47. u32 pa, line_size = 32;
  48. /*
  49. * Align to the beginning of cache-line - this ensures that
  50. * the first 5 bits are 0 as required by PL310 TRM
  51. */
  52. start &= ~(line_size - 1);
  53. for (pa = start; pa < stop; pa = pa + line_size)
  54. writel(pa, &pl310->pl310_clean_inv_line_pa);
  55. pl310_cache_sync();
  56. }
  57. /* invalidate memory from start to stop-1 */
  58. void v7_outer_cache_inval_range(u32 start, u32 stop)
  59. {
  60. /* PL310 currently supports only 32 bytes cache line */
  61. u32 pa, line_size = 32;
  62. /*
  63. * If start address is not aligned to cache-line do not
  64. * invalidate the first cache-line
  65. */
  66. if (start & (line_size - 1)) {
  67. printf("ERROR: %s - start address is not aligned - 0x%08x\n",
  68. __func__, start);
  69. /* move to next cache line */
  70. start = (start + line_size - 1) & ~(line_size - 1);
  71. }
  72. /*
  73. * If stop address is not aligned to cache-line do not
  74. * invalidate the last cache-line
  75. */
  76. if (stop & (line_size - 1)) {
  77. printf("ERROR: %s - stop address is not aligned - 0x%08x\n",
  78. __func__, stop);
  79. /* align to the beginning of this cache line */
  80. stop &= ~(line_size - 1);
  81. }
  82. for (pa = start; pa < stop; pa = pa + line_size)
  83. writel(pa, &pl310->pl310_inv_line_pa);
  84. pl310_cache_sync();
  85. }