ARMCM0.h 4.3 KB

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  1. /**************************************************************************//**
  2. * @file ARMCM0.h
  3. * @brief CMSIS Core Peripheral Access Layer Header File for
  4. * ARMCM0 Device
  5. * @version V5.3.1
  6. * @date 09. July 2018
  7. ******************************************************************************/
  8. /*
  9. * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
  10. *
  11. * SPDX-License-Identifier: Apache-2.0
  12. *
  13. * Licensed under the Apache License, Version 2.0 (the License); you may
  14. * not use this file except in compliance with the License.
  15. * You may obtain a copy of the License at
  16. *
  17. * www.apache.org/licenses/LICENSE-2.0
  18. *
  19. * Unless required by applicable law or agreed to in writing, software
  20. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  21. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  22. * See the License for the specific language governing permissions and
  23. * limitations under the License.
  24. */
  25. #ifndef ARMCM0_H
  26. #define ARMCM0_H
  27. #ifdef __cplusplus
  28. extern "C" {
  29. #endif
  30. /* ------------------------- Interrupt Number Definition ------------------------ */
  31. typedef enum IRQn
  32. {
  33. /* ------------------- Processor Exceptions Numbers ----------------------------- */
  34. NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */
  35. HardFault_IRQn = -13, /* 3 HardFault Interrupt */
  36. SVCall_IRQn = -5, /* 11 SV Call Interrupt */
  37. PendSV_IRQn = -2, /* 14 Pend SV Interrupt */
  38. SysTick_IRQn = -1, /* 15 System Tick Interrupt */
  39. /* ------------------- Processor Interrupt Numbers ------------------------------ */
  40. Interrupt0_IRQn = 0,
  41. Interrupt1_IRQn = 1,
  42. Interrupt2_IRQn = 2,
  43. Interrupt3_IRQn = 3,
  44. Interrupt4_IRQn = 4,
  45. Interrupt5_IRQn = 5,
  46. Interrupt6_IRQn = 6,
  47. Interrupt7_IRQn = 7,
  48. Interrupt8_IRQn = 8,
  49. Interrupt9_IRQn = 9
  50. /* Interrupts 10 .. 31 are left out */
  51. } IRQn_Type;
  52. /* ================================================================================ */
  53. /* ================ Processor and Core Peripheral Section ================ */
  54. /* ================================================================================ */
  55. /* ------- Start of section using anonymous unions and disabling warnings ------- */
  56. #if defined (__CC_ARM)
  57. #pragma push
  58. #pragma anon_unions
  59. #elif defined (__ICCARM__)
  60. #pragma language=extended
  61. #elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
  62. #pragma clang diagnostic push
  63. #pragma clang diagnostic ignored "-Wc11-extensions"
  64. #pragma clang diagnostic ignored "-Wreserved-id-macro"
  65. #elif defined (__GNUC__)
  66. /* anonymous unions are enabled by default */
  67. #elif defined (__TMS470__)
  68. /* anonymous unions are enabled by default */
  69. #elif defined (__TASKING__)
  70. #pragma warning 586
  71. #elif defined (__CSMC__)
  72. /* anonymous unions are enabled by default */
  73. #else
  74. #warning Not supported compiler type
  75. #endif
  76. /* -------- Configuration of Core Peripherals ----------------------------------- */
  77. #define __CM0_REV 0x0000U /* Core revision r0p0 */
  78. #define __MPU_PRESENT 0U /* no MPU present */
  79. #define __VTOR_PRESENT 0U /* no VTOR present */
  80. #define __NVIC_PRIO_BITS 2U /* Number of Bits used for Priority Levels */
  81. #define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */
  82. #include "core_cm0.h" /* Processor and core peripherals */
  83. #include "system_ARMCM0.h" /* System Header */
  84. /* -------- End of section using anonymous unions and disabling warnings -------- */
  85. #if defined (__CC_ARM)
  86. #pragma pop
  87. #elif defined (__ICCARM__)
  88. /* leave anonymous unions enabled */
  89. #elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
  90. #pragma clang diagnostic pop
  91. #elif defined (__GNUC__)
  92. /* anonymous unions are enabled by default */
  93. #elif defined (__TMS470__)
  94. /* anonymous unions are enabled by default */
  95. #elif defined (__TASKING__)
  96. #pragma warning restore
  97. #elif defined (__CSMC__)
  98. /* anonymous unions are enabled by default */
  99. #else
  100. #warning Not supported compiler type
  101. #endif
  102. #ifdef __cplusplus
  103. }
  104. #endif
  105. #endif /* ARMCM0_H */