am335x-fb.c 7.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2013-2018 Hannes Schmelzer <oe5hpm@oevsv.at>
  4. * B&R Industrial Automation GmbH - http://www.br-automation.com
  5. *
  6. * minimal framebuffer driver for TI's AM335x SoC to be compatible with
  7. * Wolfgang Denk's LCD-Framework (CONFIG_LCD, common/lcd.c)
  8. *
  9. * - supporting 16/24/32bit RGB/TFT raster Mode (not using palette)
  10. * - sets up LCD controller as in 'am335x_lcdpanel' struct given
  11. * - starts output DMA from gd->fb_base buffer
  12. */
  13. #include <common.h>
  14. #include <asm/io.h>
  15. #include <asm/arch/hardware.h>
  16. #include <asm/arch/omap.h>
  17. #include <asm/arch/clock.h>
  18. #include <asm/arch/sys_proto.h>
  19. #include <lcd.h>
  20. #include "am335x-fb.h"
  21. #if !defined(LCD_CNTL_BASE)
  22. #error "hw-base address of LCD-Controller (LCD_CNTL_BASE) not defined!"
  23. #endif
  24. #define LCDC_FMAX 200000000
  25. /* LCD Control Register */
  26. #define LCD_CLK_DIVISOR(x) ((x) << 8)
  27. #define LCD_RASTER_MODE 0x01
  28. /* LCD Clock Enable Register */
  29. #define LCD_CORECLKEN (0x01 << 0)
  30. #define LCD_LIDDCLKEN (0x01 << 1)
  31. #define LCD_DMACLKEN (0x01 << 2)
  32. /* LCD DMA Control Register */
  33. #define LCD_DMA_BURST_SIZE(x) ((x) << 4)
  34. #define LCD_DMA_BURST_1 0x0
  35. #define LCD_DMA_BURST_2 0x1
  36. #define LCD_DMA_BURST_4 0x2
  37. #define LCD_DMA_BURST_8 0x3
  38. #define LCD_DMA_BURST_16 0x4
  39. /* LCD Timing_0 Register */
  40. #define LCD_HBPLSB(x) ((((x)-1) & 0xFF) << 24)
  41. #define LCD_HFPLSB(x) ((((x)-1) & 0xFF) << 16)
  42. #define LCD_HSWLSB(x) ((((x)-1) & 0x3F) << 10)
  43. #define LCD_HORLSB(x) (((((x) >> 4)-1) & 0x3F) << 4)
  44. #define LCD_HORMSB(x) (((((x) >> 4)-1) & 0x40) >> 4)
  45. /* LCD Timing_1 Register */
  46. #define LCD_VBP(x) ((x) << 24)
  47. #define LCD_VFP(x) ((x) << 16)
  48. #define LCD_VSW(x) (((x)-1) << 10)
  49. #define LCD_VERLSB(x) (((x)-1) & 0x3FF)
  50. /* LCD Timing_2 Register */
  51. #define LCD_HSWMSB(x) ((((x)-1) & 0x3C0) << 21)
  52. #define LCD_VERMSB(x) ((((x)-1) & 0x400) << 16)
  53. #define LCD_HBPMSB(x) ((((x)-1) & 0x300) >> 4)
  54. #define LCD_HFPMSB(x) ((((x)-1) & 0x300) >> 8)
  55. #define LCD_INVMASK(x) ((x) & 0x3F00000)
  56. /* LCD Raster Ctrl Register */
  57. #define LCD_TFT_24BPP_MODE (1 << 25)
  58. #define LCD_TFT_24BPP_UNPACK (1 << 26)
  59. #define LCD_PALMODE_RAWDATA (0x02 << 20)
  60. #define LCD_TFT_MODE (0x01 << 7)
  61. #define LCD_RASTER_ENABLE (0x01 << 0)
  62. /* Macro definitions */
  63. #define FBSIZE(x) ((x->hactive * x->vactive * x->bpp) >> 3)
  64. struct am335x_lcdhw {
  65. unsigned int pid; /* 0x00 */
  66. unsigned int ctrl; /* 0x04 */
  67. unsigned int gap0; /* 0x08 */
  68. unsigned int lidd_ctrl; /* 0x0C */
  69. unsigned int lidd_cs0_conf; /* 0x10 */
  70. unsigned int lidd_cs0_addr; /* 0x14 */
  71. unsigned int lidd_cs0_data; /* 0x18 */
  72. unsigned int lidd_cs1_conf; /* 0x1C */
  73. unsigned int lidd_cs1_addr; /* 0x20 */
  74. unsigned int lidd_cs1_data; /* 0x24 */
  75. unsigned int raster_ctrl; /* 0x28 */
  76. unsigned int raster_timing0; /* 0x2C */
  77. unsigned int raster_timing1; /* 0x30 */
  78. unsigned int raster_timing2; /* 0x34 */
  79. unsigned int raster_subpanel; /* 0x38 */
  80. unsigned int raster_subpanel2; /* 0x3C */
  81. unsigned int lcddma_ctrl; /* 0x40 */
  82. unsigned int lcddma_fb0_base; /* 0x44 */
  83. unsigned int lcddma_fb0_ceiling; /* 0x48 */
  84. unsigned int lcddma_fb1_base; /* 0x4C */
  85. unsigned int lcddma_fb1_ceiling; /* 0x50 */
  86. unsigned int sysconfig; /* 0x54 */
  87. unsigned int irqstatus_raw; /* 0x58 */
  88. unsigned int irqstatus; /* 0x5C */
  89. unsigned int irqenable_set; /* 0x60 */
  90. unsigned int irqenable_clear; /* 0x64 */
  91. unsigned int gap1; /* 0x68 */
  92. unsigned int clkc_enable; /* 0x6C */
  93. unsigned int clkc_reset; /* 0x70 */
  94. };
  95. static struct am335x_lcdhw *lcdhw = (void *)LCD_CNTL_BASE;
  96. DECLARE_GLOBAL_DATA_PTR;
  97. int lcd_get_size(int *line_length)
  98. {
  99. *line_length = (panel_info.vl_col * NBITS(panel_info.vl_bpix)) / 8;
  100. return *line_length * panel_info.vl_row + 0x20;
  101. }
  102. int am335xfb_init(struct am335x_lcdpanel *panel)
  103. {
  104. u32 raster_ctrl = 0;
  105. struct cm_dpll *const cmdpll = (struct cm_dpll *)CM_DPLL;
  106. struct dpll_params dpll_disp = { 1, 0, 1, -1, -1, -1, -1 };
  107. unsigned int m, n, d, best_d = 2;
  108. int err = 0, err_r = 0;
  109. if (gd->fb_base == 0) {
  110. printf("ERROR: no valid fb_base stored in GLOBAL_DATA_PTR!\n");
  111. return -1;
  112. }
  113. if (panel == NULL) {
  114. printf("ERROR: missing ptr to am335x_lcdpanel!\n");
  115. return -1;
  116. }
  117. /* We can already set the bits for the raster_ctrl in this check */
  118. switch (panel->bpp) {
  119. case 16:
  120. break;
  121. case 32:
  122. raster_ctrl |= LCD_TFT_24BPP_UNPACK;
  123. /* fallthrough */
  124. case 24:
  125. raster_ctrl |= LCD_TFT_24BPP_MODE;
  126. break;
  127. default:
  128. pr_err("am335x-fb: invalid bpp value: %d\n", panel->bpp);
  129. return -1;
  130. }
  131. /* check given clock-frequency */
  132. if (panel->pxl_clk > (LCDC_FMAX / 2)) {
  133. pr_err("am335x-fb: requested pxl-clk: %d not supported!\n",
  134. panel->pxl_clk);
  135. return -1;
  136. }
  137. debug("setting up LCD-Controller for %dx%dx%d (hfp=%d,hbp=%d,hsw=%d / ",
  138. panel->hactive, panel->vactive, panel->bpp,
  139. panel->hfp, panel->hbp, panel->hsw);
  140. debug("vfp=%d,vbp=%d,vsw=%d / clk=%d)\n",
  141. panel->vfp, panel->vfp, panel->vsw, panel->pxl_clk);
  142. debug("using frambuffer at 0x%08x with size %d.\n",
  143. (unsigned int)gd->fb_base, FBSIZE(panel));
  144. /* setup display pll for requested clock frequency */
  145. err = panel->pxl_clk;
  146. err_r = err;
  147. for (d = 2; d < 255; d++) {
  148. for (m = 2; m < 2047; m++) {
  149. if ((V_OSCK * m) < (panel->pxl_clk * d))
  150. continue;
  151. n = (V_OSCK * m) / (panel->pxl_clk * d);
  152. if (n > 127)
  153. break;
  154. if (((V_OSCK * m) / n) > LCDC_FMAX)
  155. break;
  156. err = abs((V_OSCK * m) / n / d - panel->pxl_clk);
  157. if (err < err_r) {
  158. err_r = err;
  159. dpll_disp.m = m;
  160. dpll_disp.n = n;
  161. best_d = d;
  162. }
  163. }
  164. }
  165. debug("%s: PLL: best error %d Hz (M %d, N %d, DISP %d)\n",
  166. __func__, err_r, dpll_disp.m, dpll_disp.n, best_d);
  167. do_setup_dpll(&dpll_disp_regs, &dpll_disp);
  168. /* clock source for LCDC from dispPLL M2 */
  169. writel(0x0, &cmdpll->clklcdcpixelclk);
  170. /* palette default entry */
  171. memset((void *)gd->fb_base, 0, 0x20);
  172. *(unsigned int *)gd->fb_base = 0x4000;
  173. /* point fb behind palette */
  174. gd->fb_base += 0x20;
  175. /* turn ON display through powercontrol function if accessible */
  176. if (panel->panel_power_ctrl != NULL)
  177. panel->panel_power_ctrl(1);
  178. debug("am335x-fb: wait for stable power ...\n");
  179. mdelay(panel->pup_delay);
  180. lcdhw->clkc_enable = LCD_CORECLKEN | LCD_LIDDCLKEN | LCD_DMACLKEN;
  181. lcdhw->raster_ctrl = 0;
  182. lcdhw->ctrl = LCD_CLK_DIVISOR(best_d) | LCD_RASTER_MODE;
  183. lcdhw->lcddma_fb0_base = gd->fb_base;
  184. lcdhw->lcddma_fb0_ceiling = gd->fb_base + FBSIZE(panel);
  185. lcdhw->lcddma_fb1_base = gd->fb_base;
  186. lcdhw->lcddma_fb1_ceiling = gd->fb_base + FBSIZE(panel);
  187. lcdhw->lcddma_ctrl = LCD_DMA_BURST_SIZE(LCD_DMA_BURST_16);
  188. lcdhw->raster_timing0 = LCD_HORLSB(panel->hactive) |
  189. LCD_HORMSB(panel->hactive) |
  190. LCD_HFPLSB(panel->hfp) |
  191. LCD_HBPLSB(panel->hbp) |
  192. LCD_HSWLSB(panel->hsw);
  193. lcdhw->raster_timing1 = LCD_VBP(panel->vbp) |
  194. LCD_VFP(panel->vfp) |
  195. LCD_VSW(panel->vsw) |
  196. LCD_VERLSB(panel->vactive);
  197. lcdhw->raster_timing2 = LCD_HSWMSB(panel->hsw) |
  198. LCD_VERMSB(panel->vactive) |
  199. LCD_INVMASK(panel->pol) |
  200. LCD_HBPMSB(panel->hbp) |
  201. LCD_HFPMSB(panel->hfp) |
  202. 0x0000FF00; /* clk cycles for ac-bias */
  203. lcdhw->raster_ctrl = raster_ctrl |
  204. LCD_PALMODE_RAWDATA |
  205. LCD_TFT_MODE |
  206. LCD_RASTER_ENABLE;
  207. debug("am335x-fb: waiting picture to be stable.\n.");
  208. mdelay(panel->pon_delay);
  209. return 0;
  210. }