ds4510.c 8.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2008 Extreme Engineering Solutions, Inc.
  4. */
  5. /*
  6. * Driver for DS4510, a CPU supervisor with integrated EEPROM, SRAM,
  7. * and 4 programmable non-volatile GPIO pins.
  8. */
  9. #include <common.h>
  10. #include <i2c.h>
  11. #include <command.h>
  12. #include "ds4510.h"
  13. enum {
  14. DS4510_CMD_INFO,
  15. DS4510_CMD_DEVICE,
  16. DS4510_CMD_NV,
  17. DS4510_CMD_RSTDELAY,
  18. DS4510_CMD_OUTPUT,
  19. DS4510_CMD_INPUT,
  20. DS4510_CMD_PULLUP,
  21. DS4510_CMD_EEPROM,
  22. DS4510_CMD_SEEPROM,
  23. DS4510_CMD_SRAM,
  24. };
  25. /*
  26. * Write to DS4510, taking page boundaries into account
  27. */
  28. static int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)
  29. {
  30. int wrlen;
  31. int i = 0;
  32. do {
  33. wrlen = DS4510_EEPROM_PAGE_SIZE -
  34. DS4510_EEPROM_PAGE_OFFSET(offset);
  35. if (count < wrlen)
  36. wrlen = count;
  37. if (i2c_write(chip, offset, 1, &buf[i], wrlen))
  38. return -1;
  39. /*
  40. * This delay isn't needed for SRAM writes but shouldn't delay
  41. * things too much, so do it unconditionally for simplicity
  42. */
  43. udelay(DS4510_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
  44. count -= wrlen;
  45. offset += wrlen;
  46. i += wrlen;
  47. } while (count > 0);
  48. return 0;
  49. }
  50. /*
  51. * General read from DS4510
  52. */
  53. static int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count)
  54. {
  55. return i2c_read(chip, offset, 1, buf, count);
  56. }
  57. /*
  58. * Write SEE bit in config register.
  59. * nv = 0 - Writes to SEEPROM registers behave like EEPROM
  60. * nv = 1 - Writes to SEEPROM registers behave like SRAM
  61. */
  62. static int ds4510_see_write(uint8_t chip, uint8_t nv)
  63. {
  64. uint8_t data;
  65. if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
  66. return -1;
  67. if (nv) /* Treat SEEPROM bits as EEPROM */
  68. data &= ~DS4510_CFG_SEE;
  69. else /* Treat SEEPROM bits as SRAM */
  70. data |= DS4510_CFG_SEE;
  71. return ds4510_mem_write(chip, DS4510_CFG, &data, 1);
  72. }
  73. /*
  74. * Write de-assertion of reset signal delay
  75. */
  76. static int ds4510_rstdelay_write(uint8_t chip, uint8_t delay)
  77. {
  78. uint8_t data;
  79. if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1))
  80. return -1;
  81. data &= ~DS4510_RSTDELAY_MASK;
  82. data |= delay & DS4510_RSTDELAY_MASK;
  83. return ds4510_mem_write(chip, DS4510_RSTDELAY, &data, 1);
  84. }
  85. /*
  86. * Write pullup characteristics of IO pins
  87. */
  88. static int ds4510_pullup_write(uint8_t chip, uint8_t val)
  89. {
  90. val &= DS4510_IO_MASK;
  91. return ds4510_mem_write(chip, DS4510_PULLUP, (uint8_t *)&val, 1);
  92. }
  93. /*
  94. * Read pullup characteristics of IO pins
  95. */
  96. static int ds4510_pullup_read(uint8_t chip)
  97. {
  98. uint8_t val;
  99. if (i2c_read(chip, DS4510_PULLUP, 1, &val, 1))
  100. return -1;
  101. return val & DS4510_IO_MASK;
  102. }
  103. /*
  104. * Write drive level of IO pins
  105. */
  106. static int ds4510_gpio_write(uint8_t chip, uint8_t val)
  107. {
  108. uint8_t data;
  109. int i;
  110. for (i = 0; i < DS4510_NUM_IO; i++) {
  111. if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1))
  112. return -1;
  113. if (val & (0x1 << i))
  114. data |= 0x1;
  115. else
  116. data &= ~0x1;
  117. if (ds4510_mem_write(chip, DS4510_IO0 - i, &data, 1))
  118. return -1;
  119. }
  120. return 0;
  121. }
  122. /*
  123. * Read drive level of IO pins
  124. */
  125. static int ds4510_gpio_read(uint8_t chip)
  126. {
  127. uint8_t data;
  128. int val = 0;
  129. int i;
  130. for (i = 0; i < DS4510_NUM_IO; i++) {
  131. if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1))
  132. return -1;
  133. if (data & 1)
  134. val |= (1 << i);
  135. }
  136. return val;
  137. }
  138. /*
  139. * Read physical level of IO pins
  140. */
  141. static int ds4510_gpio_read_val(uint8_t chip)
  142. {
  143. uint8_t val;
  144. if (i2c_read(chip, DS4510_IO_STATUS, 1, &val, 1))
  145. return -1;
  146. return val & DS4510_IO_MASK;
  147. }
  148. /*
  149. * Display DS4510 information
  150. */
  151. static int ds4510_info(uint8_t chip)
  152. {
  153. int i;
  154. int tmp;
  155. uint8_t data;
  156. printf("DS4510 @ 0x%x:\n\n", chip);
  157. if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1))
  158. return -1;
  159. printf("rstdelay = 0x%x\n\n", data & DS4510_RSTDELAY_MASK);
  160. if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
  161. return -1;
  162. printf("config = 0x%x\n", data);
  163. printf(" /ready = %d\n", data & DS4510_CFG_READY ? 1 : 0);
  164. printf(" trip pt = %d\n", data & DS4510_CFG_TRIP_POINT ? 1 : 0);
  165. printf(" rst sts = %d\n", data & DS4510_CFG_RESET ? 1 : 0);
  166. printf(" /see = %d\n", data & DS4510_CFG_SEE ? 1 : 0);
  167. printf(" swrst = %d\n\n", data & DS4510_CFG_SWRST ? 1 : 0);
  168. printf("gpio pins: 3210\n");
  169. printf("---------------\n");
  170. printf("pullup ");
  171. tmp = ds4510_pullup_read(chip);
  172. if (tmp == -1)
  173. return tmp;
  174. for (i = DS4510_NUM_IO - 1; i >= 0; i--)
  175. printf("%d", (tmp & (1 << i)) ? 1 : 0);
  176. printf("\n");
  177. printf("driven ");
  178. tmp = ds4510_gpio_read(chip);
  179. if (tmp == -1)
  180. return -1;
  181. for (i = DS4510_NUM_IO - 1; i >= 0; i--)
  182. printf("%d", (tmp & (1 << i)) ? 1 : 0);
  183. printf("\n");
  184. printf("read ");
  185. tmp = ds4510_gpio_read_val(chip);
  186. if (tmp == -1)
  187. return -1;
  188. for (i = DS4510_NUM_IO - 1; i >= 0; i--)
  189. printf("%d", (tmp & (1 << i)) ? 1 : 0);
  190. printf("\n");
  191. return 0;
  192. }
  193. cmd_tbl_t cmd_ds4510[] = {
  194. U_BOOT_CMD_MKENT(device, 3, 0, (void *)DS4510_CMD_DEVICE, "", ""),
  195. U_BOOT_CMD_MKENT(nv, 3, 0, (void *)DS4510_CMD_NV, "", ""),
  196. U_BOOT_CMD_MKENT(output, 4, 0, (void *)DS4510_CMD_OUTPUT, "", ""),
  197. U_BOOT_CMD_MKENT(input, 3, 0, (void *)DS4510_CMD_INPUT, "", ""),
  198. U_BOOT_CMD_MKENT(pullup, 4, 0, (void *)DS4510_CMD_PULLUP, "", ""),
  199. U_BOOT_CMD_MKENT(info, 2, 0, (void *)DS4510_CMD_INFO, "", ""),
  200. U_BOOT_CMD_MKENT(rstdelay, 3, 0, (void *)DS4510_CMD_RSTDELAY, "", ""),
  201. U_BOOT_CMD_MKENT(eeprom, 6, 0, (void *)DS4510_CMD_EEPROM, "", ""),
  202. U_BOOT_CMD_MKENT(seeprom, 6, 0, (void *)DS4510_CMD_SEEPROM, "", ""),
  203. U_BOOT_CMD_MKENT(sram, 6, 0, (void *)DS4510_CMD_SRAM, "", ""),
  204. };
  205. int do_ds4510(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  206. {
  207. static uint8_t chip = 0x51;
  208. cmd_tbl_t *c;
  209. ulong ul_arg2 = 0;
  210. ulong ul_arg3 = 0;
  211. int tmp;
  212. ulong addr;
  213. ulong off;
  214. ulong cnt;
  215. int end;
  216. int (*rw_func)(uint8_t, int, uint8_t *, int);
  217. c = find_cmd_tbl(argv[1], cmd_ds4510, ARRAY_SIZE(cmd_ds4510));
  218. /* All commands but "device" require 'maxargs' arguments */
  219. if (!c || !((argc == (c->maxargs)) ||
  220. (((int)c->cmd == DS4510_CMD_DEVICE) &&
  221. (argc == (c->maxargs - 1))))) {
  222. return cmd_usage(cmdtp);
  223. }
  224. /* arg2 used as chip addr and pin number */
  225. if (argc > 2)
  226. ul_arg2 = simple_strtoul(argv[2], NULL, 16);
  227. /* arg3 used as output/pullup value */
  228. if (argc > 3)
  229. ul_arg3 = simple_strtoul(argv[3], NULL, 16);
  230. switch ((int)c->cmd) {
  231. case DS4510_CMD_DEVICE:
  232. if (argc == 3)
  233. chip = ul_arg2;
  234. printf("Current device address: 0x%x\n", chip);
  235. return 0;
  236. case DS4510_CMD_NV:
  237. return ds4510_see_write(chip, ul_arg2);
  238. case DS4510_CMD_OUTPUT:
  239. tmp = ds4510_gpio_read(chip);
  240. if (tmp == -1)
  241. return -1;
  242. if (ul_arg3)
  243. tmp |= (1 << ul_arg2);
  244. else
  245. tmp &= ~(1 << ul_arg2);
  246. return ds4510_gpio_write(chip, tmp);
  247. case DS4510_CMD_INPUT:
  248. tmp = ds4510_gpio_read_val(chip);
  249. if (tmp == -1)
  250. return -1;
  251. return (tmp & (1 << ul_arg2)) != 0;
  252. case DS4510_CMD_PULLUP:
  253. tmp = ds4510_pullup_read(chip);
  254. if (tmp == -1)
  255. return -1;
  256. if (ul_arg3)
  257. tmp |= (1 << ul_arg2);
  258. else
  259. tmp &= ~(1 << ul_arg2);
  260. return ds4510_pullup_write(chip, tmp);
  261. case DS4510_CMD_INFO:
  262. return ds4510_info(chip);
  263. case DS4510_CMD_RSTDELAY:
  264. return ds4510_rstdelay_write(chip, ul_arg2);
  265. case DS4510_CMD_EEPROM:
  266. end = DS4510_EEPROM + DS4510_EEPROM_SIZE;
  267. off = DS4510_EEPROM;
  268. break;
  269. case DS4510_CMD_SEEPROM:
  270. end = DS4510_SEEPROM + DS4510_SEEPROM_SIZE;
  271. off = DS4510_SEEPROM;
  272. break;
  273. case DS4510_CMD_SRAM:
  274. end = DS4510_SRAM + DS4510_SRAM_SIZE;
  275. off = DS4510_SRAM;
  276. break;
  277. default:
  278. /* We should never get here... */
  279. return 1;
  280. }
  281. /* Only eeprom, seeprom, and sram commands should make it here */
  282. if (strcmp(argv[2], "read") == 0)
  283. rw_func = ds4510_mem_read;
  284. else if (strcmp(argv[2], "write") == 0)
  285. rw_func = ds4510_mem_write;
  286. else
  287. return cmd_usage(cmdtp);
  288. addr = simple_strtoul(argv[3], NULL, 16);
  289. off += simple_strtoul(argv[4], NULL, 16);
  290. cnt = simple_strtoul(argv[5], NULL, 16);
  291. if ((off + cnt) > end) {
  292. printf("ERROR: invalid len\n");
  293. return -1;
  294. }
  295. return rw_func(chip, off, (uint8_t *)addr, cnt);
  296. }
  297. U_BOOT_CMD(
  298. ds4510, 6, 1, do_ds4510,
  299. "ds4510 eeprom/seeprom/sram/gpio access",
  300. "device [dev]\n"
  301. " - show or set current device address\n"
  302. "ds4510 info\n"
  303. " - display ds4510 info\n"
  304. "ds4510 output pin 0|1\n"
  305. " - set pin low or high-Z\n"
  306. "ds4510 input pin\n"
  307. " - read value of pin\n"
  308. "ds4510 pullup pin 0|1\n"
  309. " - disable/enable pullup on specified pin\n"
  310. "ds4510 nv 0|1\n"
  311. " - make gpio and seeprom writes volatile/non-volatile"
  312. "\n"
  313. "ds4510 rstdelay 0-3\n"
  314. " - set reset output delay"
  315. "\n"
  316. "ds4510 eeprom read addr off cnt\n"
  317. "ds4510 eeprom write addr off cnt\n"
  318. " - read/write 'cnt' bytes at EEPROM offset 'off'\n"
  319. "ds4510 seeprom read addr off cnt\n"
  320. "ds4510 seeprom write addr off cnt\n"
  321. " - read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n"
  322. "ds4510 sram read addr off cnt\n"
  323. "ds4510 sram write addr off cnt\n"
  324. " - read/write 'cnt' bytes at SRAM offset 'off'"
  325. );