interrupts.c 3.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
  4. */
  5. #include <common.h>
  6. #include <irq_func.h>
  7. #include <asm/arcregs.h>
  8. #include <asm/ptrace.h>
  9. /* Bit values in STATUS32 */
  10. #define E1_MASK (1 << 1) /* Level 1 interrupts enable */
  11. #define E2_MASK (1 << 2) /* Level 2 interrupts enable */
  12. int interrupt_init(void)
  13. {
  14. return 0;
  15. }
  16. /*
  17. * returns true if interrupts had been enabled before we disabled them
  18. */
  19. int disable_interrupts(void)
  20. {
  21. int status = read_aux_reg(ARC_AUX_STATUS32);
  22. int state = (status & (E1_MASK | E2_MASK)) ? 1 : 0;
  23. status &= ~(E1_MASK | E2_MASK);
  24. /* STATUS32 register is updated indirectly with "FLAG" instruction */
  25. __asm__("flag %0" : : "r" (status));
  26. return state;
  27. }
  28. void enable_interrupts(void)
  29. {
  30. unsigned int status = read_aux_reg(ARC_AUX_STATUS32);
  31. status |= E1_MASK | E2_MASK;
  32. /* STATUS32 register is updated indirectly with "FLAG" instruction */
  33. __asm__("flag %0" : : "r" (status));
  34. }
  35. static void print_reg_file(long *reg_rev, int start_num)
  36. {
  37. unsigned int i;
  38. /* Print 3 registers per line */
  39. for (i = start_num; i < start_num + 25; i++) {
  40. printf("r%02u: 0x%08lx\t", i, (unsigned long)*reg_rev);
  41. if (((i + 1) % 3) == 0)
  42. printf("\n");
  43. /* Because pt_regs has registers reversed */
  44. reg_rev--;
  45. }
  46. /* Add new-line if none was inserted in the end of loop above */
  47. if (((i + 1) % 3) != 0)
  48. printf("\n");
  49. }
  50. void show_regs(struct pt_regs *regs)
  51. {
  52. printf("ECR:\t0x%08lx\n", regs->ecr);
  53. printf("RET:\t0x%08lx\nBLINK:\t0x%08lx\nSTAT32:\t0x%08lx\n",
  54. regs->ret, regs->blink, regs->status32);
  55. printf("GP: 0x%08lx\t r25: 0x%08lx\t\n", regs->r26, regs->r25);
  56. printf("BTA: 0x%08lx\t SP: 0x%08lx\t FP: 0x%08lx\n", regs->bta,
  57. regs->sp, regs->fp);
  58. printf("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n", regs->lp_start,
  59. regs->lp_end, regs->lp_count);
  60. print_reg_file(&(regs->r0), 0);
  61. }
  62. void bad_mode(struct pt_regs *regs)
  63. {
  64. if (regs)
  65. show_regs(regs);
  66. panic("Resetting CPU ...\n");
  67. }
  68. void do_memory_error(unsigned long address, struct pt_regs *regs)
  69. {
  70. printf("Memory error exception @ 0x%lx\n", address);
  71. bad_mode(regs);
  72. }
  73. void do_instruction_error(unsigned long address, struct pt_regs *regs)
  74. {
  75. printf("Instruction error exception @ 0x%lx\n", address);
  76. bad_mode(regs);
  77. }
  78. void do_machine_check_fault(unsigned long address, struct pt_regs *regs)
  79. {
  80. printf("Machine check exception @ 0x%lx\n", address);
  81. bad_mode(regs);
  82. }
  83. void do_interrupt_handler(void)
  84. {
  85. printf("Interrupt fired\n");
  86. bad_mode(0);
  87. }
  88. void do_itlb_miss(struct pt_regs *regs)
  89. {
  90. printf("I TLB miss exception\n");
  91. bad_mode(regs);
  92. }
  93. void do_dtlb_miss(struct pt_regs *regs)
  94. {
  95. printf("D TLB miss exception\n");
  96. bad_mode(regs);
  97. }
  98. void do_tlb_prot_violation(unsigned long address, struct pt_regs *regs)
  99. {
  100. printf("TLB protection violation or misaligned access @ 0x%lx\n",
  101. address);
  102. bad_mode(regs);
  103. }
  104. void do_privilege_violation(struct pt_regs *regs)
  105. {
  106. printf("Privilege violation exception\n");
  107. bad_mode(regs);
  108. }
  109. void do_trap(struct pt_regs *regs)
  110. {
  111. printf("Trap exception\n");
  112. bad_mode(regs);
  113. }
  114. void do_extension(struct pt_regs *regs)
  115. {
  116. printf("Extension instruction exception\n");
  117. bad_mode(regs);
  118. }
  119. #ifdef CONFIG_ISA_ARCV2
  120. void do_swi(struct pt_regs *regs)
  121. {
  122. printf("Software Interrupt exception\n");
  123. bad_mode(regs);
  124. }
  125. void do_divzero(unsigned long address, struct pt_regs *regs)
  126. {
  127. printf("Division by zero exception @ 0x%lx\n", address);
  128. bad_mode(regs);
  129. }
  130. void do_dcerror(struct pt_regs *regs)
  131. {
  132. printf("Data cache consistency error exception\n");
  133. bad_mode(regs);
  134. }
  135. void do_maligned(unsigned long address, struct pt_regs *regs)
  136. {
  137. printf("Misaligned data access exception @ 0x%lx\n", address);
  138. bad_mode(regs);
  139. }
  140. #endif