arc-bcr.h 1.7 KB

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  1. /*
  2. * ARC Build Configuration Registers, with encoded hardware config
  3. *
  4. * Copyright (C) 2018 Synopsys
  5. * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #ifndef __ARC_BCR_H
  12. #define __ARC_BCR_H
  13. #ifndef __ASSEMBLY__
  14. #include <config.h>
  15. union bcr_di_cache {
  16. struct {
  17. #ifdef CONFIG_CPU_BIG_ENDIAN
  18. unsigned int pad:12, line_len:4, sz:4, config:4, ver:8;
  19. #else
  20. unsigned int ver:8, config:4, sz:4, line_len:4, pad:12;
  21. #endif
  22. } fields;
  23. unsigned int word;
  24. };
  25. union bcr_slc_cfg {
  26. struct {
  27. #ifdef CONFIG_CPU_BIG_ENDIAN
  28. unsigned int pad:24, way:2, lsz:2, sz:4;
  29. #else
  30. unsigned int sz:4, lsz:2, way:2, pad:24;
  31. #endif
  32. } fields;
  33. unsigned int word;
  34. };
  35. union bcr_generic {
  36. struct {
  37. #ifdef CONFIG_CPU_BIG_ENDIAN
  38. unsigned int pad:24, ver:8;
  39. #else
  40. unsigned int ver:8, pad:24;
  41. #endif
  42. } fields;
  43. unsigned int word;
  44. };
  45. union bcr_clust_cfg {
  46. struct {
  47. #ifdef CONFIG_CPU_BIG_ENDIAN
  48. unsigned int pad:7, c:1, num_entries:8, num_cores:8, ver:8;
  49. #else
  50. unsigned int ver:8, num_cores:8, num_entries:8, c:1, pad:7;
  51. #endif
  52. } fields;
  53. unsigned int word;
  54. };
  55. union bcr_mmu_4 {
  56. struct {
  57. #ifdef CONFIG_CPU_BIG_ENDIAN
  58. unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,
  59. n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;
  60. #else
  61. /* DTLB ITLB JES JE JA */
  62. unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2,
  63. pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8;
  64. #endif
  65. } fields;
  66. unsigned int word;
  67. };
  68. #endif /* __ASSEMBLY__ */
  69. #endif /* __ARC_BCR_H */