thunderx_88xx.h 1.9 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /**
  3. * (C) Copyright 2014, Cavium Inc.
  4. **/
  5. #ifndef __THUNDERX_88XX_H__
  6. #define __THUNDERX_88XX_H__
  7. #define CONFIG_REMAKE_ELF
  8. #define CONFIG_THUNDERX
  9. #define CONFIG_SYS_64BIT
  10. #define MEM_BASE 0x00500000
  11. #define CONFIG_SYS_LOWMEM_BASE MEM_BASE
  12. /* Link Definitions */
  13. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  14. /* SMP Spin Table Definitions */
  15. #define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  16. /* Generic Timer Definitions */
  17. #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
  18. #define CONFIG_SYS_MEMTEST_START MEM_BASE
  19. #define CONFIG_SYS_MEMTEST_END (MEM_BASE + PHYS_SDRAM_1_SIZE)
  20. /* Size of malloc() pool */
  21. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
  22. /* PL011 Serial Configuration */
  23. #define CONFIG_PL011_CLOCK 24000000
  24. /* Generic Interrupt Controller Definitions */
  25. #define GICD_BASE (0x801000000000)
  26. #define GICR_BASE (0x801000002000)
  27. #define CONFIG_SYS_SERIAL0 0x87e024000000
  28. #define CONFIG_SYS_SERIAL1 0x87e025000000
  29. /* BOOTP options */
  30. #define CONFIG_BOOTP_BOOTFILESIZE
  31. /* Miscellaneous configurable options */
  32. #define CONFIG_SYS_LOAD_ADDR (MEM_BASE)
  33. /* Physical Memory Map */
  34. #define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */
  35. #define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */
  36. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  37. /* Initial environment variables */
  38. #define UBOOT_IMG_HEAD_SIZE 0x40
  39. /* C80000 - 0x40 */
  40. #define CONFIG_EXTRA_ENV_SETTINGS \
  41. "kernel_addr=08007ffc0\0" \
  42. "fdt_addr=0x94C00000\0" \
  43. "fdt_high=0x9fffffff\0"
  44. /* Do not preserve environment */
  45. /* Monitor Command Prompt */
  46. #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
  47. #define CONFIG_SYS_MAXARGS 64 /* max command args */
  48. #define CONFIG_NO_RELOCATION 1
  49. #define PLL_REF_CLK 50000000 /* 50 MHz */
  50. #define NS_PER_REF_CLK_TICK (1000000000/PLL_REF_CLK)
  51. #endif /* __THUNDERX_88XX_H__ */