r7780mp.h 3.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Configuation settings for the Renesas R7780MP board
  4. *
  5. * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
  6. * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
  7. */
  8. #ifndef __R7780RP_H
  9. #define __R7780RP_H
  10. #define CONFIG_CPU_SH7780 1
  11. #define CONFIG_R7780MP 1
  12. #define CONFIG_SYS_R7780MP_OLD_FLASH 1
  13. #define __LITTLE_ENDIAN__ 1
  14. #define CONFIG_DISPLAY_BOARDINFO
  15. #define CONFIG_CONS_SCIF0 1
  16. #define CONFIG_ENV_OVERWRITE 1
  17. #define CONFIG_SYS_SDRAM_BASE (0x08000000)
  18. #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
  19. #define CONFIG_SYS_PBSIZE 256
  20. #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
  21. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
  22. /* Flash board support */
  23. #define CONFIG_SYS_FLASH_BASE (0xA0000000)
  24. #ifdef CONFIG_SYS_R7780MP_OLD_FLASH
  25. /* NOR Flash (S29PL127J60TFI130) */
  26. # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
  27. # define CONFIG_SYS_MAX_FLASH_BANKS (2)
  28. # define CONFIG_SYS_MAX_FLASH_SECT 270
  29. # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\
  30. CONFIG_SYS_FLASH_BASE + 0x100000,\
  31. CONFIG_SYS_FLASH_BASE + 0x400000,\
  32. CONFIG_SYS_FLASH_BASE + 0x700000, }
  33. #else /* CONFIG_SYS_R7780MP_OLD_FLASH */
  34. /* NOR Flash (Spantion S29GL256P) */
  35. # define CONFIG_SYS_MAX_FLASH_BANKS (1)
  36. # define CONFIG_SYS_MAX_FLASH_SECT 256
  37. # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
  38. #endif /* CONFIG_SYS_R7780MP_OLD_FLASH */
  39. #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
  40. /* Address of u-boot image in Flash */
  41. #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
  42. #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
  43. /* Size of DRAM reserved for malloc() use */
  44. #define CONFIG_SYS_MALLOC_LEN (1204 * 1024)
  45. #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
  46. #define CONFIG_SYS_RX_ETH_BUFFER (8)
  47. #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
  48. #undef CONFIG_SYS_FLASH_QUIET_TEST
  49. /* print 'E' for empty sector on flinfo */
  50. #define CONFIG_SYS_FLASH_EMPTY_INFO
  51. #define CONFIG_SYS_FLASH_ERASE_TOUT 120000
  52. #define CONFIG_SYS_FLASH_WRITE_TOUT 500
  53. /* Board Clock */
  54. #define CONFIG_SYS_CLK_FREQ 33333333
  55. #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
  56. /* PCI Controller */
  57. #if defined(CONFIG_CMD_PCI)
  58. #define CONFIG_SH4_PCI
  59. #define CONFIG_SH7780_PCI
  60. #define CONFIG_SH7780_PCI_LSR 0x07f00001
  61. #define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE
  62. #define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE
  63. #define CONFIG_PCI_SCAN_SHOW 1
  64. #define __mem_pci
  65. #define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */
  66. #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
  67. #define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */
  68. #define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */
  69. #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
  70. #define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */
  71. #define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE
  72. #define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE
  73. #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
  74. #endif /* CONFIG_CMD_PCI */
  75. #if defined(CONFIG_CMD_NET)
  76. /* AX88796L Support(NE2000 base chip) */
  77. #define CONFIG_DRIVER_AX88796L
  78. #define CONFIG_DRIVER_NE2000_BASE 0xA4100000
  79. #endif
  80. /* Compact flash Support */
  81. #if defined(CONFIG_IDE)
  82. #define CONFIG_IDE_RESET 1
  83. #define CONFIG_SYS_PIO_MODE 1
  84. #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */
  85. #define CONFIG_SYS_IDE_MAXDEVICE 1
  86. #define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000
  87. #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */
  88. #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */
  89. #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */
  90. #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */
  91. #define CONFIG_IDE_SWAP_IO
  92. #endif /* CONFIG_IDE */
  93. #endif /* __R7780RP_H */