lx2160ardb.h 3.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2018 NXP
  4. */
  5. #ifndef __LX2_RDB_H
  6. #define __LX2_RDB_H
  7. #include "lx2160a_common.h"
  8. /* Qixis */
  9. #define QIXIS_XMAP_MASK 0x07
  10. #define QIXIS_XMAP_SHIFT 5
  11. #define QIXIS_RST_CTL_RESET_EN 0x30
  12. #define QIXIS_LBMAP_DFLTBANK 0x00
  13. #define QIXIS_LBMAP_ALTBANK 0x20
  14. #define QIXIS_LBMAP_QSPI 0x00
  15. #define QIXIS_RCW_SRC_QSPI 0xff
  16. #define QIXIS_RST_CTL_RESET 0x31
  17. #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
  18. #define QIXIS_RCFG_CTL_RECONFIG_START 0x21
  19. #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
  20. #define QIXIS_LBMAP_MASK 0x0f
  21. #define QIXIS_LBMAP_SD
  22. #define QIXIS_RCW_SRC_SD 0x08
  23. #define NON_EXTENDED_DUTCFG
  24. /* VID */
  25. #define I2C_MUX_CH_VOL_MONITOR 0xA
  26. /* Voltage monitor on channel 2*/
  27. #define I2C_VOL_MONITOR_ADDR 0x63
  28. #define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2
  29. #define I2C_VOL_MONITOR_BUS_V_OVF 0x1
  30. #define I2C_VOL_MONITOR_BUS_V_SHIFT 3
  31. #define CONFIG_VID_FLS_ENV "lx2160ardb_vdd_mv"
  32. #define CONFIG_VID
  33. /* The lowest and highest voltage allowed*/
  34. #define VDD_MV_MIN 775
  35. #define VDD_MV_MAX 855
  36. /* PM Bus commands code for LTC3882*/
  37. #define PMBUS_CMD_PAGE 0x0
  38. #define PMBUS_CMD_READ_VOUT 0x8B
  39. #define PMBUS_CMD_PAGE_PLUS_WRITE 0x05
  40. #define PMBUS_CMD_VOUT_COMMAND 0x21
  41. #define PWM_CHANNEL0 0x0
  42. #define CONFIG_VOL_MONITOR_LTC3882_SET
  43. #define CONFIG_VOL_MONITOR_LTC3882_READ
  44. /* RTC */
  45. #define CONFIG_SYS_RTC_BUS_NUM 4
  46. /* MAC/PHY configuration */
  47. #if defined(CONFIG_FSL_MC_ENET)
  48. #define CONFIG_MII
  49. #define CONFIG_ETHPRIME "DPMAC1@xgmii"
  50. #define AQR107_PHY_ADDR1 0x04
  51. #define AQR107_PHY_ADDR2 0x05
  52. #define AQR107_IRQ_MASK 0x0C
  53. #define CORTINA_NO_FW_UPLOAD
  54. #define CORTINA_PHY_ADDR1 0x0
  55. #define INPHI_PHY_ADDR1 0x0
  56. #define RGMII_PHY_ADDR1 0x01
  57. #define RGMII_PHY_ADDR2 0x02
  58. #endif
  59. /* EMC2305 */
  60. #define I2C_MUX_CH_EMC2305 0x09
  61. #define I2C_EMC2305_ADDR 0x4D
  62. #define I2C_EMC2305_CMD 0x40
  63. #define I2C_EMC2305_PWM 0x80
  64. /* EEPROM */
  65. #define CONFIG_ID_EEPROM
  66. #define CONFIG_SYS_I2C_EEPROM_NXID
  67. #define CONFIG_SYS_EEPROM_BUS_NUM 0
  68. #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
  69. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
  70. #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
  71. #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
  72. /* Initial environment variables */
  73. #define CONFIG_EXTRA_ENV_SETTINGS \
  74. EXTRA_ENV_SETTINGS \
  75. "lx2160ardb_vdd_mv=800\0" \
  76. "BOARD=lx2160ardb\0" \
  77. "xspi_bootcmd=echo Trying load from flexspi..;" \
  78. "sf probe 0:0 && sf read $load_addr " \
  79. "$kernel_start $kernel_size ; env exists secureboot &&" \
  80. "sf read $kernelheader_addr_r $kernelheader_start " \
  81. "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
  82. " bootm $load_addr#$BOARD\0" \
  83. "sd_bootcmd=echo Trying load from sd card..;" \
  84. "mmcinfo; mmc read $load_addr " \
  85. "$kernel_addr_sd $kernel_size_sd ;" \
  86. "env exists secureboot && mmc read $kernelheader_addr_r "\
  87. "$kernelhdr_addr_sd $kernelhdr_size_sd " \
  88. " && esbc_validate ${kernelheader_addr_r};" \
  89. "bootm $load_addr#$BOARD\0"
  90. #include <asm/fsl_secure_boot.h>
  91. #endif /* __LX2_RDB_H */