platform.c 8.7 KB

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  1. /*
  2. * SPDX-License-Identifier: BSD-2-Clause
  3. *
  4. * Copyright (c) 2020 Western Digital Corporation or its affiliates.
  5. *
  6. * Authors:
  7. * Anup Patel <anup.patel@wdc.com>
  8. */
  9. #include <libfdt.h>
  10. #include <platform_override.h>
  11. #include <sbi/riscv_asm.h>
  12. #include <sbi/sbi_hartmask.h>
  13. #include <sbi/sbi_platform.h>
  14. #include <sbi/sbi_string.h>
  15. #include <sbi_utils/fdt/fdt_domain.h>
  16. #include <sbi_utils/fdt/fdt_fixup.h>
  17. #include <sbi_utils/fdt/fdt_helper.h>
  18. #include <sbi_utils/irqchip/fdt_irqchip.h>
  19. #include <sbi_utils/serial/fdt_serial.h>
  20. #include <sbi_utils/timer/fdt_timer.h>
  21. #include <sbi_utils/ipi/fdt_ipi.h>
  22. #include <sbi_utils/reset/fdt_reset.h>
  23. extern const struct platform_override sifive_fu540;
  24. static const struct platform_override *special_platforms[] = {
  25. &sifive_fu540,
  26. };
  27. static const struct platform_override *generic_plat = NULL;
  28. static const struct fdt_match *generic_plat_match = NULL;
  29. static void fw_platform_lookup_special(void *fdt, int root_offset)
  30. {
  31. int pos, noff;
  32. const struct platform_override *plat;
  33. const struct fdt_match *match;
  34. for (pos = 0; pos < array_size(special_platforms); pos++) {
  35. plat = special_platforms[pos];
  36. if (!plat->match_table)
  37. continue;
  38. noff = fdt_find_match(fdt, -1, plat->match_table, &match);
  39. if (noff < 0)
  40. continue;
  41. generic_plat = plat;
  42. generic_plat_match = match;
  43. break;
  44. }
  45. }
  46. extern struct sbi_platform platform;
  47. static u32 generic_hart_index2id[SBI_HARTMASK_MAX_BITS] = { 0 };
  48. /*
  49. * The fw_platform_init() function is called very early on the boot HART
  50. * OpenSBI reference firmwares so that platform specific code get chance
  51. * to update "platform" instance before it is used.
  52. *
  53. * The arguments passed to fw_platform_init() function are boot time state
  54. * of A0 to A4 register. The "arg0" will be boot HART id and "arg1" will
  55. * be address of FDT passed by previous booting stage.
  56. *
  57. * The return value of fw_platform_init() function is the FDT location. If
  58. * FDT is unchanged (or FDT is modified in-place) then fw_platform_init()
  59. * can always return the original FDT location (i.e. 'arg1') unmodified.
  60. */
  61. unsigned long fw_platform_init(unsigned long arg0, unsigned long arg1,
  62. unsigned long arg2, unsigned long arg3,
  63. unsigned long arg4)
  64. {
  65. const char *model;
  66. void *fdt = (void *)arg1;
  67. u32 hartid, hart_count = 0;
  68. int rc, root_offset, cpus_offset, cpu_offset, len;
  69. root_offset = fdt_path_offset(fdt, "/");
  70. if (root_offset < 0)
  71. goto fail;
  72. fw_platform_lookup_special(fdt, root_offset);
  73. model = fdt_getprop(fdt, root_offset, "model", &len);
  74. if (model)
  75. sbi_strncpy(platform.name, model, sizeof(platform.name));
  76. if (generic_plat && generic_plat->features)
  77. platform.features = generic_plat->features(generic_plat_match);
  78. cpus_offset = fdt_path_offset(fdt, "/cpus");
  79. if (cpus_offset < 0)
  80. goto fail;
  81. fdt_for_each_subnode(cpu_offset, fdt, cpus_offset) {
  82. rc = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
  83. if (rc)
  84. continue;
  85. if (SBI_HARTMASK_MAX_BITS <= hartid)
  86. continue;
  87. generic_hart_index2id[hart_count++] = hartid;
  88. }
  89. platform.hart_count = hart_count;
  90. /* Return original FDT pointer */
  91. return arg1;
  92. fail:
  93. while (1)
  94. wfi();
  95. }
  96. static int generic_early_init(bool cold_boot)
  97. {
  98. int rc;
  99. if (generic_plat && generic_plat->early_init) {
  100. rc = generic_plat->early_init(cold_boot, generic_plat_match);
  101. if (rc)
  102. return rc;
  103. }
  104. if (!cold_boot)
  105. return 0;
  106. return fdt_reset_init();
  107. }
  108. static int generic_final_init(bool cold_boot)
  109. {
  110. void *fdt;
  111. int rc;
  112. if (generic_plat && generic_plat->final_init) {
  113. rc = generic_plat->final_init(cold_boot, generic_plat_match);
  114. if (rc)
  115. return rc;
  116. }
  117. if (!cold_boot)
  118. return 0;
  119. fdt = sbi_scratch_thishart_arg1_ptr();
  120. fdt_cpu_fixup(fdt);
  121. fdt_fixups(fdt);
  122. fdt_domain_fixup(fdt);
  123. if (generic_plat && generic_plat->fdt_fixup) {
  124. rc = generic_plat->fdt_fixup(fdt, generic_plat_match);
  125. if (rc)
  126. return rc;
  127. }
  128. return 0;
  129. }
  130. static void generic_early_exit(void)
  131. {
  132. if (generic_plat && generic_plat->early_exit)
  133. generic_plat->early_exit(generic_plat_match);
  134. }
  135. static void generic_final_exit(void)
  136. {
  137. if (generic_plat && generic_plat->final_exit)
  138. generic_plat->final_exit(generic_plat_match);
  139. }
  140. static int generic_domains_init(void)
  141. {
  142. return fdt_domains_populate(sbi_scratch_thishart_arg1_ptr());
  143. }
  144. static u64 generic_tlbr_flush_limit(void)
  145. {
  146. if (generic_plat && generic_plat->tlbr_flush_limit)
  147. return generic_plat->tlbr_flush_limit(generic_plat_match);
  148. return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
  149. }
  150. #include <sbi/sbi_trap.h>
  151. #define CSR_MCOUNTERWEN 0x7c9
  152. static void sbi_thead_pmu_init(void)
  153. {
  154. unsigned long interrupts;
  155. interrupts = csr_read(CSR_MIDELEG) | (1 << 17);
  156. csr_write(CSR_MIDELEG, interrupts);
  157. /* CSR_MCOUNTEREN has already been set in mstatus_init() */
  158. csr_write(CSR_MCOUNTERWEN, 0xffffffff);
  159. csr_write(CSR_MHPMEVENT3, 1);
  160. csr_write(CSR_MHPMEVENT4, 2);
  161. csr_write(CSR_MHPMEVENT5, 3);
  162. csr_write(CSR_MHPMEVENT6, 4);
  163. csr_write(CSR_MHPMEVENT7, 5);
  164. csr_write(CSR_MHPMEVENT8, 6);
  165. csr_write(CSR_MHPMEVENT9, 7);
  166. csr_write(CSR_MHPMEVENT10, 8);
  167. csr_write(CSR_MHPMEVENT11, 9);
  168. csr_write(CSR_MHPMEVENT12, 10);
  169. csr_write(CSR_MHPMEVENT13, 11);
  170. csr_write(CSR_MHPMEVENT14, 12);
  171. csr_write(CSR_MHPMEVENT15, 13);
  172. csr_write(CSR_MHPMEVENT16, 14);
  173. csr_write(CSR_MHPMEVENT17, 15);
  174. csr_write(CSR_MHPMEVENT18, 16);
  175. csr_write(CSR_MHPMEVENT19, 17);
  176. csr_write(CSR_MHPMEVENT20, 18);
  177. csr_write(CSR_MHPMEVENT21, 19);
  178. csr_write(CSR_MHPMEVENT22, 20);
  179. csr_write(CSR_MHPMEVENT23, 21);
  180. csr_write(CSR_MHPMEVENT24, 22);
  181. csr_write(CSR_MHPMEVENT25, 23);
  182. csr_write(CSR_MHPMEVENT26, 24);
  183. csr_write(CSR_MHPMEVENT27, 25);
  184. csr_write(CSR_MHPMEVENT28, 26);
  185. }
  186. static void sbi_thead_pmu_map(unsigned long idx, unsigned long event_id)
  187. {
  188. switch (idx) {
  189. case 3:
  190. csr_write(CSR_MHPMEVENT3, event_id);
  191. break;
  192. case 4:
  193. csr_write(CSR_MHPMEVENT4, event_id);
  194. break;
  195. case 5:
  196. csr_write(CSR_MHPMEVENT5, event_id);
  197. break;
  198. case 6:
  199. csr_write(CSR_MHPMEVENT6, event_id);
  200. break;
  201. case 7:
  202. csr_write(CSR_MHPMEVENT7, event_id);
  203. break;
  204. case 8:
  205. csr_write(CSR_MHPMEVENT8, event_id);
  206. break;
  207. case 9:
  208. csr_write(CSR_MHPMEVENT9, event_id);
  209. break;
  210. case 10:
  211. csr_write(CSR_MHPMEVENT10, event_id);
  212. break;
  213. case 11:
  214. csr_write(CSR_MHPMEVENT11, event_id);
  215. break;
  216. case 12:
  217. csr_write(CSR_MHPMEVENT12, event_id);
  218. break;
  219. case 13:
  220. csr_write(CSR_MHPMEVENT13, event_id);
  221. break;
  222. case 14:
  223. csr_write(CSR_MHPMEVENT14, event_id);
  224. break;
  225. case 15:
  226. csr_write(CSR_MHPMEVENT15, event_id);
  227. break;
  228. case 16:
  229. csr_write(CSR_MHPMEVENT16, event_id);
  230. break;
  231. case 17:
  232. csr_write(CSR_MHPMEVENT17, event_id);
  233. break;
  234. case 18:
  235. csr_write(CSR_MHPMEVENT18, event_id);
  236. break;
  237. case 19:
  238. csr_write(CSR_MHPMEVENT19, event_id);
  239. break;
  240. case 20:
  241. csr_write(CSR_MHPMEVENT20, event_id);
  242. break;
  243. case 21:
  244. csr_write(CSR_MHPMEVENT21, event_id);
  245. break;
  246. case 22:
  247. csr_write(CSR_MHPMEVENT22, event_id);
  248. break;
  249. case 23:
  250. csr_write(CSR_MHPMEVENT23, event_id);
  251. break;
  252. case 24:
  253. csr_write(CSR_MHPMEVENT24, event_id);
  254. break;
  255. case 25:
  256. csr_write(CSR_MHPMEVENT25, event_id);
  257. break;
  258. case 26:
  259. csr_write(CSR_MHPMEVENT26, event_id);
  260. break;
  261. case 27:
  262. csr_write(CSR_MHPMEVENT27, event_id);
  263. break;
  264. case 28:
  265. csr_write(CSR_MHPMEVENT28, event_id);
  266. break;
  267. case 29:
  268. csr_write(CSR_MHPMEVENT29, event_id);
  269. break;
  270. case 30:
  271. csr_write(CSR_MHPMEVENT30, event_id);
  272. break;
  273. case 31:
  274. csr_write(CSR_MHPMEVENT31, event_id);
  275. break;
  276. }
  277. }
  278. static void sbi_thead_pmu_set(unsigned long type, unsigned long idx, unsigned long event_id)
  279. {
  280. switch (type) {
  281. case 2:
  282. sbi_thead_pmu_map(idx, event_id);
  283. break;
  284. default:
  285. sbi_thead_pmu_init();
  286. break;
  287. }
  288. }
  289. static int thead_vendor_ext_provider(long extid, long funcid,
  290. const struct sbi_trap_regs *regs, unsigned long *out_value,
  291. struct sbi_trap_info *out_trap)
  292. {
  293. switch (extid) {
  294. case 0x09000001:
  295. sbi_thead_pmu_set(regs->a0, regs->a1, regs->a2);
  296. break;
  297. default:
  298. while(1);
  299. }
  300. return 0;
  301. }
  302. const struct sbi_platform_operations platform_ops = {
  303. .vendor_ext_provider = thead_vendor_ext_provider,
  304. .early_init = generic_early_init,
  305. .final_init = generic_final_init,
  306. .early_exit = generic_early_exit,
  307. .final_exit = generic_final_exit,
  308. .domains_init = generic_domains_init,
  309. .console_init = fdt_serial_init,
  310. .irqchip_init = fdt_irqchip_init,
  311. .irqchip_exit = fdt_irqchip_exit,
  312. .ipi_init = fdt_ipi_init,
  313. .ipi_exit = fdt_ipi_exit,
  314. .get_tlbr_flush_limit = generic_tlbr_flush_limit,
  315. .timer_init = fdt_timer_init,
  316. .timer_exit = fdt_timer_exit,
  317. };
  318. struct sbi_platform platform = {
  319. .opensbi_version = OPENSBI_VERSION,
  320. .platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
  321. .name = "Generic",
  322. .features = SBI_PLATFORM_DEFAULT_FEATURES,
  323. .hart_count = SBI_HARTMASK_MAX_BITS,
  324. .hart_index2id = generic_hart_index2id,
  325. .hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
  326. .platform_ops_addr = (unsigned long)&platform_ops
  327. };