platform.c 3.6 KB

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  1. /* SPDX-License-Identifier: BSD-2-Clause */
  2. /*
  3. * Copyright (C) 2019 FORTH-ICS/CARV
  4. * Panagiotis Peristerakis <perister@ics.forth.gr>
  5. */
  6. #include <sbi/riscv_asm.h>
  7. #include <sbi/riscv_encoding.h>
  8. #include <sbi/riscv_io.h>
  9. #include <sbi/sbi_console.h>
  10. #include <sbi/sbi_const.h>
  11. #include <sbi/sbi_hart.h>
  12. #include <sbi/sbi_platform.h>
  13. #include <sbi_utils/fdt/fdt_fixup.h>
  14. #include <sbi_utils/irqchip/plic.h>
  15. #include <sbi_utils/serial/uart8250.h>
  16. #include <sbi_utils/sys/clint.h>
  17. #define ARIANE_UART_ADDR 0x10000000
  18. #define ARIANE_UART_FREQ 50000000
  19. #define ARIANE_UART_BAUDRATE 115200
  20. #define ARIANE_UART_REG_SHIFT 2
  21. #define ARIANE_UART_REG_WIDTH 4
  22. #define ARIANE_PLIC_ADDR 0xc000000
  23. #define ARIANE_PLIC_NUM_SOURCES 3
  24. #define ARIANE_HART_COUNT 1
  25. #define ARIANE_CLINT_ADDR 0x2000000
  26. static struct plic_data plic = {
  27. .addr = ARIANE_PLIC_ADDR,
  28. .num_src = ARIANE_PLIC_NUM_SOURCES,
  29. };
  30. static struct clint_data clint = {
  31. .addr = ARIANE_CLINT_ADDR,
  32. .first_hartid = 0,
  33. .hart_count = ARIANE_HART_COUNT,
  34. .has_64bit_mmio = TRUE,
  35. };
  36. /*
  37. * Ariane platform early initialization.
  38. */
  39. static int ariane_early_init(bool cold_boot)
  40. {
  41. /* For now nothing to do. */
  42. return 0;
  43. }
  44. /*
  45. * Ariane platform final initialization.
  46. */
  47. static int ariane_final_init(bool cold_boot)
  48. {
  49. void *fdt;
  50. if (!cold_boot)
  51. return 0;
  52. fdt = sbi_scratch_thishart_arg1_ptr();
  53. fdt_fixups(fdt);
  54. return 0;
  55. }
  56. /*
  57. * Initialize the ariane console.
  58. */
  59. static int ariane_console_init(void)
  60. {
  61. return uart8250_init(ARIANE_UART_ADDR,
  62. ARIANE_UART_FREQ,
  63. ARIANE_UART_BAUDRATE,
  64. ARIANE_UART_REG_SHIFT,
  65. ARIANE_UART_REG_WIDTH);
  66. }
  67. static int plic_ariane_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
  68. {
  69. size_t i, ie_words = ARIANE_PLIC_NUM_SOURCES / 32 + 1;
  70. /* By default, enable all IRQs for M-mode of target HART */
  71. if (m_cntx_id > -1) {
  72. for (i = 0; i < ie_words; i++)
  73. plic_set_ie(&plic, m_cntx_id, i, 1);
  74. }
  75. /* Enable all IRQs for S-mode of target HART */
  76. if (s_cntx_id > -1) {
  77. for (i = 0; i < ie_words; i++)
  78. plic_set_ie(&plic, s_cntx_id, i, 1);
  79. }
  80. /* By default, enable M-mode threshold */
  81. if (m_cntx_id > -1)
  82. plic_set_thresh(&plic, m_cntx_id, 1);
  83. /* By default, disable S-mode threshold */
  84. if (s_cntx_id > -1)
  85. plic_set_thresh(&plic, s_cntx_id, 0);
  86. return 0;
  87. }
  88. /*
  89. * Initialize the ariane interrupt controller for current HART.
  90. */
  91. static int ariane_irqchip_init(bool cold_boot)
  92. {
  93. u32 hartid = current_hartid();
  94. int ret;
  95. if (cold_boot) {
  96. ret = plic_cold_irqchip_init(&plic);
  97. if (ret)
  98. return ret;
  99. }
  100. return plic_ariane_warm_irqchip_init(2 * hartid, 2 * hartid + 1);
  101. }
  102. /*
  103. * Initialize IPI for current HART.
  104. */
  105. static int ariane_ipi_init(bool cold_boot)
  106. {
  107. int ret;
  108. if (cold_boot) {
  109. ret = clint_cold_ipi_init(&clint);
  110. if (ret)
  111. return ret;
  112. }
  113. return clint_warm_ipi_init();
  114. }
  115. /*
  116. * Initialize ariane timer for current HART.
  117. */
  118. static int ariane_timer_init(bool cold_boot)
  119. {
  120. int ret;
  121. if (cold_boot) {
  122. ret = clint_cold_timer_init(&clint, NULL);
  123. if (ret)
  124. return ret;
  125. }
  126. return clint_warm_timer_init();
  127. }
  128. /*
  129. * Platform descriptor.
  130. */
  131. const struct sbi_platform_operations platform_ops = {
  132. .early_init = ariane_early_init,
  133. .final_init = ariane_final_init,
  134. .console_init = ariane_console_init,
  135. .irqchip_init = ariane_irqchip_init,
  136. .ipi_init = ariane_ipi_init,
  137. .timer_init = ariane_timer_init,
  138. };
  139. const struct sbi_platform platform = {
  140. .opensbi_version = OPENSBI_VERSION,
  141. .platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
  142. .name = "ARIANE RISC-V",
  143. .features = SBI_PLATFORM_DEFAULT_FEATURES,
  144. .hart_count = ARIANE_HART_COUNT,
  145. .hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
  146. .platform_ops_addr = (unsigned long)&platform_ops
  147. };