0003-u54-prci-driver-for-core-U54-clocks.patch 1.8 KB

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  1. From aebd1722fcf2f9e7071ceeca5995a308ca099959 Mon Sep 17 00:00:00 2001
  2. From: "Wesley W. Terpstra" <wesley@sifive.com>
  3. Date: Tue, 13 Feb 2018 19:39:41 -0800
  4. Subject: [PATCH 03/10] u54-prci: driver for core U54 clocks
  5. ---
  6. .../bindings/clock/sifive,u54-prci.txt | 44 +++++++++++++++++++
  7. 1 file changed, 44 insertions(+)
  8. create mode 100644 Documentation/devicetree/bindings/clock/sifive,u54-prci.txt
  9. diff --git a/Documentation/devicetree/bindings/clock/sifive,u54-prci.txt b/Documentation/devicetree/bindings/clock/sifive,u54-prci.txt
  10. new file mode 100644
  11. index 000000000000..88682c5eaebc
  12. --- /dev/null
  13. +++ b/Documentation/devicetree/bindings/clock/sifive,u54-prci.txt
  14. @@ -0,0 +1,44 @@
  15. +SiFive U54 SoC clocks
  16. +
  17. +This binding uses the common clock binding:
  18. + Documentation/devicetree/bindings/clock/clock-bindings.txt
  19. +
  20. +The U54 PRCI controller generates clocks for the U54 SoC. There is
  21. +a core PLL that sets the processor frequency and PLLs for ethernet
  22. +and DDR. It takes an input clock from the board, typically an oscillator
  23. +or crystal.
  24. +
  25. +Required properties:
  26. +- compatible: Should be "sifive,aloeprci0"
  27. +- #clock-cells: Should be <1>
  28. +- reg: Specifies base physical address and size of the registers
  29. +- clocks: phandles to the parent clock used as input
  30. +
  31. +Example:
  32. +
  33. + refclk: refclk {
  34. + #clock-cells = <0>;
  35. + compatible = "fixed-clock";
  36. + clock-frequency = <33333333>;
  37. + clock-output-names = "xtal";
  38. + };
  39. +
  40. + u54: prci@10000000 {
  41. + compatible = "sifive,aloeprci0";
  42. + reg = <0x0 0x10000000 0x0 0x1000>;
  43. + clocks = <&refclk>;
  44. + #clock-cells = <1>;
  45. + };
  46. +
  47. + tlclk: tlclk {
  48. + compatible = "fixed-factor-clock";
  49. + clocks = <&u54 0>; /* Core frequency */
  50. + #clock-cells = <0>;
  51. + clock-div = <2>;
  52. + clock-mult = <1>;
  53. + };
  54. +
  55. + ethernet@10090000 {
  56. + ...
  57. + clocks = <&prci 1>; /* TX clock */
  58. + };
  59. --
  60. 2.21.0