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@@ -1,1131 +0,0 @@
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-From 58f76c1c8221f6ce247bd8a6f39ab0a59422b2f2 Mon Sep 17 00:00:00 2001
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-From: "Wesley W. Terpstra" <wesley@sifive.com>
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-Date: Fri, 16 Mar 2018 11:34:26 -0700
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-Subject: [PATCH 03/11] serial/sifive: initial driver from Paul Walmsley
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-
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----
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- drivers/tty/serial/Kconfig | 23 +
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- drivers/tty/serial/Makefile | 1 +
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- drivers/tty/serial/sifive.c | 1051 ++++++++++++++++++++++++++++++++++++++
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- include/uapi/linux/serial_core.h | 3 +
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- 4 files changed, 1078 insertions(+)
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- create mode 100644 drivers/tty/serial/sifive.c
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-
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-diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
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-index df8bd0c7..94a6de4b 100644
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---- a/drivers/tty/serial/Kconfig
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-+++ b/drivers/tty/serial/Kconfig
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-@@ -1060,6 +1060,29 @@ config SERIAL_OMAP_CONSOLE
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- your boot loader about how to pass options to the kernel at
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- boot time.)
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-
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-+config SERIAL_SIFIVE
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-+ tristate "SiFive UART support"
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-+ depends on OF
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-+ select SERIAL_CORE
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-+ help
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-+ If you have a SiFive Freedom U500 or similar SoC, enable this to
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-+ support the SiFive UART.
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-+
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-+config SERIAL_SIFIVE_CONSOLE
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-+ bool "Console on SiFive UART"
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-+ depends on SERIAL_SIFIVE=y
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-+ select SERIAL_CORE_CONSOLE
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-+ help
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-+ Select this option if you would like to use a SiFive UART as the
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-+ system console.
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-+
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-+ Even if you say Y here, the currently visible virtual console
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-+ (/dev/tty0) will still be used as the system console by default, but
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-+ you can alter that using a kernel command line option such as
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-+ "console=ttySIx". (Try "man bootparam" or see the documentation of
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-+ your boot loader about how to pass options to the kernel at
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-+ boot time.)
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-+
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- config SERIAL_LANTIQ
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- bool "Lantiq serial driver"
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- depends on LANTIQ
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-diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
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-index daac6756..7e906d3c 100644
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---- a/drivers/tty/serial/Makefile
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-+++ b/drivers/tty/serial/Makefile
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-@@ -89,6 +89,7 @@ obj-$(CONFIG_SERIAL_MVEBU_UART) += mvebu-uart.o
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- obj-$(CONFIG_SERIAL_PIC32) += pic32_uart.o
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- obj-$(CONFIG_SERIAL_MPS2_UART) += mps2-uart.o
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- obj-$(CONFIG_SERIAL_OWL) += owl-uart.o
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-+obj-$(CONFIG_SERIAL_SIFIVE) += sifive.o
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-
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- # GPIOLIB helpers for modem control lines
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- obj-$(CONFIG_SERIAL_MCTRL_GPIO) += serial_mctrl_gpio.o
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-diff --git a/drivers/tty/serial/sifive.c b/drivers/tty/serial/sifive.c
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-new file mode 100644
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-index 00000000..588fb31c
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---- /dev/null
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-+++ b/drivers/tty/serial/sifive.c
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-@@ -0,0 +1,1051 @@
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-+// SPDX-License-Identifier: GPL-2.0+
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-+/*
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-+ * SiFive UART driver
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-+ * Copyright (C) 2018 Paul Walmsley <paul@pwsan.com>
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-+ *
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-+ * Based partially on drivers/tty/serial/pxa.c, drivers/pwm/pwm-sifive.c,
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-+ * and drivers/tty/serial/omap-serial.c
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-+ *
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-+ * See Chapter 19 "Universal Asynchronous Receiver/Transmitter (UART)" of
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-+ * SiFive FE310-G000 v2p3.
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-+ *
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-+ * The SiFive UART design is not 8250-compatible. The following common
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-+ * features are not supported:
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-+ * - Word lengths other than 8 bits
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-+ * - Break handling
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-+ * - Parity
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-+ * - Flow control
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-+ * - Modem signals (DSR, RI, etc.)
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-+ * On the other hand, the design is free from the baggage of the classical 8250
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-+ * programming model.
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-+ *
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-+ * This program is free software; you can redistribute it and/or modify
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-+ * it under the terms of the GNU General Public License as published by
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-+ * the Free Software Foundation; either version 2 of the License, or
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-+ * (at your option) any later version.
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-+ *
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-+ * This program is distributed in the hope that it will be useful,
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-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-+ * GNU General Public License for more details.
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-+ */
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-+
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-+/* XXX Magic SYSRQ support - is it possible to implement? */
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-+/* XXX ignore_status_mask */
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-+/* XXX Ensure operations are spinlocked that need to be spinlocked */
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-+
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-+#include <linux/module.h>
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-+#include <linux/init.h>
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-+#include <linux/console.h>
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-+#include <linux/serial_reg.h>
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-+#include <linux/delay.h>
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-+#include <linux/slab.h>
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-+#include <linux/tty.h>
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-+#include <linux/tty_flip.h>
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-+#include <linux/platform_device.h>
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-+#include <linux/io.h>
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-+#include <linux/clk.h>
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-+#include <linux/serial_core.h>
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-+#include <linux/irq.h>
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-+#include <linux/of.h>
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-+#include <linux/of_irq.h>
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-+
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-+/*
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-+ * Register offsets
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-+ */
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-+
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-+/* TXDATA */
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-+#define SIFIVE_SERIAL_TXDATA_OFFS 0x0
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-+#define SIFIVE_SERIAL_TXDATA_FULL_SHIFT 31
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-+#define SIFIVE_SERIAL_TXDATA_FULL_MASK (1 << SIFIVE_SERIAL_TXDATA_FULL_SHIFT)
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-+#define SIFIVE_SERIAL_TXDATA_DATA_SHIFT 0
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-+#define SIFIVE_SERIAL_TXDATA_DATA_MASK (0xff << SIFIVE_SERIAL_TXDATA_DATA_SHIFT)
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-+
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-+/* RXDATA */
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-+#define SIFIVE_SERIAL_RXDATA_OFFS 0x4
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-+#define SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT 31
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-+#define SIFIVE_SERIAL_RXDATA_EMPTY_MASK (1 << SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT)
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-+#define SIFIVE_SERIAL_RXDATA_DATA_SHIFT 0
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-+#define SIFIVE_SERIAL_RXDATA_DATA_MASK (0xff << SIFIVE_SERIAL_RXDATA_DATA_SHIFT)
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-+
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-+/* TXCTRL */
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-+#define SIFIVE_SERIAL_TXCTRL_OFFS 0x8
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-+#define SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT 16
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-+#define SIFIVE_SERIAL_TXCTRL_TXCNT_MASK (0x7 << SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT)
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-+#define SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT 1
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-+#define SIFIVE_SERIAL_TXCTRL_NSTOP_MASK (1 << SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT)
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-+#define SIFIVE_SERIAL_TXCTRL_TXEN_SHIFT 0
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-+#define SIFIVE_SERIAL_TXCTRL_TXEN_MASK (1 << SIFIVE_SERIAL_TXCTRL_TXEN_SHIFT)
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-+
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-+/* RXCTRL */
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-+#define SIFIVE_SERIAL_RXCTRL_OFFS 0xC
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-+#define SIFIVE_SERIAL_RXCTRL_RXCNT_SHIFT 16
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-+#define SIFIVE_SERIAL_RXCTRL_RXCNT_MASK (0x7 << SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT)
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-+#define SIFIVE_SERIAL_RXCTRL_RXEN_SHIFT 0
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-+#define SIFIVE_SERIAL_RXCTRL_RXEN_MASK (1 << SIFIVE_SERIAL_RXCTRL_RXEN_SHIFT)
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-+
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-+/* IE */
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-+#define SIFIVE_SERIAL_IE_OFFS 0x10
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-+#define SIFIVE_SERIAL_IE_RXWM_SHIFT 1
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-+#define SIFIVE_SERIAL_IE_RXWM_MASK (1 << SIFIVE_SERIAL_IE_RXWM_SHIFT)
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-+#define SIFIVE_SERIAL_IE_TXWM_SHIFT 0
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-+#define SIFIVE_SERIAL_IE_TXWM_MASK (1 << SIFIVE_SERIAL_IE_TXWM_SHIFT)
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-+
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-+/* IP */
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-+#define SIFIVE_SERIAL_IP_OFFS 0x14
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-+#define SIFIVE_SERIAL_IP_RXWM_SHIFT 1
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-+#define SIFIVE_SERIAL_IP_RXWM_MASK (1 << SIFIVE_SERIAL_IP_RXWM_SHIFT)
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-+#define SIFIVE_SERIAL_IP_TXWM_SHIFT 0
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-+#define SIFIVE_SERIAL_IP_TXWM_MASK (1 << SIFIVE_SERIAL_IP_TXWM_SHIFT)
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-+
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-+/* DIV */
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-+#define SIFIVE_SERIAL_DIV_OFFS 0x18
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-+#define SIFIVE_SERIAL_DIV_DIV_SHIFT 0
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-+#define SIFIVE_SERIAL_DIV_DIV_MASK (0xffff << SIFIVE_SERIAL_IP_DIV_SHIFT)
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-+
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-+/*
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-+ * Config macros
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-+ */
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-+
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-+/* SIFIVE_SERIAL_MAX_PORTS: maximum number of UARTs possible on a device */
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-+/* XXX Move to Kconfig? */
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-+#define SIFIVE_SERIAL_MAX_PORTS 10
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-+
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-+/* SIFIVE_SERIAL_NAME: our driver's name that we pass to the operating system */
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-+#define SIFIVE_SERIAL_NAME "sifive-serial"
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-+
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-+/* SIFIVE_TTY_PREFIX: tty name prefix for SiFive serial ports */
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-+#define SIFIVE_TTY_PREFIX "ttySI"
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-+
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-+/*
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-+ *
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-+ */
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-+
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-+/**
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-+ * sifive_serial_port - driver-specific data extension to struct uart_port
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-+ * @port: struct uart_port embedded in this struct
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-+ * @dev: struct device *
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-+ * @ier: shadowed copy of the interrupt enable register
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-+ * @clkin_rate: input clock to the UART IP block.
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-+ * @bit_rate: UART serial line rate (e.g., 115200 bps)
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-+ * @clk_notifier: clock rate change notifier for upstream clock changes
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-+ */
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-+struct sifive_serial_port {
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-+ struct uart_port port;
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-+ struct device *dev;
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-+ unsigned char ier;
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-+ unsigned long clkin_rate;
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-+ unsigned long bit_rate;
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-+ struct clk *clk;
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-+ struct notifier_block clk_notifier;
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-+};
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-+
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-+/*
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-+ * Structure container-of macros
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-+ */
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-+
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-+#define port_to_sifive_serial_port(p) (container_of((p), \
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-+ struct sifive_serial_port, \
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-+ port))
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-+
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-+#define notifier_to_sifive_serial_port(nb) (container_of((nb), \
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-+ struct sifive_serial_port, \
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-+ clk_notifier))
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-+
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-+/*
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-+ * Forward declarations
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-+ */
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-+static void sifive_serial_stop_tx(struct uart_port *port);
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-+
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-+/*
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-+ * Internal functions
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-+ */
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-+
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-+/**
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-+ * sifive_serial_early_write() - write to a UART register (early)
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-+ * @port: pointer to a struct uart_port record
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-+ * @offs: register address offset from the IP block base address
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-+ * @v: value to write to the register
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-+ *
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-+ * Given a pointer @port to a struct uart_port record, write the value @v to the
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-+ * IP block register address offset @offs. This function is intended for early
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-+ * console use.
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-+ */
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-+static void sifive_serial_early_write(struct uart_port *port, u16 offs, u32 v)
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-+{
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-+ writel(v, port->membase + offs);
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-+}
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-+
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-+/**
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-+ * sifive_serial_early_read() - read from a UART register (early)
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-+ * @port: pointer to a struct uart_port record
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-+ * @offs: register address offset from the IP block base address
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-+ *
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-+ * Given a pointer @port to a struct uart_port record, read the contents of the
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-+ * IP block register located at offset @offs from the IP block base and return
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-+ * it. This function is intended for early console use.
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-+ *
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-+ * Returns: the register value read from the UART.
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-+ */
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-+static u32 sifive_serial_early_read(struct uart_port *port, u16 offs)
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-+{
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-+ return readl(port->membase + offs);
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-+}
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-+
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-+/**
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-+ * sifive_serial_write() - write to a UART register
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-+ * @ssp: pointer to a struct sifive_serial_port record
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-+ * @offs: register address offset from the IP block base address
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-+ * @v: value to write to the register
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-+ *
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-+ * Write the value @v to the IP block register located at offset @offs from the
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-+ * IP block base, given a pointer @ssp to a struct sifive_serial_port record.
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-+ */
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-+static void sifive_serial_write(struct sifive_serial_port *ssp, u16 offs, u32 v)
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-+{
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-+ sifive_serial_early_write(&ssp->port, offs, v);
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-+}
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-+
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-+/**
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-+ * sifive_serial_read() - read from a UART register
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-+ * @ssp: pointer to a struct sifive_serial_port record
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-+ * @offs: register address offset from the IP block base address
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-+ *
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-+ * Read the contents of the IP block register located at offset @offs from the
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-+ * IP block base, given a pointer @ssp to a struct sifive_serial_port record.
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-+ *
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-+ * Returns: the value of the UART register
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-+ */
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-+static u32 sifive_serial_read(struct sifive_serial_port *ssp, u16 offs)
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-+{
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-+ return sifive_serial_early_read(&ssp->port, offs);
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-+}
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-+
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-+/**
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-+ * sifive_serial_is_txfifo_full() - is the TXFIFO full?
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-+ * @ssp: pointer to a struct sifive_serial_port
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-+ *
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-+ * Read the transmit FIFO "full" bit, returning a non-zero value if the
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-+ * TX FIFO is full, or zero if space remains. Intended to be used to prevent
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-+ * writes to the TX FIFO when it's full.
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-+ *
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-+ * Returns: SIFIVE_SERIAL_TXDATA_FULL_MASK (non-zero) if the transmit FIFO
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-+ * is full, or 0 if space remains.
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-+ */
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-+static int sifive_serial_is_txfifo_full(struct sifive_serial_port *ssp)
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-+{
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-+ return sifive_serial_read(ssp, SIFIVE_SERIAL_TXDATA_OFFS) &
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-+ SIFIVE_SERIAL_TXDATA_FULL_MASK;
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-+}
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-+
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-+/**
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-+ * sifive_serial_transmit_char() - enqueue a byte to transmit onto the TX FIFO
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-+ * @ssp: pointer to a struct sifive_serial_port
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-+ * @ch: character to transmit
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-+ *
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-+ * Enqueue a byte @ch onto the transmit FIFO, given a pointer @ssp to the
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-+ * struct sifive_serial_port * to transmit on. Caller should first check to
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-+ * ensure that the TXFIFO has space; see sifive_serial_is_txfifo_full().
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-+ */
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-+static void sifive_serial_transmit_char(struct sifive_serial_port *ssp, int ch)
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-+{
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-+ sifive_serial_write(ssp, SIFIVE_SERIAL_TXDATA_OFFS, ch);
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-+}
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-+
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-+/**
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-+ * sifive_serial_transmit_chars() - enqueue multiple bytes onto the TX FIFO
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-+ * @ssp: pointer to a struct sifive_serial_port
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-+ *
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-+ * Transfer up to a TX FIFO size's worth of characters from the Linux serial
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-+ * transmit buffer to the SiFive UART TX FIFO.
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-+ */
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-+static void sifive_serial_transmit_chars(struct sifive_serial_port *ssp)
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-+{
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-+ struct circ_buf *xmit = &ssp->port.state->xmit;
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-+ int count;
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-+
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-+ if (ssp->port.x_char) {
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-+ sifive_serial_transmit_char(ssp, ssp->port.x_char);
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-+ ssp->port.icount.tx++;
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-+ ssp->port.x_char = 0;
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-+ return;
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-+ }
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-+ if (uart_circ_empty(xmit) || uart_tx_stopped(&ssp->port)) {
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-+ sifive_serial_stop_tx(&ssp->port);
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-+ return;
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-+ }
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-+ count = ssp->port.fifosize;
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-+ do {
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-+ sifive_serial_transmit_char(ssp, xmit->buf[xmit->tail]);
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-+ xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
|
|
-+ ssp->port.icount.tx++;
|
|
|
-+ if (uart_circ_empty(xmit))
|
|
|
-+ break;
|
|
|
-+ } while (--count > 0);
|
|
|
-+
|
|
|
-+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
|
|
-+ uart_write_wakeup(&ssp->port);
|
|
|
-+
|
|
|
-+ if (uart_circ_empty(xmit))
|
|
|
-+ sifive_serial_stop_tx(&ssp->port);
|
|
|
-+}
|
|
|
-+
|
|
|
-+/**
|
|
|
-+ * sifive_serial_enable_txwm() - enable transmit watermark interrupts
|
|
|
-+ * @ssp: pointer to a struct sifive_serial_port
|
|
|
-+ *
|
|
|
-+ * Enable interrupt generation when the transmit FIFO watermark is reached
|
|
|
-+ * on the UART referred to by @ssp.
|
|
|
-+ */
|
|
|
-+static void sifive_serial_enable_txwm(struct sifive_serial_port *ssp)
|
|
|
-+{
|
|
|
-+ if (ssp->ier & SIFIVE_SERIAL_IE_TXWM_MASK)
|
|
|
-+ return;
|
|
|
-+
|
|
|
-+ ssp->ier |= SIFIVE_SERIAL_IE_TXWM_MASK;
|
|
|
-+ sifive_serial_write(ssp, SIFIVE_SERIAL_IE_OFFS, ssp->ier);
|
|
|
-+}
|
|
|
-+
|
|
|
-+/**
|
|
|
-+ * sifive_serial_enable_rxwm() - enable receive watermark interrupts
|
|
|
-+ * @ssp: pointer to a struct sifive_serial_port
|
|
|
-+ *
|
|
|
-+ * Enable interrupt generation when the receive FIFO watermark is reached
|
|
|
-+ * on the UART referred to by @ssp.
|
|
|
-+ */
|
|
|
-+static void sifive_serial_enable_rxwm(struct sifive_serial_port *ssp)
|
|
|
-+{
|
|
|
-+ if (ssp->ier & SIFIVE_SERIAL_IE_RXWM_MASK)
|
|
|
-+ return;
|
|
|
-+
|
|
|
-+ ssp->ier |= SIFIVE_SERIAL_IE_RXWM_MASK;
|
|
|
-+ sifive_serial_write(ssp, SIFIVE_SERIAL_IE_OFFS, ssp->ier);
|
|
|
-+}
|
|
|
-+
|
|
|
-+/**
|
|
|
-+ * sifive_serial_disable_txwm() - disable transmit watermark interrupts
|
|
|
-+ * @ssp: pointer to a struct sifive_serial_port
|
|
|
-+ *
|
|
|
-+ * Disable interrupt generation when the transmit FIFO watermark is reached
|
|
|
-+ * on the UART referred to by @ssp.
|
|
|
-+ */
|
|
|
-+static void sifive_serial_disable_txwm(struct sifive_serial_port *ssp)
|
|
|
-+{
|
|
|
-+ if (!(ssp->ier & SIFIVE_SERIAL_IE_TXWM_MASK))
|
|
|
-+ return;
|
|
|
-+
|
|
|
-+ ssp->ier &= ~SIFIVE_SERIAL_IE_TXWM_MASK;
|
|
|
-+ sifive_serial_write(ssp, SIFIVE_SERIAL_IE_OFFS, ssp->ier);
|
|
|
-+}
|
|
|
-+
|
|
|
-+/**
|
|
|
-+ * sifive_serial_disable_rxwm() - disable receive watermark interrupts
|
|
|
-+ * @ssp: pointer to a struct sifive_serial_port
|
|
|
-+ *
|
|
|
-+ * Disable interrupt generation when the receive FIFO watermark is reached
|
|
|
-+ * on the UART referred to by @ssp.
|
|
|
-+ */
|
|
|
-+static void sifive_serial_disable_rxwm(struct sifive_serial_port *ssp)
|
|
|
-+{
|
|
|
-+ if (!(ssp->ier & SIFIVE_SERIAL_IE_RXWM_MASK))
|
|
|
-+ return;
|
|
|
-+
|
|
|
-+ ssp->ier &= ~SIFIVE_SERIAL_IE_RXWM_MASK;
|
|
|
-+ sifive_serial_write(ssp, SIFIVE_SERIAL_IE_OFFS, ssp->ier);
|
|
|
-+}
|
|
|
-+
|
|
|
-+/**
|
|
|
-+ * sifive_serial_receive_char() - receive a byte from the UART
|
|
|
-+ * @ssp: pointer to a struct sifive_serial_port
|
|
|
-+ * @is_empty: char pointer to return whether the RX FIFO is empty
|
|
|
-+ *
|
|
|
-+ * Try to read a byte from the SiFive UART RX FIFO, referenced by
|
|
|
-+ * @ssp, and to return it. Also returns the RX FIFO empty bit in
|
|
|
-+ * the char pointed to by @ch. The caller must pass the byte back to the
|
|
|
-+ * Linux serial layer if needed.
|
|
|
-+ *
|
|
|
-+ * Returns: the byte read from the UART RX FIFO.
|
|
|
-+ */
|
|
|
-+static char sifive_serial_receive_char(struct sifive_serial_port *ssp,
|
|
|
-+ char *is_empty)
|
|
|
-+{
|
|
|
-+ u32 v;
|
|
|
-+ u8 ch;
|
|
|
-+
|
|
|
-+ v = sifive_serial_read(ssp, SIFIVE_SERIAL_RXDATA_OFFS);
|
|
|
-+
|
|
|
-+ if (!is_empty)
|
|
|
-+ WARN_ON(1);
|
|
|
-+ else
|
|
|
-+ *is_empty = (v & SIFIVE_SERIAL_RXDATA_EMPTY_MASK) >>
|
|
|
-+ SIFIVE_SERIAL_RXDATA_EMPTY_SHIFT;
|
|
|
-+
|
|
|
-+ ch = (v & SIFIVE_SERIAL_RXDATA_DATA_MASK) >>
|
|
|
-+ SIFIVE_SERIAL_RXDATA_DATA_SHIFT;
|
|
|
-+
|
|
|
-+ return ch;
|
|
|
-+}
|
|
|
-+
|
|
|
-+/**
|
|
|
-+ * sifive_serial_receive_chars() - receive multiple bytes from the UART
|
|
|
-+ * @ssp: pointer to a struct sifive_serial_port
|
|
|
-+ *
|
|
|
-+ * Receive up to an RX FIFO's worth of bytes from the SiFive UART referred
|
|
|
-+ * to by @ssp and pass them up to the Linux serial layer.
|
|
|
-+ */
|
|
|
-+static void sifive_serial_receive_chars(struct sifive_serial_port *ssp)
|
|
|
-+{
|
|
|
-+ unsigned char ch;
|
|
|
-+ char is_empty;
|
|
|
-+ int c;
|
|
|
-+
|
|
|
-+ for (c = ssp->port.fifosize; c > 0; --c) {
|
|
|
-+ ch = sifive_serial_receive_char(ssp, &is_empty);
|
|
|
-+ if (is_empty) break;
|
|
|
-+
|
|
|
-+ ssp->port.icount.rx++;
|
|
|
-+ uart_insert_char(&ssp->port, 0, 0, ch, TTY_NORMAL);
|
|
|
-+ }
|
|
|
-+}
|
|
|
-+
|
|
|
-+/**
|
|
|
-+ * sifive_serial_update_div() - calculate the divisor setting by the line rate
|
|
|
-+ * @ssp: pointer to a struct sifive_serial_port
|
|
|
-+ *
|
|
|
-+ * Calculate the appropriate value of the clock divisor for the UART
|
|
|
-+ * referred to by @ssp and the target line rate referred to by @bps, and
|
|
|
-+ * return it.
|
|
|
-+ */
|
|
|
-+static void sifive_serial_update_div(struct sifive_serial_port *ssp)
|
|
|
-+{
|
|
|
-+ u16 div = DIV_ROUND_UP(ssp->clkin_rate, ssp->bit_rate) - 1;
|
|
|
-+ /* XXX check for div out of spec */
|
|
|
-+ sifive_serial_write(ssp, SIFIVE_SERIAL_DIV_OFFS, div);
|
|
|
-+}
|
|
|
-+
|
|
|
-+/**
|
|
|
-+ * sifive_serial_update_bit_rate() - set the UART "baud rate"
|
|
|
-+ * @ssp: pointer to a struct sifive_serial_port
|
|
|
-+ * @rate: new target bit rate
|
|
|
-+ *
|
|
|
-+ * Calculate the UART divisor value for the target bit rate @rate for the
|
|
|
-+ * SiFive UART described by @ssp and program it into the UART. There may
|
|
|
-+ * be some error between the target bit rate and the actual bit rate implemented
|
|
|
-+ * by the UART due to clock ratio granularity.
|
|
|
-+ */
|
|
|
-+static void sifive_serial_update_bit_rate(struct sifive_serial_port *ssp,
|
|
|
-+ unsigned int rate)
|
|
|
-+{
|
|
|
-+ if (ssp->bit_rate == rate)
|
|
|
-+ return;
|
|
|
-+
|
|
|
-+ ssp->bit_rate = rate;
|
|
|
-+ sifive_serial_update_div(ssp);
|
|
|
-+}
|
|
|
-+
|
|
|
-+/**
|
|
|
-+ * sifive_serial_set_stop_bits() - set the number of stop bits
|
|
|
-+ * @ssp: pointer to a struct sifive_serial_port
|
|
|
-+ * @nstop: 1 or 2 (stop bits)
|
|
|
-+ *
|
|
|
-+ * Program the SiFive UART referred to by @ssp to use @nstop stop bits.
|
|
|
-+ */
|
|
|
-+static void sifive_serial_set_stop_bits(struct sifive_serial_port *ssp,
|
|
|
-+ char nstop)
|
|
|
-+{
|
|
|
-+ u32 v;
|
|
|
-+
|
|
|
-+ if (nstop < 1 || nstop > 2) {
|
|
|
-+ WARN_ON(1);
|
|
|
-+ return;
|
|
|
-+ }
|
|
|
-+
|
|
|
-+ v = sifive_serial_read(ssp, SIFIVE_SERIAL_TXCTRL_OFFS);
|
|
|
-+ v &= ~SIFIVE_SERIAL_TXCTRL_NSTOP_MASK;
|
|
|
-+ v |= (nstop-1) << SIFIVE_SERIAL_TXCTRL_NSTOP_SHIFT;
|
|
|
-+ sifive_serial_write(ssp, SIFIVE_SERIAL_TXCTRL_OFFS, v);
|
|
|
-+}
|
|
|
-+
|
|
|
-+/**
|
|
|
-+ * sifive_serial_wait_for_xmitr() - wait for an empty slot on the TX FIFO
|
|
|
-+ * @ssp: pointer to a struct sifive_serial_port
|
|
|
-+ *
|
|
|
-+ * Delay while the UART TX FIFO referred to by @ssp is marked as full.
|
|
|
-+ *
|
|
|
-+ * XXX Probably should use a timeout/bailout.
|
|
|
-+ */
|
|
|
-+static inline void sifive_serial_wait_for_xmitr(struct sifive_serial_port *ssp)
|
|
|
-+{
|
|
|
-+ while (sifive_serial_is_txfifo_full(ssp))
|
|
|
-+ udelay(1); /* XXX Should vary by bps rate */
|
|
|
-+}
|
|
|
-+
|
|
|
-+/*
|
|
|
-+ * Linux serial API functions
|
|
|
-+ */
|
|
|
-+
|
|
|
-+static void sifive_serial_stop_tx(struct uart_port *port)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
|
|
|
-+
|
|
|
-+ sifive_serial_disable_txwm(ssp);
|
|
|
-+}
|
|
|
-+
|
|
|
-+static void sifive_serial_stop_rx(struct uart_port *port)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
|
|
|
-+
|
|
|
-+ sifive_serial_disable_rxwm(ssp);
|
|
|
-+}
|
|
|
-+
|
|
|
-+static void sifive_serial_start_tx(struct uart_port *port)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
|
|
|
-+
|
|
|
-+ sifive_serial_enable_txwm(ssp);
|
|
|
-+}
|
|
|
-+
|
|
|
-+static irqreturn_t sifive_serial_irq(int irq, void *dev_id)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp = dev_id;
|
|
|
-+ irqreturn_t r = IRQ_NONE;
|
|
|
-+ int c = ssp->port.fifosize;
|
|
|
-+ u32 ip;
|
|
|
-+
|
|
|
-+ spin_lock(&ssp->port.lock);
|
|
|
-+
|
|
|
-+ do {
|
|
|
-+ ip = sifive_serial_read(ssp, SIFIVE_SERIAL_IP_OFFS);
|
|
|
-+ if (!ip)
|
|
|
-+ break;
|
|
|
-+
|
|
|
-+ r = IRQ_HANDLED;
|
|
|
-+
|
|
|
-+ if (ip & SIFIVE_SERIAL_IP_RXWM_MASK)
|
|
|
-+ sifive_serial_receive_chars(ssp);
|
|
|
-+ if (ip & SIFIVE_SERIAL_IP_TXWM_MASK)
|
|
|
-+ sifive_serial_transmit_chars(ssp);
|
|
|
-+ } while (c--);
|
|
|
-+
|
|
|
-+ spin_unlock(&ssp->port.lock);
|
|
|
-+
|
|
|
-+ tty_flip_buffer_push(&ssp->port.state->port);
|
|
|
-+
|
|
|
-+ return r;
|
|
|
-+}
|
|
|
-+
|
|
|
-+static unsigned int sifive_serial_tx_empty(struct uart_port *port)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
|
|
|
-+
|
|
|
-+ return !sifive_serial_is_txfifo_full(ssp);
|
|
|
-+}
|
|
|
-+
|
|
|
-+static unsigned int sifive_serial_get_mctrl(struct uart_port *port)
|
|
|
-+{
|
|
|
-+ return 0; /* XXX -EINVAL? */
|
|
|
-+}
|
|
|
-+
|
|
|
-+static void sifive_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
|
|
|
-+{
|
|
|
-+ // dev_err(port->dev, "set_mctrl not supported\n");
|
|
|
-+}
|
|
|
-+
|
|
|
-+static void sifive_serial_break_ctl(struct uart_port *port, int break_state)
|
|
|
-+{
|
|
|
-+ dev_err(port->dev, "sending break not supported\n");
|
|
|
-+}
|
|
|
-+
|
|
|
-+static int sifive_serial_startup(struct uart_port *port)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
|
|
|
-+
|
|
|
-+ sifive_serial_enable_rxwm(ssp);
|
|
|
-+
|
|
|
-+ return 0;
|
|
|
-+}
|
|
|
-+
|
|
|
-+static void sifive_serial_shutdown(struct uart_port *port)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
|
|
|
-+
|
|
|
-+ sifive_serial_disable_rxwm(ssp);
|
|
|
-+ sifive_serial_disable_txwm(ssp);
|
|
|
-+}
|
|
|
-+
|
|
|
-+/**
|
|
|
-+ * sifive_serial_clk_notifier() - clock post-rate-change notifier
|
|
|
-+ * @nb: pointer to the struct notifier_block, from the notifier code
|
|
|
-+ * @event: event mask from the notifier code
|
|
|
-+ * @data: pointer to the struct clk_notifier_data from the notifier code
|
|
|
-+ *
|
|
|
-+ * On the H5U SoC, the UART IP block is derived from the CPU clock source
|
|
|
-+ * after a synchronous divide-by-two divider, so any CPU clock rate change
|
|
|
-+ * requires the UART baud rate to be updated. This presumably could corrupt any
|
|
|
-+ * serial word currently being transmitted or received. It would probably
|
|
|
-+ * be better to stop receives and transmits, then complete the baud rate
|
|
|
-+ * change, then re-enable them.
|
|
|
-+ */
|
|
|
-+static int sifive_serial_clk_notifier(struct notifier_block *nb,
|
|
|
-+ unsigned long event, void *data)
|
|
|
-+{
|
|
|
-+ struct clk_notifier_data *cnd = data;
|
|
|
-+ struct sifive_serial_port *ssp = notifier_to_sifive_serial_port(nb);
|
|
|
-+
|
|
|
-+ if (event == POST_RATE_CHANGE && ssp->clkin_rate != cnd->new_rate) {
|
|
|
-+ ssp->clkin_rate = cnd->new_rate;
|
|
|
-+ sifive_serial_update_div(ssp);
|
|
|
-+ }
|
|
|
-+
|
|
|
-+ return NOTIFY_OK;
|
|
|
-+}
|
|
|
-+
|
|
|
-+static void sifive_serial_set_termios(struct uart_port *port,
|
|
|
-+ struct ktermios *termios,
|
|
|
-+ struct ktermios *old)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
|
|
|
-+ int rate;
|
|
|
-+ char nstop;
|
|
|
-+
|
|
|
-+ if ((termios->c_cflag & CSIZE) != CS8) {
|
|
|
-+ dev_err(ssp->port.dev, "only 8-bit words supported\n");
|
|
|
-+ return;
|
|
|
-+ }
|
|
|
-+
|
|
|
-+ /* Set number of stop bits */
|
|
|
-+ nstop = (termios->c_cflag & CSTOPB) ? 2 : 1;
|
|
|
-+ sifive_serial_set_stop_bits(ssp, nstop);
|
|
|
-+
|
|
|
-+ /* Set line rate */
|
|
|
-+ rate = uart_get_baud_rate(port, termios, old, 0, ssp->clkin_rate / 16);
|
|
|
-+ sifive_serial_update_bit_rate(ssp, rate);
|
|
|
-+
|
|
|
-+ /* XXX Enable FIFOs with watermark 1 */
|
|
|
-+
|
|
|
-+#if 0
|
|
|
-+ spin_lock_irqsave(&ssp->port.lock, flags);
|
|
|
-+#endif
|
|
|
-+
|
|
|
-+ /*
|
|
|
-+ * Update the per-port timeout.
|
|
|
-+ */
|
|
|
-+ uart_update_timeout(port, termios->c_cflag, rate);
|
|
|
-+
|
|
|
-+ /* XXX */
|
|
|
-+ ssp->port.read_status_mask = 0;
|
|
|
-+ if (termios->c_iflag & INPCK) {
|
|
|
-+ dev_err(ssp->port.dev, "INPCK flag not supported\n");
|
|
|
-+ return;
|
|
|
-+ }
|
|
|
-+ if (termios->c_iflag & (BRKINT | PARMRK)) {
|
|
|
-+ dev_err(ssp->port.dev, "BRKINT/PARMRK flag not supported\n");
|
|
|
-+ return;
|
|
|
-+ }
|
|
|
-+
|
|
|
-+#if 0
|
|
|
-+ /*
|
|
|
-+ * ignore all characters if CREAD is not set
|
|
|
-+ */
|
|
|
-+ if ((termios->c_cflag & CREAD) == 0)
|
|
|
-+ ssp->port.ignore_status_mask |= UART_LSR_DR;
|
|
|
-+#endif
|
|
|
-+
|
|
|
-+ /* XXX enable interrupts */
|
|
|
-+}
|
|
|
-+
|
|
|
-+static void sifive_serial_release_port(struct uart_port *port)
|
|
|
-+{
|
|
|
-+}
|
|
|
-+
|
|
|
-+static int sifive_serial_request_port(struct uart_port *port)
|
|
|
-+{
|
|
|
-+ return 0;
|
|
|
-+}
|
|
|
-+
|
|
|
-+static void sifive_serial_config_port(struct uart_port *port, int flags)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
|
|
|
-+
|
|
|
-+ ssp->port.type = PORT_SIFIVE_H5U;
|
|
|
-+}
|
|
|
-+
|
|
|
-+static int sifive_serial_verify_port(struct uart_port *port,
|
|
|
-+ struct serial_struct *ser)
|
|
|
-+{
|
|
|
-+ return -EINVAL;
|
|
|
-+}
|
|
|
-+
|
|
|
-+static const char *sifive_serial_type(struct uart_port *port)
|
|
|
-+{
|
|
|
-+ return port->type == PORT_SIFIVE_H5U ? SIFIVE_SERIAL_NAME : NULL;
|
|
|
-+}
|
|
|
-+
|
|
|
-+/*
|
|
|
-+ * Polling support
|
|
|
-+ */
|
|
|
-+
|
|
|
-+#ifdef CONFIG_CONSOLE_POLL
|
|
|
-+
|
|
|
-+static void sifive_serial_poll_put_char(struct uart_port *port,
|
|
|
-+ unsigned char ch)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
|
|
|
-+
|
|
|
-+ sifive_serial_wait_for_xmitr(ssp);
|
|
|
-+ sifive_serial_write(ssp, SIFIVE_SERIAL_TXDATA_OFFS, ch);
|
|
|
-+}
|
|
|
-+
|
|
|
-+static int sifive_serial_poll_get_char(struct uart_port *port)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
|
|
|
-+ char is_empty, ch;
|
|
|
-+
|
|
|
-+ ch = sifive_serial_receive_char(ssp, &is_empty);
|
|
|
-+ if (is_empty)
|
|
|
-+ return NO_POLL_CHAR;
|
|
|
-+
|
|
|
-+ return ch;
|
|
|
-+}
|
|
|
-+
|
|
|
-+#endif /* CONFIG_CONSOLE_POLL */
|
|
|
-+
|
|
|
-+/*
|
|
|
-+ * Earlyconsole support
|
|
|
-+ */
|
|
|
-+
|
|
|
-+#ifdef CONFIG_SERIAL_EARLYCON
|
|
|
-+static void early_sifive_serial_putc(struct uart_port *port, int c)
|
|
|
-+{
|
|
|
-+ while (sifive_serial_early_read(port, SIFIVE_SERIAL_TXDATA_OFFS) &
|
|
|
-+ SIFIVE_SERIAL_TXDATA_FULL_MASK)
|
|
|
-+ cpu_relax();
|
|
|
-+
|
|
|
-+ sifive_serial_early_write(port, SIFIVE_SERIAL_TXDATA_OFFS, c);
|
|
|
-+}
|
|
|
-+
|
|
|
-+void early_sifive_serial_write(struct console *console, const char *s,
|
|
|
-+ unsigned int count)
|
|
|
-+{
|
|
|
-+ struct earlycon_device *device = console->data;
|
|
|
-+ struct uart_port *port = &device->port;
|
|
|
-+
|
|
|
-+ uart_console_write(port, s, count, early_sifive_serial_putc);
|
|
|
-+}
|
|
|
-+
|
|
|
-+static int __init early_sifive_serial_setup(struct earlycon_device *device,
|
|
|
-+ const char *options)
|
|
|
-+{
|
|
|
-+ struct uart_port *port = &device->port;
|
|
|
-+
|
|
|
-+ if (!(port->membase || port->iobase))
|
|
|
-+ return -ENODEV;
|
|
|
-+
|
|
|
-+ device->con->write = early_sifive_serial_write;
|
|
|
-+ return 0;
|
|
|
-+}
|
|
|
-+
|
|
|
-+OF_EARLYCON_DECLARE(sifive, "sifive,freedom-uart", early_sifive_serial_setup);
|
|
|
-+#endif /* CONFIG_SERIAL_EARLYCON */
|
|
|
-+
|
|
|
-+/*
|
|
|
-+ * Linux console interface
|
|
|
-+ */
|
|
|
-+
|
|
|
-+#ifdef CONFIG_SERIAL_SIFIVE_CONSOLE
|
|
|
-+
|
|
|
-+static struct sifive_serial_port *sifive_serial_console_ports[SIFIVE_SERIAL_MAX_PORTS];
|
|
|
-+
|
|
|
-+static void sifive_serial_console_putchar(struct uart_port *port, int ch)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
|
|
|
-+
|
|
|
-+ sifive_serial_wait_for_xmitr(ssp);
|
|
|
-+ sifive_serial_transmit_char(ssp, ch);
|
|
|
-+}
|
|
|
-+
|
|
|
-+static void sifive_serial_console_write(struct console *co, const char *s,
|
|
|
-+ unsigned int count)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp = sifive_serial_console_ports[co->index];
|
|
|
-+ unsigned long flags;
|
|
|
-+ unsigned int ier;
|
|
|
-+ int locked = 1;
|
|
|
-+
|
|
|
-+ if (!ssp) return;
|
|
|
-+
|
|
|
-+ local_irq_save(flags);
|
|
|
-+ if (ssp->port.sysrq)
|
|
|
-+ locked = 0;
|
|
|
-+ else if (oops_in_progress)
|
|
|
-+ locked = spin_trylock(&ssp->port.lock);
|
|
|
-+ else
|
|
|
-+ spin_lock(&ssp->port.lock);
|
|
|
-+
|
|
|
-+ ier = sifive_serial_read(ssp, SIFIVE_SERIAL_IE_OFFS);
|
|
|
-+ sifive_serial_write(ssp, SIFIVE_SERIAL_IE_OFFS, 0);
|
|
|
-+
|
|
|
-+ uart_console_write(&ssp->port, s, count, sifive_serial_console_putchar);
|
|
|
-+
|
|
|
-+ sifive_serial_write(ssp, SIFIVE_SERIAL_IE_OFFS, ier);
|
|
|
-+
|
|
|
-+ if (locked)
|
|
|
-+ spin_unlock(&ssp->port.lock);
|
|
|
-+ local_irq_restore(flags);
|
|
|
-+}
|
|
|
-+
|
|
|
-+static int __init sifive_serial_console_setup(struct console *co, char *options)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp;
|
|
|
-+ int baud = 115200;
|
|
|
-+ int bits = 8;
|
|
|
-+ int parity = 'n';
|
|
|
-+ int flow = 'n';
|
|
|
-+
|
|
|
-+ ssp = sifive_serial_console_ports[co->index];
|
|
|
-+ if (!ssp)
|
|
|
-+ return -ENODEV;
|
|
|
-+
|
|
|
-+ if (options)
|
|
|
-+ uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
|
-+
|
|
|
-+ return uart_set_options(&ssp->port, co, baud, parity, bits, flow);
|
|
|
-+}
|
|
|
-+
|
|
|
-+static struct uart_driver sifive_serial_uart_driver;
|
|
|
-+
|
|
|
-+static struct console sifive_serial_console = {
|
|
|
-+ .name = SIFIVE_TTY_PREFIX,
|
|
|
-+ .write = sifive_serial_console_write,
|
|
|
-+ .device = uart_console_device,
|
|
|
-+ .setup = sifive_serial_console_setup,
|
|
|
-+ .flags = CON_PRINTBUFFER,
|
|
|
-+ .index = -1,
|
|
|
-+ .data = &sifive_serial_uart_driver,
|
|
|
-+};
|
|
|
-+
|
|
|
-+static void sifive_serial_add_console_port(struct sifive_serial_port *ssp)
|
|
|
-+{
|
|
|
-+ sifive_serial_console_ports[ssp->port.line] = ssp;
|
|
|
-+}
|
|
|
-+
|
|
|
-+static void sifive_serial_remove_console_port(struct sifive_serial_port *ssp)
|
|
|
-+{
|
|
|
-+ sifive_serial_console_ports[ssp->port.line] = 0;
|
|
|
-+}
|
|
|
-+
|
|
|
-+#define SIFIVE_SERIAL_CONSOLE (&sifive_serial_console)
|
|
|
-+
|
|
|
-+#else
|
|
|
-+
|
|
|
-+#define SIFIVE_SERIAL_CONSOLE NULL
|
|
|
-+
|
|
|
-+static inline void sifive_serial_add_console_port(struct sifive_serial_port *ssp)
|
|
|
-+{}
|
|
|
-+static void sifive_serial_remove_console_port(struct sifive_serial_port *ssp)
|
|
|
-+{}
|
|
|
-+
|
|
|
-+#endif
|
|
|
-+
|
|
|
-+static const struct uart_ops sifive_serial_uops = {
|
|
|
-+ .tx_empty = sifive_serial_tx_empty,
|
|
|
-+ .set_mctrl = sifive_serial_set_mctrl,
|
|
|
-+ .get_mctrl = sifive_serial_get_mctrl,
|
|
|
-+ .stop_tx = sifive_serial_stop_tx,
|
|
|
-+ .start_tx = sifive_serial_start_tx,
|
|
|
-+ .stop_rx = sifive_serial_stop_rx,
|
|
|
-+ .break_ctl = sifive_serial_break_ctl,
|
|
|
-+ .startup = sifive_serial_startup,
|
|
|
-+ .shutdown = sifive_serial_shutdown,
|
|
|
-+ .set_termios = sifive_serial_set_termios,
|
|
|
-+ .type = sifive_serial_type,
|
|
|
-+ .release_port = sifive_serial_release_port,
|
|
|
-+ .request_port = sifive_serial_request_port,
|
|
|
-+ .config_port = sifive_serial_config_port,
|
|
|
-+ .verify_port = sifive_serial_verify_port,
|
|
|
-+#ifdef CONFIG_CONSOLE_POLL
|
|
|
-+ .poll_put_char = sifive_serial_poll_put_char,
|
|
|
-+ .poll_get_char = sifive_serial_poll_get_char,
|
|
|
-+#endif
|
|
|
-+};
|
|
|
-+
|
|
|
-+static struct uart_driver sifive_serial_uart_driver = {
|
|
|
-+ .owner = THIS_MODULE,
|
|
|
-+ .driver_name = SIFIVE_SERIAL_NAME,
|
|
|
-+ .dev_name = "ttySI",
|
|
|
-+ .nr = SIFIVE_SERIAL_MAX_PORTS,
|
|
|
-+ .cons = SIFIVE_SERIAL_CONSOLE,
|
|
|
-+};
|
|
|
-+
|
|
|
-+static int sifive_serial_probe(struct platform_device *pdev)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp;
|
|
|
-+ struct resource *mem;
|
|
|
-+ struct clk *clk;
|
|
|
-+ void __iomem *base;
|
|
|
-+ int irq, id, r;
|
|
|
-+
|
|
|
-+ irq = platform_get_irq(pdev, 0);
|
|
|
-+ if (irq < 0) {
|
|
|
-+ dev_err(&pdev->dev, "could not acquire interrupt\n");
|
|
|
-+ return -EPROBE_DEFER;
|
|
|
-+ }
|
|
|
-+
|
|
|
-+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
-+ base = devm_ioremap_resource(&pdev->dev, mem);
|
|
|
-+ if (IS_ERR(base)) {
|
|
|
-+ dev_err(&pdev->dev, "could not acquire device memory\n");
|
|
|
-+ return PTR_ERR(base);
|
|
|
-+ }
|
|
|
-+
|
|
|
-+ clk = devm_clk_get(&pdev->dev, NULL);
|
|
|
-+ if (IS_ERR(clk)) {
|
|
|
-+ dev_err(&pdev->dev, "unable to find controller clock\n");
|
|
|
-+ return PTR_ERR(clk);
|
|
|
-+ }
|
|
|
-+
|
|
|
-+ id = of_alias_get_id(pdev->dev.of_node, "serial");
|
|
|
-+ if (id < 0) {
|
|
|
-+ dev_err(&pdev->dev, "missing aliases entry\n");
|
|
|
-+ return id;
|
|
|
-+ }
|
|
|
-+
|
|
|
-+#ifdef CONFIG_SERIAL_SIFIVE_CONSOLE
|
|
|
-+ if (id > SIFIVE_SERIAL_MAX_PORTS) {
|
|
|
-+ dev_err(&pdev->dev, "too many UARTs (%d)\n", id);
|
|
|
-+ return -EINVAL;
|
|
|
-+ }
|
|
|
-+#endif
|
|
|
-+
|
|
|
-+ ssp = devm_kzalloc(&pdev->dev, sizeof(*ssp), GFP_KERNEL);
|
|
|
-+ if (!ssp)
|
|
|
-+ return -ENOMEM;
|
|
|
-+
|
|
|
-+ ssp->port.dev = &pdev->dev;
|
|
|
-+ ssp->port.type = PORT_SIFIVE_H5U;
|
|
|
-+ ssp->port.iotype = UPIO_MEM;
|
|
|
-+ ssp->port.irq = irq;
|
|
|
-+ ssp->port.fifosize = 8;
|
|
|
-+ ssp->port.ops = &sifive_serial_uops;
|
|
|
-+ ssp->port.line = id;
|
|
|
-+ ssp->port.mapbase = mem->start;
|
|
|
-+ ssp->port.membase = base;
|
|
|
-+ ssp->dev = &pdev->dev;
|
|
|
-+ ssp->clk = clk;
|
|
|
-+ ssp->clk_notifier.notifier_call = sifive_serial_clk_notifier;
|
|
|
-+
|
|
|
-+ r = clk_notifier_register(ssp->clk, &ssp->clk_notifier);
|
|
|
-+ if (r) {
|
|
|
-+ dev_err(&pdev->dev, "could not register clock notifier: %d\n",
|
|
|
-+ r);
|
|
|
-+ goto probe_out1;
|
|
|
-+ }
|
|
|
-+
|
|
|
-+ /* Setup clock divider */
|
|
|
-+ ssp->clkin_rate = clk_get_rate(ssp->clk);
|
|
|
-+ ssp->bit_rate = 115200;
|
|
|
-+ sifive_serial_update_div(ssp);
|
|
|
-+
|
|
|
-+ platform_set_drvdata(pdev, ssp);
|
|
|
-+
|
|
|
-+ /* Enable transmits and set the watermark level to 1 */
|
|
|
-+ sifive_serial_write(ssp, SIFIVE_SERIAL_TXCTRL_OFFS,
|
|
|
-+ (1 << SIFIVE_SERIAL_TXCTRL_TXCNT_SHIFT) |
|
|
|
-+ SIFIVE_SERIAL_TXCTRL_TXEN_MASK);
|
|
|
-+
|
|
|
-+ /* Enable receives and set the watermark level to 0 */
|
|
|
-+ sifive_serial_write(ssp, SIFIVE_SERIAL_RXCTRL_OFFS,
|
|
|
-+ (0 << SIFIVE_SERIAL_RXCTRL_RXCNT_SHIFT) |
|
|
|
-+ SIFIVE_SERIAL_RXCTRL_RXEN_MASK);
|
|
|
-+
|
|
|
-+ r = request_irq(ssp->port.irq, sifive_serial_irq, ssp->port.irqflags,
|
|
|
-+ dev_name(&pdev->dev), ssp);
|
|
|
-+ if (r) {
|
|
|
-+ dev_err(&pdev->dev, "could not attach interrupt: %d\n", r);
|
|
|
-+ goto probe_out2;
|
|
|
-+ }
|
|
|
-+
|
|
|
-+ r = uart_add_one_port(&sifive_serial_uart_driver, &ssp->port);
|
|
|
-+ if (r != 0) {
|
|
|
-+ dev_err(&pdev->dev, "could not add uart: %d\n", r);
|
|
|
-+ goto probe_out3;
|
|
|
-+ }
|
|
|
-+
|
|
|
-+ sifive_serial_add_console_port(ssp);
|
|
|
-+
|
|
|
-+ return 0;
|
|
|
-+
|
|
|
-+probe_out3:
|
|
|
-+ free_irq(ssp->port.irq, ssp);
|
|
|
-+probe_out2:
|
|
|
-+ clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);
|
|
|
-+probe_out1:
|
|
|
-+ return r;
|
|
|
-+}
|
|
|
-+
|
|
|
-+static int sifive_serial_remove(struct platform_device *dev)
|
|
|
-+{
|
|
|
-+ struct sifive_serial_port *ssp = platform_get_drvdata(dev);
|
|
|
-+
|
|
|
-+ sifive_serial_remove_console_port(ssp);
|
|
|
-+ uart_remove_one_port(&sifive_serial_uart_driver, &ssp->port);
|
|
|
-+ free_irq(ssp->port.irq, ssp);
|
|
|
-+ clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);
|
|
|
-+
|
|
|
-+ return 0;
|
|
|
-+}
|
|
|
-+
|
|
|
-+static const struct of_device_id sifive_serial_of_match[] = {
|
|
|
-+ { .compatible = "sifive,uart0" },
|
|
|
-+ {},
|
|
|
-+};
|
|
|
-+MODULE_DEVICE_TABLE(of, sifive_serial_match);
|
|
|
-+
|
|
|
-+static struct platform_driver sifive_serial_platform_driver = {
|
|
|
-+ .probe = sifive_serial_probe,
|
|
|
-+ .remove = sifive_serial_remove,
|
|
|
-+ .driver = {
|
|
|
-+ .name = SIFIVE_SERIAL_NAME,
|
|
|
-+ .of_match_table = of_match_ptr(sifive_serial_of_match),
|
|
|
-+ },
|
|
|
-+};
|
|
|
-+
|
|
|
-+static int __init sifive_serial_init(void)
|
|
|
-+{
|
|
|
-+ struct tty_driver *tty_drv;
|
|
|
-+ int r;
|
|
|
-+
|
|
|
-+ r = uart_register_driver(&sifive_serial_uart_driver);
|
|
|
-+ if (r) goto init_out1;
|
|
|
-+
|
|
|
-+ tty_drv = sifive_serial_uart_driver.tty_driver;
|
|
|
-+ if (!tty_drv) goto init_out2;
|
|
|
-+
|
|
|
-+ /* change default terminal settings for SiFive uarts */
|
|
|
-+ tty_drv->init_termios.c_cflag = B115200 | CS8 | CREAD | HUPCL | CLOCAL;
|
|
|
-+ tty_drv->init_termios.c_ispeed = 115200;
|
|
|
-+ tty_drv->init_termios.c_ospeed = 115200;
|
|
|
-+
|
|
|
-+ r = platform_driver_register(&sifive_serial_platform_driver);
|
|
|
-+ if (r) goto init_out2;
|
|
|
-+
|
|
|
-+ return 0;
|
|
|
-+
|
|
|
-+init_out2:
|
|
|
-+ uart_unregister_driver(&sifive_serial_uart_driver);
|
|
|
-+init_out1:
|
|
|
-+ return r;
|
|
|
-+}
|
|
|
-+
|
|
|
-+static void __exit sifive_serial_exit(void)
|
|
|
-+{
|
|
|
-+ platform_driver_unregister(&sifive_serial_platform_driver);
|
|
|
-+ uart_unregister_driver(&sifive_serial_uart_driver);
|
|
|
-+}
|
|
|
-+
|
|
|
-+module_init(sifive_serial_init);
|
|
|
-+module_exit(sifive_serial_exit);
|
|
|
-+
|
|
|
-+MODULE_DESCRIPTION("SiFive UART serial driver");
|
|
|
-+MODULE_LICENSE("GPL");
|
|
|
-+MODULE_AUTHOR("Paul Walmsley <paul@pwsan.com>");
|
|
|
-diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
|
|
|
-index dce5f9da..86973c38 100644
|
|
|
---- a/include/uapi/linux/serial_core.h
|
|
|
-+++ b/include/uapi/linux/serial_core.h
|
|
|
-@@ -281,4 +281,7 @@
|
|
|
- /* MediaTek BTIF */
|
|
|
- #define PORT_MTK_BTIF 117
|
|
|
-
|
|
|
-+/* SiFive UART */
|
|
|
-+#define PORT_SIFIVE_H5U 118
|
|
|
-+
|
|
|
- #endif /* _UAPILINUX_SERIAL_CORE_H */
|
|
|
---
|
|
|
-2.7.4
|
|
|
-
|