tune-ppce500v2.inc 1.1 KB

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  1. DEFAULTTUNE ?= "ppce500v2"
  2. require conf/machine/include/powerpc/arch-powerpc.inc
  3. TUNEVALID[ppce500v2] = "Enable ppce500v2 specific processor optimizations"
  4. # FIXME
  5. # Workaround for ICE of gcc-4.8.x when passing -mfloat-gprs=double
  6. # Bug: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57717#c1
  7. # Replace double-float with single-float, revert this when above bug is fixed
  8. PPCE500V2_CCARG = "${@'-te500v2' if d.getVar('CSL_IS_PRO', True) == '1' else '-mcpu=8548 -mabi=spe -mspe -mfloat-gprs=single'}"
  9. TUNE_CCARGS_append = " ${@bb.utils.contains("TUNE_FEATURES", "ppce500v2", PPCE500V2_CCARG, "", d)}"
  10. # Note that SPE is implied by the ppce500v2 feature
  11. TARGET_FPU .= "${@bb.utils.contains("TUNE_FEATURES", "ppce500v2", "ppc-efd", "", d)}"
  12. # spe is defined potentially in two places, so we want to be sure it will
  13. # only write spe once to the ABIEXTENSIONS field.
  14. SPEABIEXTENSION = "${@bb.utils.contains("TUNE_FEATURES", "ppce500v2", "spe", "", d)}"
  15. ABIEXTENSION .= "${SPEABIEXTENSION}"
  16. AVAILTUNES += "ppce500v2"
  17. TUNE_FEATURES_tune-ppce500v2 = "m32 ppce500v2"
  18. TUNE_PKGARCH_tune-ppce500v2 = "ppce500v2"
  19. PACKAGE_EXTRA_ARCHS_tune-ppce500v2 = "ppce500v2"