cs-etm.h 5.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright(C) 2015 Linaro Limited. All rights reserved.
  4. * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
  5. */
  6. #ifndef INCLUDE__UTIL_PERF_CS_ETM_H__
  7. #define INCLUDE__UTIL_PERF_CS_ETM_H__
  8. #include "util/event.h"
  9. #include <linux/bits.h>
  10. struct perf_session;
  11. /* Versionning header in case things need tro change in the future. That way
  12. * decoding of old snapshot is still possible.
  13. */
  14. enum {
  15. /* Starting with 0x0 */
  16. CS_HEADER_VERSION_0,
  17. /* PMU->type (32 bit), total # of CPUs (32 bit) */
  18. CS_PMU_TYPE_CPUS,
  19. CS_ETM_SNAPSHOT,
  20. CS_HEADER_VERSION_0_MAX,
  21. };
  22. /* Beginning of header common to both ETMv3 and V4 */
  23. enum {
  24. CS_ETM_MAGIC,
  25. CS_ETM_CPU,
  26. };
  27. /* ETMv3/PTM metadata */
  28. enum {
  29. /* Dynamic, configurable parameters */
  30. CS_ETM_ETMCR = CS_ETM_CPU + 1,
  31. CS_ETM_ETMTRACEIDR,
  32. /* RO, taken from sysFS */
  33. CS_ETM_ETMCCER,
  34. CS_ETM_ETMIDR,
  35. CS_ETM_PRIV_MAX,
  36. };
  37. /* ETMv4 metadata */
  38. enum {
  39. /* Dynamic, configurable parameters */
  40. CS_ETMV4_TRCCONFIGR = CS_ETM_CPU + 1,
  41. CS_ETMV4_TRCTRACEIDR,
  42. /* RO, taken from sysFS */
  43. CS_ETMV4_TRCIDR0,
  44. CS_ETMV4_TRCIDR1,
  45. CS_ETMV4_TRCIDR2,
  46. CS_ETMV4_TRCIDR8,
  47. CS_ETMV4_TRCAUTHSTATUS,
  48. CS_ETMV4_PRIV_MAX,
  49. };
  50. /*
  51. * ETMv3 exception encoding number:
  52. * See Embedded Trace Macrocell spcification (ARM IHI 0014Q)
  53. * table 7-12 Encoding of Exception[3:0] for non-ARMv7-M processors.
  54. */
  55. enum {
  56. CS_ETMV3_EXC_NONE = 0,
  57. CS_ETMV3_EXC_DEBUG_HALT = 1,
  58. CS_ETMV3_EXC_SMC = 2,
  59. CS_ETMV3_EXC_HYP = 3,
  60. CS_ETMV3_EXC_ASYNC_DATA_ABORT = 4,
  61. CS_ETMV3_EXC_JAZELLE_THUMBEE = 5,
  62. CS_ETMV3_EXC_PE_RESET = 8,
  63. CS_ETMV3_EXC_UNDEFINED_INSTR = 9,
  64. CS_ETMV3_EXC_SVC = 10,
  65. CS_ETMV3_EXC_PREFETCH_ABORT = 11,
  66. CS_ETMV3_EXC_DATA_FAULT = 12,
  67. CS_ETMV3_EXC_GENERIC = 13,
  68. CS_ETMV3_EXC_IRQ = 14,
  69. CS_ETMV3_EXC_FIQ = 15,
  70. };
  71. /*
  72. * ETMv4 exception encoding number:
  73. * See ARM Embedded Trace Macrocell Architecture Specification (ARM IHI 0064D)
  74. * table 6-12 Possible values for the TYPE field in an Exception instruction
  75. * trace packet, for ARMv7-A/R and ARMv8-A/R PEs.
  76. */
  77. enum {
  78. CS_ETMV4_EXC_RESET = 0,
  79. CS_ETMV4_EXC_DEBUG_HALT = 1,
  80. CS_ETMV4_EXC_CALL = 2,
  81. CS_ETMV4_EXC_TRAP = 3,
  82. CS_ETMV4_EXC_SYSTEM_ERROR = 4,
  83. CS_ETMV4_EXC_INST_DEBUG = 6,
  84. CS_ETMV4_EXC_DATA_DEBUG = 7,
  85. CS_ETMV4_EXC_ALIGNMENT = 10,
  86. CS_ETMV4_EXC_INST_FAULT = 11,
  87. CS_ETMV4_EXC_DATA_FAULT = 12,
  88. CS_ETMV4_EXC_IRQ = 14,
  89. CS_ETMV4_EXC_FIQ = 15,
  90. CS_ETMV4_EXC_END = 31,
  91. };
  92. enum cs_etm_sample_type {
  93. CS_ETM_EMPTY,
  94. CS_ETM_RANGE,
  95. CS_ETM_DISCONTINUITY,
  96. CS_ETM_EXCEPTION,
  97. CS_ETM_EXCEPTION_RET,
  98. };
  99. enum cs_etm_isa {
  100. CS_ETM_ISA_UNKNOWN,
  101. CS_ETM_ISA_A64,
  102. CS_ETM_ISA_A32,
  103. CS_ETM_ISA_T32,
  104. };
  105. struct cs_etm_queue;
  106. struct cs_etm_packet {
  107. enum cs_etm_sample_type sample_type;
  108. enum cs_etm_isa isa;
  109. u64 start_addr;
  110. u64 end_addr;
  111. u32 instr_count;
  112. u32 last_instr_type;
  113. u32 last_instr_subtype;
  114. u32 flags;
  115. u32 exception_number;
  116. u8 last_instr_cond;
  117. u8 last_instr_taken_branch;
  118. u8 last_instr_size;
  119. u8 trace_chan_id;
  120. int cpu;
  121. };
  122. #define CS_ETM_PACKET_MAX_BUFFER 1024
  123. /*
  124. * When working with per-thread scenarios the process under trace can
  125. * be scheduled on any CPU and as such, more than one traceID may be
  126. * associated with the same process. Since a traceID of '0' is illegal
  127. * as per the CoreSight architecture, use that specific value to
  128. * identify the queue where all packets (with any traceID) are
  129. * aggregated.
  130. */
  131. #define CS_ETM_PER_THREAD_TRACEID 0
  132. struct cs_etm_packet_queue {
  133. u32 packet_count;
  134. u32 head;
  135. u32 tail;
  136. u32 instr_count;
  137. u64 timestamp;
  138. u64 next_timestamp;
  139. struct cs_etm_packet packet_buffer[CS_ETM_PACKET_MAX_BUFFER];
  140. };
  141. #define KiB(x) ((x) * 1024)
  142. #define MiB(x) ((x) * 1024 * 1024)
  143. #define CS_ETM_INVAL_ADDR 0xdeadbeefdeadbeefUL
  144. #define BMVAL(val, lsb, msb) ((val & GENMASK(msb, lsb)) >> lsb)
  145. #define CS_ETM_HEADER_SIZE (CS_HEADER_VERSION_0_MAX * sizeof(u64))
  146. #define __perf_cs_etmv3_magic 0x3030303030303030ULL
  147. #define __perf_cs_etmv4_magic 0x4040404040404040ULL
  148. #define CS_ETMV3_PRIV_SIZE (CS_ETM_PRIV_MAX * sizeof(u64))
  149. #define CS_ETMV4_PRIV_SIZE (CS_ETMV4_PRIV_MAX * sizeof(u64))
  150. #ifdef HAVE_CSTRACE_SUPPORT
  151. int cs_etm__process_auxtrace_info(union perf_event *event,
  152. struct perf_session *session);
  153. int cs_etm__get_cpu(u8 trace_chan_id, int *cpu);
  154. int cs_etm__etmq_set_tid(struct cs_etm_queue *etmq,
  155. pid_t tid, u8 trace_chan_id);
  156. bool cs_etm__etmq_is_timeless(struct cs_etm_queue *etmq);
  157. void cs_etm__etmq_set_traceid_queue_timestamp(struct cs_etm_queue *etmq,
  158. u8 trace_chan_id);
  159. struct cs_etm_packet_queue
  160. *cs_etm__etmq_get_packet_queue(struct cs_etm_queue *etmq, u8 trace_chan_id);
  161. #else
  162. static inline int
  163. cs_etm__process_auxtrace_info(union perf_event *event __maybe_unused,
  164. struct perf_session *session __maybe_unused)
  165. {
  166. return -1;
  167. }
  168. static inline int cs_etm__get_cpu(u8 trace_chan_id __maybe_unused,
  169. int *cpu __maybe_unused)
  170. {
  171. return -1;
  172. }
  173. static inline int cs_etm__etmq_set_tid(
  174. struct cs_etm_queue *etmq __maybe_unused,
  175. pid_t tid __maybe_unused,
  176. u8 trace_chan_id __maybe_unused)
  177. {
  178. return -1;
  179. }
  180. static inline bool cs_etm__etmq_is_timeless(
  181. struct cs_etm_queue *etmq __maybe_unused)
  182. {
  183. /* What else to return? */
  184. return true;
  185. }
  186. static inline void cs_etm__etmq_set_traceid_queue_timestamp(
  187. struct cs_etm_queue *etmq __maybe_unused,
  188. u8 trace_chan_id __maybe_unused) {}
  189. static inline struct cs_etm_packet_queue *cs_etm__etmq_get_packet_queue(
  190. struct cs_etm_queue *etmq __maybe_unused,
  191. u8 trace_chan_id __maybe_unused)
  192. {
  193. return NULL;
  194. }
  195. #endif
  196. #endif