perf-intel-pt.txt 42 KB

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  1. perf-intel-pt(1)
  2. ================
  3. NAME
  4. ----
  5. perf-intel-pt - Support for Intel Processor Trace within perf tools
  6. SYNOPSIS
  7. --------
  8. [verse]
  9. 'perf record' -e intel_pt//
  10. DESCRIPTION
  11. -----------
  12. Intel Processor Trace (Intel PT) is an extension of Intel Architecture that
  13. collects information about software execution such as control flow, execution
  14. modes and timings and formats it into highly compressed binary packets.
  15. Technical details are documented in the Intel 64 and IA-32 Architectures
  16. Software Developer Manuals, Chapter 36 Intel Processor Trace.
  17. Intel PT is first supported in Intel Core M and 5th generation Intel Core
  18. processors that are based on the Intel micro-architecture code name Broadwell.
  19. Trace data is collected by 'perf record' and stored within the perf.data file.
  20. See below for options to 'perf record'.
  21. Trace data must be 'decoded' which involves walking the object code and matching
  22. the trace data packets. For example a TNT packet only tells whether a
  23. conditional branch was taken or not taken, so to make use of that packet the
  24. decoder must know precisely which instruction was being executed.
  25. Decoding is done on-the-fly. The decoder outputs samples in the same format as
  26. samples output by perf hardware events, for example as though the "instructions"
  27. or "branches" events had been recorded. Presently 3 tools support this:
  28. 'perf script', 'perf report' and 'perf inject'. See below for more information
  29. on using those tools.
  30. The main distinguishing feature of Intel PT is that the decoder can determine
  31. the exact flow of software execution. Intel PT can be used to understand why
  32. and how did software get to a certain point, or behave a certain way. The
  33. software does not have to be recompiled, so Intel PT works with debug or release
  34. builds, however the executed images are needed - which makes use in JIT-compiled
  35. environments, or with self-modified code, a challenge. Also symbols need to be
  36. provided to make sense of addresses.
  37. A limitation of Intel PT is that it produces huge amounts of trace data
  38. (hundreds of megabytes per second per core) which takes a long time to decode,
  39. for example two or three orders of magnitude longer than it took to collect.
  40. Another limitation is the performance impact of tracing, something that will
  41. vary depending on the use-case and architecture.
  42. Quickstart
  43. ----------
  44. It is important to start small. That is because it is easy to capture vastly
  45. more data than can possibly be processed.
  46. The simplest thing to do with Intel PT is userspace profiling of small programs.
  47. Data is captured with 'perf record' e.g. to trace 'ls' userspace-only:
  48. perf record -e intel_pt//u ls
  49. And profiled with 'perf report' e.g.
  50. perf report
  51. To also trace kernel space presents a problem, namely kernel self-modifying
  52. code. A fairly good kernel image is available in /proc/kcore but to get an
  53. accurate image a copy of /proc/kcore needs to be made under the same conditions
  54. as the data capture. 'perf record' can make a copy of /proc/kcore if the option
  55. --kcore is used, but access to /proc/kcore is restricted e.g.
  56. sudo perf record -o pt_ls --kcore -e intel_pt// -- ls
  57. which will create a directory named 'pt_ls' and put the perf.data file (named
  58. simply 'data') and copies of /proc/kcore, /proc/kallsyms and /proc/modules into
  59. it. The other tools understand the directory format, so to use 'perf report'
  60. becomes:
  61. sudo perf report -i pt_ls
  62. Because samples are synthesized after-the-fact, the sampling period can be
  63. selected for reporting. e.g. sample every microsecond
  64. sudo perf report pt_ls --itrace=i1usge
  65. See the sections below for more information about the --itrace option.
  66. Beware the smaller the period, the more samples that are produced, and the
  67. longer it takes to process them.
  68. Also note that the coarseness of Intel PT timing information will start to
  69. distort the statistical value of the sampling as the sampling period becomes
  70. smaller.
  71. To represent software control flow, "branches" samples are produced. By default
  72. a branch sample is synthesized for every single branch. To get an idea what
  73. data is available you can use the 'perf script' tool with all itrace sampling
  74. options, which will list all the samples.
  75. perf record -e intel_pt//u ls
  76. perf script --itrace=ibxwpe
  77. An interesting field that is not printed by default is 'flags' which can be
  78. displayed as follows:
  79. perf script --itrace=ibxwpe -F+flags
  80. The flags are "bcrosyiABEx" which stand for branch, call, return, conditional,
  81. system, asynchronous, interrupt, transaction abort, trace begin, trace end, and
  82. in transaction, respectively.
  83. perf script also supports higher level ways to dump instruction traces:
  84. perf script --insn-trace --xed
  85. Dump all instructions. This requires installing the xed tool (see XED below)
  86. Dumping all instructions in a long trace can be fairly slow. It is usually better
  87. to start with higher level decoding, like
  88. perf script --call-trace
  89. or
  90. perf script --call-ret-trace
  91. and then select a time range of interest. The time range can then be examined
  92. in detail with
  93. perf script --time starttime,stoptime --insn-trace --xed
  94. While examining the trace it's also useful to filter on specific CPUs using
  95. the -C option
  96. perf script --time starttime,stoptime --insn-trace --xed -C 1
  97. Dump all instructions in time range on CPU 1.
  98. Another interesting field that is not printed by default is 'ipc' which can be
  99. displayed as follows:
  100. perf script --itrace=be -F+ipc
  101. There are two ways that instructions-per-cycle (IPC) can be calculated depending
  102. on the recording.
  103. If the 'cyc' config term (see config terms section below) was used, then IPC is
  104. calculated using the cycle count from CYC packets, otherwise MTC packets are
  105. used - refer to the 'mtc' config term. When MTC is used, however, the values
  106. are less accurate because the timing is less accurate.
  107. Because Intel PT does not update the cycle count on every branch or instruction,
  108. the values will often be zero. When there are values, they will be the number
  109. of instructions and number of cycles since the last update, and thus represent
  110. the average IPC since the last IPC for that event type. Note IPC for "branches"
  111. events is calculated separately from IPC for "instructions" events.
  112. Also note that the IPC instruction count may or may not include the current
  113. instruction. If the cycle count is associated with an asynchronous branch
  114. (e.g. page fault or interrupt), then the instruction count does not include the
  115. current instruction, otherwise it does. That is consistent with whether or not
  116. that instruction has retired when the cycle count is updated.
  117. Another note, in the case of "branches" events, non-taken branches are not
  118. presently sampled, so IPC values for them do not appear e.g. a CYC packet with a
  119. TNT packet that starts with a non-taken branch. To see every possible IPC
  120. value, "instructions" events can be used e.g. --itrace=i0ns
  121. While it is possible to create scripts to analyze the data, an alternative
  122. approach is available to export the data to a sqlite or postgresql database.
  123. Refer to script export-to-sqlite.py or export-to-postgresql.py for more details,
  124. and to script exported-sql-viewer.py for an example of using the database.
  125. There is also script intel-pt-events.py which provides an example of how to
  126. unpack the raw data for power events and PTWRITE.
  127. As mentioned above, it is easy to capture too much data. One way to limit the
  128. data captured is to use 'snapshot' mode which is explained further below.
  129. Refer to 'new snapshot option' and 'Intel PT modes of operation' further below.
  130. Another problem that will be experienced is decoder errors. They can be caused
  131. by inability to access the executed image, self-modified or JIT-ed code, or the
  132. inability to match side-band information (such as context switches and mmaps)
  133. which results in the decoder not knowing what code was executed.
  134. There is also the problem of perf not being able to copy the data fast enough,
  135. resulting in data lost because the buffer was full. See 'Buffer handling' below
  136. for more details.
  137. perf record
  138. -----------
  139. new event
  140. ~~~~~~~~~
  141. The Intel PT kernel driver creates a new PMU for Intel PT. PMU events are
  142. selected by providing the PMU name followed by the "config" separated by slashes.
  143. An enhancement has been made to allow default "config" e.g. the option
  144. -e intel_pt//
  145. will use a default config value. Currently that is the same as
  146. -e intel_pt/tsc,noretcomp=0/
  147. which is the same as
  148. -e intel_pt/tsc=1,noretcomp=0/
  149. Note there are now new config terms - see section 'config terms' further below.
  150. The config terms are listed in /sys/devices/intel_pt/format. They are bit
  151. fields within the config member of the struct perf_event_attr which is
  152. passed to the kernel by the perf_event_open system call. They correspond to bit
  153. fields in the IA32_RTIT_CTL MSR. Here is a list of them and their definitions:
  154. $ grep -H . /sys/bus/event_source/devices/intel_pt/format/*
  155. /sys/bus/event_source/devices/intel_pt/format/cyc:config:1
  156. /sys/bus/event_source/devices/intel_pt/format/cyc_thresh:config:19-22
  157. /sys/bus/event_source/devices/intel_pt/format/mtc:config:9
  158. /sys/bus/event_source/devices/intel_pt/format/mtc_period:config:14-17
  159. /sys/bus/event_source/devices/intel_pt/format/noretcomp:config:11
  160. /sys/bus/event_source/devices/intel_pt/format/psb_period:config:24-27
  161. /sys/bus/event_source/devices/intel_pt/format/tsc:config:10
  162. Note that the default config must be overridden for each term i.e.
  163. -e intel_pt/noretcomp=0/
  164. is the same as:
  165. -e intel_pt/tsc=1,noretcomp=0/
  166. So, to disable TSC packets use:
  167. -e intel_pt/tsc=0/
  168. It is also possible to specify the config value explicitly:
  169. -e intel_pt/config=0x400/
  170. Note that, as with all events, the event is suffixed with event modifiers:
  171. u userspace
  172. k kernel
  173. h hypervisor
  174. G guest
  175. H host
  176. p precise ip
  177. 'h', 'G' and 'H' are for virtualization which is not supported by Intel PT.
  178. 'p' is also not relevant to Intel PT. So only options 'u' and 'k' are
  179. meaningful for Intel PT.
  180. perf_event_attr is displayed if the -vv option is used e.g.
  181. ------------------------------------------------------------
  182. perf_event_attr:
  183. type 6
  184. size 112
  185. config 0x400
  186. { sample_period, sample_freq } 1
  187. sample_type IP|TID|TIME|CPU|IDENTIFIER
  188. read_format ID
  189. disabled 1
  190. inherit 1
  191. exclude_kernel 1
  192. exclude_hv 1
  193. enable_on_exec 1
  194. sample_id_all 1
  195. ------------------------------------------------------------
  196. sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8
  197. sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8
  198. sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8
  199. sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8
  200. ------------------------------------------------------------
  201. config terms
  202. ~~~~~~~~~~~~
  203. The June 2015 version of Intel 64 and IA-32 Architectures Software Developer
  204. Manuals, Chapter 36 Intel Processor Trace, defined new Intel PT features.
  205. Some of the features are reflect in new config terms. All the config terms are
  206. described below.
  207. tsc Always supported. Produces TSC timestamp packets to provide
  208. timing information. In some cases it is possible to decode
  209. without timing information, for example a per-thread context
  210. that does not overlap executable memory maps.
  211. The default config selects tsc (i.e. tsc=1).
  212. noretcomp Always supported. Disables "return compression" so a TIP packet
  213. is produced when a function returns. Causes more packets to be
  214. produced but might make decoding more reliable.
  215. The default config does not select noretcomp (i.e. noretcomp=0).
  216. psb_period Allows the frequency of PSB packets to be specified.
  217. The PSB packet is a synchronization packet that provides a
  218. starting point for decoding or recovery from errors.
  219. Support for psb_period is indicated by:
  220. /sys/bus/event_source/devices/intel_pt/caps/psb_cyc
  221. which contains "1" if the feature is supported and "0"
  222. otherwise.
  223. Valid values are given by:
  224. /sys/bus/event_source/devices/intel_pt/caps/psb_periods
  225. which contains a hexadecimal value, the bits of which represent
  226. valid values e.g. bit 2 set means value 2 is valid.
  227. The psb_period value is converted to the approximate number of
  228. trace bytes between PSB packets as:
  229. 2 ^ (value + 11)
  230. e.g. value 3 means 16KiB bytes between PSBs
  231. If an invalid value is entered, the error message
  232. will give a list of valid values e.g.
  233. $ perf record -e intel_pt/psb_period=15/u uname
  234. Invalid psb_period for intel_pt. Valid values are: 0-5
  235. If MTC packets are selected, the default config selects a value
  236. of 3 (i.e. psb_period=3) or the nearest lower value that is
  237. supported (0 is always supported). Otherwise the default is 0.
  238. If decoding is expected to be reliable and the buffer is large
  239. then a large PSB period can be used.
  240. Because a TSC packet is produced with PSB, the PSB period can
  241. also affect the granularity to timing information in the absence
  242. of MTC or CYC.
  243. mtc Produces MTC timing packets.
  244. MTC packets provide finer grain timestamp information than TSC
  245. packets. MTC packets record time using the hardware crystal
  246. clock (CTC) which is related to TSC packets using a TMA packet.
  247. Support for this feature is indicated by:
  248. /sys/bus/event_source/devices/intel_pt/caps/mtc
  249. which contains "1" if the feature is supported and
  250. "0" otherwise.
  251. The frequency of MTC packets can also be specified - see
  252. mtc_period below.
  253. mtc_period Specifies how frequently MTC packets are produced - see mtc
  254. above for how to determine if MTC packets are supported.
  255. Valid values are given by:
  256. /sys/bus/event_source/devices/intel_pt/caps/mtc_periods
  257. which contains a hexadecimal value, the bits of which represent
  258. valid values e.g. bit 2 set means value 2 is valid.
  259. The mtc_period value is converted to the MTC frequency as:
  260. CTC-frequency / (2 ^ value)
  261. e.g. value 3 means one eighth of CTC-frequency
  262. Where CTC is the hardware crystal clock, the frequency of which
  263. can be related to TSC via values provided in cpuid leaf 0x15.
  264. If an invalid value is entered, the error message
  265. will give a list of valid values e.g.
  266. $ perf record -e intel_pt/mtc_period=15/u uname
  267. Invalid mtc_period for intel_pt. Valid values are: 0,3,6,9
  268. The default value is 3 or the nearest lower value
  269. that is supported (0 is always supported).
  270. cyc Produces CYC timing packets.
  271. CYC packets provide even finer grain timestamp information than
  272. MTC and TSC packets. A CYC packet contains the number of CPU
  273. cycles since the last CYC packet. Unlike MTC and TSC packets,
  274. CYC packets are only sent when another packet is also sent.
  275. Support for this feature is indicated by:
  276. /sys/bus/event_source/devices/intel_pt/caps/psb_cyc
  277. which contains "1" if the feature is supported and
  278. "0" otherwise.
  279. The number of CYC packets produced can be reduced by specifying
  280. a threshold - see cyc_thresh below.
  281. cyc_thresh Specifies how frequently CYC packets are produced - see cyc
  282. above for how to determine if CYC packets are supported.
  283. Valid cyc_thresh values are given by:
  284. /sys/bus/event_source/devices/intel_pt/caps/cycle_thresholds
  285. which contains a hexadecimal value, the bits of which represent
  286. valid values e.g. bit 2 set means value 2 is valid.
  287. The cyc_thresh value represents the minimum number of CPU cycles
  288. that must have passed before a CYC packet can be sent. The
  289. number of CPU cycles is:
  290. 2 ^ (value - 1)
  291. e.g. value 4 means 8 CPU cycles must pass before a CYC packet
  292. can be sent. Note a CYC packet is still only sent when another
  293. packet is sent, not at, e.g. every 8 CPU cycles.
  294. If an invalid value is entered, the error message
  295. will give a list of valid values e.g.
  296. $ perf record -e intel_pt/cyc,cyc_thresh=15/u uname
  297. Invalid cyc_thresh for intel_pt. Valid values are: 0-12
  298. CYC packets are not requested by default.
  299. pt Specifies pass-through which enables the 'branch' config term.
  300. The default config selects 'pt' if it is available, so a user will
  301. never need to specify this term.
  302. branch Enable branch tracing. Branch tracing is enabled by default so to
  303. disable branch tracing use 'branch=0'.
  304. The default config selects 'branch' if it is available.
  305. ptw Enable PTWRITE packets which are produced when a ptwrite instruction
  306. is executed.
  307. Support for this feature is indicated by:
  308. /sys/bus/event_source/devices/intel_pt/caps/ptwrite
  309. which contains "1" if the feature is supported and
  310. "0" otherwise.
  311. fup_on_ptw Enable a FUP packet to follow the PTWRITE packet. The FUP packet
  312. provides the address of the ptwrite instruction. In the absence of
  313. fup_on_ptw, the decoder will use the address of the previous branch
  314. if branch tracing is enabled, otherwise the address will be zero.
  315. Note that fup_on_ptw will work even when branch tracing is disabled.
  316. pwr_evt Enable power events. The power events provide information about
  317. changes to the CPU C-state.
  318. Support for this feature is indicated by:
  319. /sys/bus/event_source/devices/intel_pt/caps/power_event_trace
  320. which contains "1" if the feature is supported and
  321. "0" otherwise.
  322. AUX area sampling option
  323. ~~~~~~~~~~~~~~~~~~~~~~~~
  324. To select Intel PT "sampling" the AUX area sampling option can be used:
  325. --aux-sample
  326. Optionally it can be followed by the sample size in bytes e.g.
  327. --aux-sample=8192
  328. In addition, the Intel PT event to sample must be defined e.g.
  329. -e intel_pt//u
  330. Samples on other events will be created containing Intel PT data e.g. the
  331. following will create Intel PT samples on the branch-misses event, note the
  332. events must be grouped using {}:
  333. perf record --aux-sample -e '{intel_pt//u,branch-misses:u}'
  334. An alternative to '--aux-sample' is to add the config term 'aux-sample-size' to
  335. events. In this case, the grouping is implied e.g.
  336. perf record -e intel_pt//u -e branch-misses/aux-sample-size=8192/u
  337. is the same as:
  338. perf record -e '{intel_pt//u,branch-misses/aux-sample-size=8192/u}'
  339. but allows for also using an address filter e.g.:
  340. perf record -e intel_pt//u --filter 'filter * @/bin/ls' -e branch-misses/aux-sample-size=8192/u -- ls
  341. It is important to select a sample size that is big enough to contain at least
  342. one PSB packet. If not a warning will be displayed:
  343. Intel PT sample size (%zu) may be too small for PSB period (%zu)
  344. The calculation used for that is: if sample_size <= psb_period + 256 display the
  345. warning. When sampling is used, psb_period defaults to 0 (2KiB).
  346. The default sample size is 4KiB.
  347. The sample size is passed in aux_sample_size in struct perf_event_attr. The
  348. sample size is limited by the maximum event size which is 64KiB. It is
  349. difficult to know how big the event might be without the trace sample attached,
  350. but the tool validates that the sample size is not greater than 60KiB.
  351. new snapshot option
  352. ~~~~~~~~~~~~~~~~~~~
  353. The difference between full trace and snapshot from the kernel's perspective is
  354. that in full trace we don't overwrite trace data that the user hasn't collected
  355. yet (and indicated that by advancing aux_tail), whereas in snapshot mode we let
  356. the trace run and overwrite older data in the buffer so that whenever something
  357. interesting happens, we can stop it and grab a snapshot of what was going on
  358. around that interesting moment.
  359. To select snapshot mode a new option has been added:
  360. -S
  361. Optionally it can be followed by the snapshot size e.g.
  362. -S0x100000
  363. The default snapshot size is the auxtrace mmap size. If neither auxtrace mmap size
  364. nor snapshot size is specified, then the default is 4MiB for privileged users
  365. (or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users.
  366. If an unprivileged user does not specify mmap pages, the mmap pages will be
  367. reduced as described in the 'new auxtrace mmap size option' section below.
  368. The snapshot size is displayed if the option -vv is used e.g.
  369. Intel PT snapshot size: %zu
  370. new auxtrace mmap size option
  371. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  372. Intel PT buffer size is specified by an addition to the -m option e.g.
  373. -m,16
  374. selects a buffer size of 16 pages i.e. 64KiB.
  375. Note that the existing functionality of -m is unchanged. The auxtrace mmap size
  376. is specified by the optional addition of a comma and the value.
  377. The default auxtrace mmap size for Intel PT is 4MiB/page_size for privileged users
  378. (or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users.
  379. If an unprivileged user does not specify mmap pages, the mmap pages will be
  380. reduced from the default 512KiB/page_size to 256KiB/page_size, otherwise the
  381. user is likely to get an error as they exceed their mlock limit (Max locked
  382. memory as shown in /proc/self/limits). Note that perf does not count the first
  383. 512KiB (actually /proc/sys/kernel/perf_event_mlock_kb minus 1 page) per cpu
  384. against the mlock limit so an unprivileged user is allowed 512KiB per cpu plus
  385. their mlock limit (which defaults to 64KiB but is not multiplied by the number
  386. of cpus).
  387. In full-trace mode, powers of two are allowed for buffer size, with a minimum
  388. size of 2 pages. In snapshot mode or sampling mode, it is the same but the
  389. minimum size is 1 page.
  390. The mmap size and auxtrace mmap size are displayed if the -vv option is used e.g.
  391. mmap length 528384
  392. auxtrace mmap length 4198400
  393. Intel PT modes of operation
  394. ~~~~~~~~~~~~~~~~~~~~~~~~~~~
  395. Intel PT can be used in 3 modes:
  396. full-trace mode
  397. sample mode
  398. snapshot mode
  399. Full-trace mode traces continuously e.g.
  400. perf record -e intel_pt//u uname
  401. Sample mode attaches a Intel PT sample to other events e.g.
  402. perf record --aux-sample -e intel_pt//u -e branch-misses:u
  403. Snapshot mode captures the available data when a signal is sent or "snapshot"
  404. control command is issued. e.g. using a signal
  405. perf record -v -e intel_pt//u -S ./loopy 1000000000 &
  406. [1] 11435
  407. kill -USR2 11435
  408. Recording AUX area tracing snapshot
  409. Note that the signal sent is SIGUSR2.
  410. Note that "Recording AUX area tracing snapshot" is displayed because the -v
  411. option is used.
  412. The advantage of using "snapshot" control command is that the access is
  413. controlled by access to a FIFO e.g.
  414. $ mkfifo perf.control
  415. $ mkfifo perf.ack
  416. $ cat perf.ack &
  417. [1] 15235
  418. $ sudo ~/bin/perf record --control fifo:perf.control,perf.ack -S -e intel_pt//u -- sleep 60 &
  419. [2] 15243
  420. $ ps -e | grep perf
  421. 15244 pts/1 00:00:00 perf
  422. $ kill -USR2 15244
  423. bash: kill: (15244) - Operation not permitted
  424. $ echo snapshot > perf.control
  425. ack
  426. The 3 Intel PT modes of operation cannot be used together.
  427. Buffer handling
  428. ~~~~~~~~~~~~~~~
  429. There may be buffer limitations (i.e. single ToPa entry) which means that actual
  430. buffer sizes are limited to powers of 2 up to 4MiB (MAX_ORDER). In order to
  431. provide other sizes, and in particular an arbitrarily large size, multiple
  432. buffers are logically concatenated. However an interrupt must be used to switch
  433. between buffers. That has two potential problems:
  434. a) the interrupt may not be handled in time so that the current buffer
  435. becomes full and some trace data is lost.
  436. b) the interrupts may slow the system and affect the performance
  437. results.
  438. If trace data is lost, the driver sets 'truncated' in the PERF_RECORD_AUX event
  439. which the tools report as an error.
  440. In full-trace mode, the driver waits for data to be copied out before allowing
  441. the (logical) buffer to wrap-around. If data is not copied out quickly enough,
  442. again 'truncated' is set in the PERF_RECORD_AUX event. If the driver has to
  443. wait, the intel_pt event gets disabled. Because it is difficult to know when
  444. that happens, perf tools always re-enable the intel_pt event after copying out
  445. data.
  446. Intel PT and build ids
  447. ~~~~~~~~~~~~~~~~~~~~~~
  448. By default "perf record" post-processes the event stream to find all build ids
  449. for executables for all addresses sampled. Deliberately, Intel PT is not
  450. decoded for that purpose (it would take too long). Instead the build ids for
  451. all executables encountered (due to mmap, comm or task events) are included
  452. in the perf.data file.
  453. To see buildids included in the perf.data file use the command:
  454. perf buildid-list
  455. If the perf.data file contains Intel PT data, that is the same as:
  456. perf buildid-list --with-hits
  457. Snapshot mode and event disabling
  458. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  459. In order to make a snapshot, the intel_pt event is disabled using an IOCTL,
  460. namely PERF_EVENT_IOC_DISABLE. However doing that can also disable the
  461. collection of side-band information. In order to prevent that, a dummy
  462. software event has been introduced that permits tracking events (like mmaps) to
  463. continue to be recorded while intel_pt is disabled. That is important to ensure
  464. there is complete side-band information to allow the decoding of subsequent
  465. snapshots.
  466. A test has been created for that. To find the test:
  467. perf test list
  468. ...
  469. 23: Test using a dummy software event to keep tracking
  470. To run the test:
  471. perf test 23
  472. 23: Test using a dummy software event to keep tracking : Ok
  473. perf record modes (nothing new here)
  474. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  475. perf record essentially operates in one of three modes:
  476. per thread
  477. per cpu
  478. workload only
  479. "per thread" mode is selected by -t or by --per-thread (with -p or -u or just a
  480. workload).
  481. "per cpu" is selected by -C or -a.
  482. "workload only" mode is selected by not using the other options but providing a
  483. command to run (i.e. the workload).
  484. In per-thread mode an exact list of threads is traced. There is no inheritance.
  485. Each thread has its own event buffer.
  486. In per-cpu mode all processes (or processes from the selected cgroup i.e. -G
  487. option, or processes selected with -p or -u) are traced. Each cpu has its own
  488. buffer. Inheritance is allowed.
  489. In workload-only mode, the workload is traced but with per-cpu buffers.
  490. Inheritance is allowed. Note that you can now trace a workload in per-thread
  491. mode by using the --per-thread option.
  492. Privileged vs non-privileged users
  493. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  494. Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users
  495. have memory limits imposed upon them. That affects what buffer sizes they can
  496. have as outlined above.
  497. The v4.2 kernel introduced support for a context switch metadata event,
  498. PERF_RECORD_SWITCH, which allows unprivileged users to see when their processes
  499. are scheduled out and in, just not by whom, which is left for the
  500. PERF_RECORD_SWITCH_CPU_WIDE, that is only accessible in system wide context,
  501. which in turn requires CAP_PERFMON or CAP_SYS_ADMIN.
  502. Please see the 45ac1403f564 ("perf: Add PERF_RECORD_SWITCH to indicate context
  503. switches") commit, that introduces these metadata events for further info.
  504. When working with kernels < v4.2, the following considerations must be taken,
  505. as the sched:sched_switch tracepoints will be used to receive such information:
  506. Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users are
  507. not permitted to use tracepoints which means there is insufficient side-band
  508. information to decode Intel PT in per-cpu mode, and potentially workload-only
  509. mode too if the workload creates new processes.
  510. Note also, that to use tracepoints, read-access to debugfs is required. So if
  511. debugfs is not mounted or the user does not have read-access, it will again not
  512. be possible to decode Intel PT in per-cpu mode.
  513. sched_switch tracepoint
  514. ~~~~~~~~~~~~~~~~~~~~~~~
  515. The sched_switch tracepoint is used to provide side-band data for Intel PT
  516. decoding in kernels where the PERF_RECORD_SWITCH metadata event isn't
  517. available.
  518. The sched_switch events are automatically added. e.g. the second event shown
  519. below:
  520. $ perf record -vv -e intel_pt//u uname
  521. ------------------------------------------------------------
  522. perf_event_attr:
  523. type 6
  524. size 112
  525. config 0x400
  526. { sample_period, sample_freq } 1
  527. sample_type IP|TID|TIME|CPU|IDENTIFIER
  528. read_format ID
  529. disabled 1
  530. inherit 1
  531. exclude_kernel 1
  532. exclude_hv 1
  533. enable_on_exec 1
  534. sample_id_all 1
  535. ------------------------------------------------------------
  536. sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8
  537. sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8
  538. sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8
  539. sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8
  540. ------------------------------------------------------------
  541. perf_event_attr:
  542. type 2
  543. size 112
  544. config 0x108
  545. { sample_period, sample_freq } 1
  546. sample_type IP|TID|TIME|CPU|PERIOD|RAW|IDENTIFIER
  547. read_format ID
  548. inherit 1
  549. sample_id_all 1
  550. exclude_guest 1
  551. ------------------------------------------------------------
  552. sys_perf_event_open: pid -1 cpu 0 group_fd -1 flags 0x8
  553. sys_perf_event_open: pid -1 cpu 1 group_fd -1 flags 0x8
  554. sys_perf_event_open: pid -1 cpu 2 group_fd -1 flags 0x8
  555. sys_perf_event_open: pid -1 cpu 3 group_fd -1 flags 0x8
  556. ------------------------------------------------------------
  557. perf_event_attr:
  558. type 1
  559. size 112
  560. config 0x9
  561. { sample_period, sample_freq } 1
  562. sample_type IP|TID|TIME|IDENTIFIER
  563. read_format ID
  564. disabled 1
  565. inherit 1
  566. exclude_kernel 1
  567. exclude_hv 1
  568. mmap 1
  569. comm 1
  570. enable_on_exec 1
  571. task 1
  572. sample_id_all 1
  573. mmap2 1
  574. comm_exec 1
  575. ------------------------------------------------------------
  576. sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8
  577. sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8
  578. sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8
  579. sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8
  580. mmap size 528384B
  581. AUX area mmap length 4194304
  582. perf event ring buffer mmapped per cpu
  583. Synthesizing auxtrace information
  584. Linux
  585. [ perf record: Woken up 1 times to write data ]
  586. [ perf record: Captured and wrote 0.042 MB perf.data ]
  587. Note, the sched_switch event is only added if the user is permitted to use it
  588. and only in per-cpu mode.
  589. Note also, the sched_switch event is only added if TSC packets are requested.
  590. That is because, in the absence of timing information, the sched_switch events
  591. cannot be matched against the Intel PT trace.
  592. perf script
  593. -----------
  594. By default, perf script will decode trace data found in the perf.data file.
  595. This can be further controlled by new option --itrace.
  596. New --itrace option
  597. ~~~~~~~~~~~~~~~~~~~
  598. Having no option is the same as
  599. --itrace
  600. which, in turn, is the same as
  601. --itrace=cepwx
  602. The letters are:
  603. i synthesize "instructions" events
  604. b synthesize "branches" events
  605. x synthesize "transactions" events
  606. w synthesize "ptwrite" events
  607. p synthesize "power" events
  608. c synthesize branches events (calls only)
  609. r synthesize branches events (returns only)
  610. e synthesize tracing error events
  611. d create a debug log
  612. g synthesize a call chain (use with i or x)
  613. G synthesize a call chain on existing event records
  614. l synthesize last branch entries (use with i or x)
  615. L synthesize last branch entries on existing event records
  616. s skip initial number of events
  617. q quicker (less detailed) decoding
  618. "Instructions" events look like they were recorded by "perf record -e
  619. instructions".
  620. "Branches" events look like they were recorded by "perf record -e branches". "c"
  621. and "r" can be combined to get calls and returns.
  622. "Transactions" events correspond to the start or end of transactions. The
  623. 'flags' field can be used in perf script to determine whether the event is a
  624. tranasaction start, commit or abort.
  625. Note that "instructions", "branches" and "transactions" events depend on code
  626. flow packets which can be disabled by using the config term "branch=0". Refer
  627. to the config terms section above.
  628. "ptwrite" events record the payload of the ptwrite instruction and whether
  629. "fup_on_ptw" was used. "ptwrite" events depend on PTWRITE packets which are
  630. recorded only if the "ptw" config term was used. Refer to the config terms
  631. section above. perf script "synth" field displays "ptwrite" information like
  632. this: "ip: 0 payload: 0x123456789abcdef0" where "ip" is 1 if "fup_on_ptw" was
  633. used.
  634. "Power" events correspond to power event packets and CBR (core-to-bus ratio)
  635. packets. While CBR packets are always recorded when tracing is enabled, power
  636. event packets are recorded only if the "pwr_evt" config term was used. Refer to
  637. the config terms section above. The power events record information about
  638. C-state changes, whereas CBR is indicative of CPU frequency. perf script
  639. "event,synth" fields display information like this:
  640. cbr: cbr: 22 freq: 2189 MHz (200%)
  641. mwait: hints: 0x60 extensions: 0x1
  642. pwre: hw: 0 cstate: 2 sub-cstate: 0
  643. exstop: ip: 1
  644. pwrx: deepest cstate: 2 last cstate: 2 wake reason: 0x4
  645. Where:
  646. "cbr" includes the frequency and the percentage of maximum non-turbo
  647. "mwait" shows mwait hints and extensions
  648. "pwre" shows C-state transitions (to a C-state deeper than C0) and
  649. whether initiated by hardware
  650. "exstop" indicates execution stopped and whether the IP was recorded
  651. exactly,
  652. "pwrx" indicates return to C0
  653. For more details refer to the Intel 64 and IA-32 Architectures Software
  654. Developer Manuals.
  655. Error events show where the decoder lost the trace. Error events
  656. are quite important. Users must know if what they are seeing is a complete
  657. picture or not. The "e" option may be followed by flags which affect what errors
  658. will or will not be reported. Each flag must be preceded by either '+' or '-'.
  659. The flags supported by Intel PT are:
  660. -o Suppress overflow errors
  661. -l Suppress trace data lost errors
  662. For example, for errors but not overflow or data lost errors:
  663. --itrace=e-o-l
  664. The "d" option will cause the creation of a file "intel_pt.log" containing all
  665. decoded packets and instructions. Note that this option slows down the decoder
  666. and that the resulting file may be very large. The "d" option may be followed
  667. by flags which affect what debug messages will or will not be logged. Each flag
  668. must be preceded by either '+' or '-'. The flags support by Intel PT are:
  669. -a Suppress logging of perf events
  670. +a Log all perf events
  671. By default, logged perf events are filtered by any specified time ranges, but
  672. flag +a overrides that.
  673. In addition, the period of the "instructions" event can be specified. e.g.
  674. --itrace=i10us
  675. sets the period to 10us i.e. one instruction sample is synthesized for each 10
  676. microseconds of trace. Alternatives to "us" are "ms" (milliseconds),
  677. "ns" (nanoseconds), "t" (TSC ticks) or "i" (instructions).
  678. "ms", "us" and "ns" are converted to TSC ticks.
  679. The timing information included with Intel PT does not give the time of every
  680. instruction. Consequently, for the purpose of sampling, the decoder estimates
  681. the time since the last timing packet based on 1 tick per instruction. The time
  682. on the sample is *not* adjusted and reflects the last known value of TSC.
  683. For Intel PT, the default period is 100us.
  684. Setting it to a zero period means "as often as possible".
  685. In the case of Intel PT that is the same as a period of 1 and a unit of
  686. 'instructions' (i.e. --itrace=i1i).
  687. Also the call chain size (default 16, max. 1024) for instructions or
  688. transactions events can be specified. e.g.
  689. --itrace=ig32
  690. --itrace=xg32
  691. Also the number of last branch entries (default 64, max. 1024) for instructions or
  692. transactions events can be specified. e.g.
  693. --itrace=il10
  694. --itrace=xl10
  695. Note that last branch entries are cleared for each sample, so there is no overlap
  696. from one sample to the next.
  697. The G and L options are designed in particular for sample mode, and work much
  698. like g and l but add call chain and branch stack to the other selected events
  699. instead of synthesized events. For example, to record branch-misses events for
  700. 'ls' and then add a call chain derived from the Intel PT trace:
  701. perf record --aux-sample -e '{intel_pt//u,branch-misses:u}' -- ls
  702. perf report --itrace=Ge
  703. Although in fact G is a default for perf report, so that is the same as just:
  704. perf report
  705. One caveat with the G and L options is that they work poorly with "Large PEBS".
  706. Large PEBS means PEBS records will be accumulated by hardware and the written
  707. into the event buffer in one go. That reduces interrupts, but can give very
  708. late timestamps. Because the Intel PT trace is synchronized by timestamps,
  709. the PEBS events do not match the trace. Currently, Large PEBS is used only in
  710. certain circumstances:
  711. - hardware supports it
  712. - PEBS is used
  713. - event period is specified, instead of frequency
  714. - the sample type is limited to the following flags:
  715. PERF_SAMPLE_IP | PERF_SAMPLE_TID | PERF_SAMPLE_ADDR |
  716. PERF_SAMPLE_ID | PERF_SAMPLE_CPU | PERF_SAMPLE_STREAM_ID |
  717. PERF_SAMPLE_DATA_SRC | PERF_SAMPLE_IDENTIFIER |
  718. PERF_SAMPLE_TRANSACTION | PERF_SAMPLE_PHYS_ADDR |
  719. PERF_SAMPLE_REGS_INTR | PERF_SAMPLE_REGS_USER |
  720. PERF_SAMPLE_PERIOD (and sometimes) | PERF_SAMPLE_TIME
  721. Because Intel PT sample mode uses a different sample type to the list above,
  722. Large PEBS is not used with Intel PT sample mode. To avoid Large PEBS in other
  723. cases, avoid specifying the event period i.e. avoid the 'perf record' -c option,
  724. --count option, or 'period' config term.
  725. To disable trace decoding entirely, use the option --no-itrace.
  726. It is also possible to skip events generated (instructions, branches, transactions)
  727. at the beginning. This is useful to ignore initialization code.
  728. --itrace=i0nss1000000
  729. skips the first million instructions.
  730. The q option changes the way the trace is decoded. The decoding is much faster
  731. but much less detailed. Specifically, with the q option, the decoder does not
  732. decode TNT packets, and does not walk object code, but gets the ip from FUP and
  733. TIP packets. The q option can be used with the b and i options but the period
  734. is not used. The q option decodes more quickly, but is useful only if the
  735. control flow of interest is represented or indicated by FUP, TIP, TIP.PGE, or
  736. TIP.PGD packets (refer below). However the q option could be used to find time
  737. ranges that could then be decoded fully using the --time option.
  738. What will *not* be decoded with the (single) q option:
  739. - direct calls and jmps
  740. - conditional branches
  741. - non-branch instructions
  742. What *will* be decoded with the (single) q option:
  743. - asynchronous branches such as interrupts
  744. - indirect branches
  745. - function return target address *if* the noretcomp config term (refer
  746. config terms section) was used
  747. - start of (control-flow) tracing
  748. - end of (control-flow) tracing, if it is not out of context
  749. - power events, ptwrite, transaction start and abort
  750. - instruction pointer associated with PSB packets
  751. Note the q option does not specify what events will be synthesized e.g. the p
  752. option must be used also to show power events.
  753. Repeating the q option (double-q i.e. qq) results in even faster decoding and even
  754. less detail. The decoder decodes only extended PSB (PSB+) packets, getting the
  755. instruction pointer if there is a FUP packet within PSB+ (i.e. between PSB and
  756. PSBEND). Note PSB packets occur regularly in the trace based on the psb_period
  757. config term (refer config terms section). There will be a FUP packet if the
  758. PSB+ occurs while control flow is being traced.
  759. What will *not* be decoded with the qq option:
  760. - everything except instruction pointer associated with PSB packets
  761. What *will* be decoded with the qq option:
  762. - instruction pointer associated with PSB packets
  763. dump option
  764. ~~~~~~~~~~~
  765. perf script has an option (-D) to "dump" the events i.e. display the binary
  766. data.
  767. When -D is used, Intel PT packets are displayed. The packet decoder does not
  768. pay attention to PSB packets, but just decodes the bytes - so the packets seen
  769. by the actual decoder may not be identical in places where the data is corrupt.
  770. One example of that would be when the buffer-switching interrupt has been too
  771. slow, and the buffer has been filled completely. In that case, the last packet
  772. in the buffer might be truncated and immediately followed by a PSB as the trace
  773. continues in the next buffer.
  774. To disable the display of Intel PT packets, combine the -D option with
  775. --no-itrace.
  776. perf report
  777. -----------
  778. By default, perf report will decode trace data found in the perf.data file.
  779. This can be further controlled by new option --itrace exactly the same as
  780. perf script, with the exception that the default is --itrace=igxe.
  781. perf inject
  782. -----------
  783. perf inject also accepts the --itrace option in which case tracing data is
  784. removed and replaced with the synthesized events. e.g.
  785. perf inject --itrace -i perf.data -o perf.data.new
  786. Below is an example of using Intel PT with autofdo. It requires autofdo
  787. (https://github.com/google/autofdo) and gcc version 5. The bubble
  788. sort example is from the AutoFDO tutorial (https://gcc.gnu.org/wiki/AutoFDO/Tutorial)
  789. amended to take the number of elements as a parameter.
  790. $ gcc-5 -O3 sort.c -o sort_optimized
  791. $ ./sort_optimized 30000
  792. Bubble sorting array of 30000 elements
  793. 2254 ms
  794. $ cat ~/.perfconfig
  795. [intel-pt]
  796. mispred-all = on
  797. $ perf record -e intel_pt//u ./sort 3000
  798. Bubble sorting array of 3000 elements
  799. 58 ms
  800. [ perf record: Woken up 2 times to write data ]
  801. [ perf record: Captured and wrote 3.939 MB perf.data ]
  802. $ perf inject -i perf.data -o inj --itrace=i100usle --strip
  803. $ ./create_gcov --binary=./sort --profile=inj --gcov=sort.gcov -gcov_version=1
  804. $ gcc-5 -O3 -fauto-profile=sort.gcov sort.c -o sort_autofdo
  805. $ ./sort_autofdo 30000
  806. Bubble sorting array of 30000 elements
  807. 2155 ms
  808. Note there is currently no advantage to using Intel PT instead of LBR, but
  809. that may change in the future if greater use is made of the data.
  810. PEBS via Intel PT
  811. -----------------
  812. Some hardware has the feature to redirect PEBS records to the Intel PT trace.
  813. Recording is selected by using the aux-output config term e.g.
  814. perf record -c 10000 -e '{intel_pt/branch=0/,cycles/aux-output/ppp}' uname
  815. Note that currently, software only supports redirecting at most one PEBS event.
  816. To display PEBS events from the Intel PT trace, use the itrace 'o' option e.g.
  817. perf script --itrace=oe
  818. XED
  819. ---
  820. include::build-xed.txt[]
  821. SEE ALSO
  822. --------
  823. linkperf:perf-record[1], linkperf:perf-script[1], linkperf:perf-report[1],
  824. linkperf:perf-inject[1]