coresight-pmu.h 989 B

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright(C) 2015 Linaro Limited. All rights reserved.
  4. * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
  5. */
  6. #ifndef _LINUX_CORESIGHT_PMU_H
  7. #define _LINUX_CORESIGHT_PMU_H
  8. #define CORESIGHT_ETM_PMU_NAME "cs_etm"
  9. #define CORESIGHT_ETM_PMU_SEED 0x10
  10. /* ETMv3.5/PTM's ETMCR config bit */
  11. #define ETM_OPT_CYCACC 12
  12. #define ETM_OPT_CTXTID 14
  13. #define ETM_OPT_TS 28
  14. #define ETM_OPT_RETSTK 29
  15. /* ETMv4 CONFIGR programming bits for the ETM OPTs */
  16. #define ETM4_CFG_BIT_CYCACC 4
  17. #define ETM4_CFG_BIT_CTXTID 6
  18. #define ETM4_CFG_BIT_TS 11
  19. #define ETM4_CFG_BIT_RETSTK 12
  20. static inline int coresight_get_trace_id(int cpu)
  21. {
  22. /*
  23. * A trace ID of value 0 is invalid, so let's start at some
  24. * random value that fits in 7 bits and go from there. Since
  25. * the common convention is to have data trace IDs be I(N) + 1,
  26. * set instruction trace IDs as a function of the CPU number.
  27. */
  28. return (CORESIGHT_ETM_PMU_SEED + (cpu * 2));
  29. }
  30. #endif