bpf_insn.h 5.4 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /* eBPF instruction mini library */
  3. #ifndef __BPF_INSN_H
  4. #define __BPF_INSN_H
  5. struct bpf_insn;
  6. /* ALU ops on registers, bpf_add|sub|...: dst_reg += src_reg */
  7. #define BPF_ALU64_REG(OP, DST, SRC) \
  8. ((struct bpf_insn) { \
  9. .code = BPF_ALU64 | BPF_OP(OP) | BPF_X, \
  10. .dst_reg = DST, \
  11. .src_reg = SRC, \
  12. .off = 0, \
  13. .imm = 0 })
  14. #define BPF_ALU32_REG(OP, DST, SRC) \
  15. ((struct bpf_insn) { \
  16. .code = BPF_ALU | BPF_OP(OP) | BPF_X, \
  17. .dst_reg = DST, \
  18. .src_reg = SRC, \
  19. .off = 0, \
  20. .imm = 0 })
  21. /* ALU ops on immediates, bpf_add|sub|...: dst_reg += imm32 */
  22. #define BPF_ALU64_IMM(OP, DST, IMM) \
  23. ((struct bpf_insn) { \
  24. .code = BPF_ALU64 | BPF_OP(OP) | BPF_K, \
  25. .dst_reg = DST, \
  26. .src_reg = 0, \
  27. .off = 0, \
  28. .imm = IMM })
  29. #define BPF_ALU32_IMM(OP, DST, IMM) \
  30. ((struct bpf_insn) { \
  31. .code = BPF_ALU | BPF_OP(OP) | BPF_K, \
  32. .dst_reg = DST, \
  33. .src_reg = 0, \
  34. .off = 0, \
  35. .imm = IMM })
  36. /* Short form of mov, dst_reg = src_reg */
  37. #define BPF_MOV64_REG(DST, SRC) \
  38. ((struct bpf_insn) { \
  39. .code = BPF_ALU64 | BPF_MOV | BPF_X, \
  40. .dst_reg = DST, \
  41. .src_reg = SRC, \
  42. .off = 0, \
  43. .imm = 0 })
  44. #define BPF_MOV32_REG(DST, SRC) \
  45. ((struct bpf_insn) { \
  46. .code = BPF_ALU | BPF_MOV | BPF_X, \
  47. .dst_reg = DST, \
  48. .src_reg = SRC, \
  49. .off = 0, \
  50. .imm = 0 })
  51. /* Short form of mov, dst_reg = imm32 */
  52. #define BPF_MOV64_IMM(DST, IMM) \
  53. ((struct bpf_insn) { \
  54. .code = BPF_ALU64 | BPF_MOV | BPF_K, \
  55. .dst_reg = DST, \
  56. .src_reg = 0, \
  57. .off = 0, \
  58. .imm = IMM })
  59. #define BPF_MOV32_IMM(DST, IMM) \
  60. ((struct bpf_insn) { \
  61. .code = BPF_ALU | BPF_MOV | BPF_K, \
  62. .dst_reg = DST, \
  63. .src_reg = 0, \
  64. .off = 0, \
  65. .imm = IMM })
  66. /* BPF_LD_IMM64 macro encodes single 'load 64-bit immediate' insn */
  67. #define BPF_LD_IMM64(DST, IMM) \
  68. BPF_LD_IMM64_RAW(DST, 0, IMM)
  69. #define BPF_LD_IMM64_RAW(DST, SRC, IMM) \
  70. ((struct bpf_insn) { \
  71. .code = BPF_LD | BPF_DW | BPF_IMM, \
  72. .dst_reg = DST, \
  73. .src_reg = SRC, \
  74. .off = 0, \
  75. .imm = (__u32) (IMM) }), \
  76. ((struct bpf_insn) { \
  77. .code = 0, /* zero is reserved opcode */ \
  78. .dst_reg = 0, \
  79. .src_reg = 0, \
  80. .off = 0, \
  81. .imm = ((__u64) (IMM)) >> 32 })
  82. #ifndef BPF_PSEUDO_MAP_FD
  83. # define BPF_PSEUDO_MAP_FD 1
  84. #endif
  85. /* pseudo BPF_LD_IMM64 insn used to refer to process-local map_fd */
  86. #define BPF_LD_MAP_FD(DST, MAP_FD) \
  87. BPF_LD_IMM64_RAW(DST, BPF_PSEUDO_MAP_FD, MAP_FD)
  88. /* Direct packet access, R0 = *(uint *) (skb->data + imm32) */
  89. #define BPF_LD_ABS(SIZE, IMM) \
  90. ((struct bpf_insn) { \
  91. .code = BPF_LD | BPF_SIZE(SIZE) | BPF_ABS, \
  92. .dst_reg = 0, \
  93. .src_reg = 0, \
  94. .off = 0, \
  95. .imm = IMM })
  96. /* Memory load, dst_reg = *(uint *) (src_reg + off16) */
  97. #define BPF_LDX_MEM(SIZE, DST, SRC, OFF) \
  98. ((struct bpf_insn) { \
  99. .code = BPF_LDX | BPF_SIZE(SIZE) | BPF_MEM, \
  100. .dst_reg = DST, \
  101. .src_reg = SRC, \
  102. .off = OFF, \
  103. .imm = 0 })
  104. /* Memory store, *(uint *) (dst_reg + off16) = src_reg */
  105. #define BPF_STX_MEM(SIZE, DST, SRC, OFF) \
  106. ((struct bpf_insn) { \
  107. .code = BPF_STX | BPF_SIZE(SIZE) | BPF_MEM, \
  108. .dst_reg = DST, \
  109. .src_reg = SRC, \
  110. .off = OFF, \
  111. .imm = 0 })
  112. /* Atomic memory add, *(uint *)(dst_reg + off16) += src_reg */
  113. #define BPF_STX_XADD(SIZE, DST, SRC, OFF) \
  114. ((struct bpf_insn) { \
  115. .code = BPF_STX | BPF_SIZE(SIZE) | BPF_XADD, \
  116. .dst_reg = DST, \
  117. .src_reg = SRC, \
  118. .off = OFF, \
  119. .imm = 0 })
  120. /* Memory store, *(uint *) (dst_reg + off16) = imm32 */
  121. #define BPF_ST_MEM(SIZE, DST, OFF, IMM) \
  122. ((struct bpf_insn) { \
  123. .code = BPF_ST | BPF_SIZE(SIZE) | BPF_MEM, \
  124. .dst_reg = DST, \
  125. .src_reg = 0, \
  126. .off = OFF, \
  127. .imm = IMM })
  128. /* Conditional jumps against registers, if (dst_reg 'op' src_reg) goto pc + off16 */
  129. #define BPF_JMP_REG(OP, DST, SRC, OFF) \
  130. ((struct bpf_insn) { \
  131. .code = BPF_JMP | BPF_OP(OP) | BPF_X, \
  132. .dst_reg = DST, \
  133. .src_reg = SRC, \
  134. .off = OFF, \
  135. .imm = 0 })
  136. /* Like BPF_JMP_REG, but with 32-bit wide operands for comparison. */
  137. #define BPF_JMP32_REG(OP, DST, SRC, OFF) \
  138. ((struct bpf_insn) { \
  139. .code = BPF_JMP32 | BPF_OP(OP) | BPF_X, \
  140. .dst_reg = DST, \
  141. .src_reg = SRC, \
  142. .off = OFF, \
  143. .imm = 0 })
  144. /* Conditional jumps against immediates, if (dst_reg 'op' imm32) goto pc + off16 */
  145. #define BPF_JMP_IMM(OP, DST, IMM, OFF) \
  146. ((struct bpf_insn) { \
  147. .code = BPF_JMP | BPF_OP(OP) | BPF_K, \
  148. .dst_reg = DST, \
  149. .src_reg = 0, \
  150. .off = OFF, \
  151. .imm = IMM })
  152. /* Like BPF_JMP_IMM, but with 32-bit wide operands for comparison. */
  153. #define BPF_JMP32_IMM(OP, DST, IMM, OFF) \
  154. ((struct bpf_insn) { \
  155. .code = BPF_JMP32 | BPF_OP(OP) | BPF_K, \
  156. .dst_reg = DST, \
  157. .src_reg = 0, \
  158. .off = OFF, \
  159. .imm = IMM })
  160. /* Raw code statement block */
  161. #define BPF_RAW_INSN(CODE, DST, SRC, OFF, IMM) \
  162. ((struct bpf_insn) { \
  163. .code = CODE, \
  164. .dst_reg = DST, \
  165. .src_reg = SRC, \
  166. .off = OFF, \
  167. .imm = IMM })
  168. /* Program exit */
  169. #define BPF_EXIT_INSN() \
  170. ((struct bpf_insn) { \
  171. .code = BPF_JMP | BPF_EXIT, \
  172. .dst_reg = 0, \
  173. .src_reg = 0, \
  174. .off = 0, \
  175. .imm = 0 })
  176. #endif