longlong.h 39 KB

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  1. /* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
  2. * Note: I added some stuff for use with gnupg
  3. *
  4. * Copyright (C) 1991, 1992, 1993, 1994, 1996, 1998,
  5. * 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
  6. *
  7. * This file is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU Library General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. *
  12. * This file is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Library General Public
  15. * License for more details.
  16. *
  17. * You should have received a copy of the GNU Library General Public License
  18. * along with this file; see the file COPYING.LIB. If not, write to
  19. * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  20. * MA 02111-1307, USA. */
  21. #include <linux/count_zeros.h>
  22. /* You have to define the following before including this file:
  23. *
  24. * UWtype -- An unsigned type, default type for operations (typically a "word")
  25. * UHWtype -- An unsigned type, at least half the size of UWtype.
  26. * UDWtype -- An unsigned type, at least twice as large a UWtype
  27. * W_TYPE_SIZE -- size in bits of UWtype
  28. *
  29. * SItype, USItype -- Signed and unsigned 32 bit types.
  30. * DItype, UDItype -- Signed and unsigned 64 bit types.
  31. *
  32. * On a 32 bit machine UWtype should typically be USItype;
  33. * on a 64 bit machine, UWtype should typically be UDItype.
  34. */
  35. #define __BITS4 (W_TYPE_SIZE / 4)
  36. #define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
  37. #define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
  38. #define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
  39. /* This is used to make sure no undesirable sharing between different libraries
  40. that use this file takes place. */
  41. #ifndef __MPN
  42. #define __MPN(x) __##x
  43. #endif
  44. /* Define auxiliary asm macros.
  45. *
  46. * 1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
  47. * UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
  48. * word product in HIGH_PROD and LOW_PROD.
  49. *
  50. * 2) __umulsidi3(a,b) multiplies two UWtype integers A and B, and returns a
  51. * UDWtype product. This is just a variant of umul_ppmm.
  52. * 3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  53. * denominator) divides a UDWtype, composed by the UWtype integers
  54. * HIGH_NUMERATOR and LOW_NUMERATOR, by DENOMINATOR and places the quotient
  55. * in QUOTIENT and the remainder in REMAINDER. HIGH_NUMERATOR must be less
  56. * than DENOMINATOR for correct operation. If, in addition, the most
  57. * significant bit of DENOMINATOR must be 1, then the pre-processor symbol
  58. * UDIV_NEEDS_NORMALIZATION is defined to 1.
  59. * 4) sdiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
  60. * denominator). Like udiv_qrnnd but the numbers are signed. The quotient
  61. * is rounded towards 0.
  62. *
  63. * 5) count_leading_zeros(count, x) counts the number of zero-bits from the
  64. * msb to the first non-zero bit in the UWtype X. This is the number of
  65. * steps X needs to be shifted left to set the msb. Undefined for X == 0,
  66. * unless the symbol COUNT_LEADING_ZEROS_0 is defined to some value.
  67. *
  68. * 6) count_trailing_zeros(count, x) like count_leading_zeros, but counts
  69. * from the least significant end.
  70. *
  71. * 7) add_ssaaaa(high_sum, low_sum, high_addend_1, low_addend_1,
  72. * high_addend_2, low_addend_2) adds two UWtype integers, composed by
  73. * HIGH_ADDEND_1 and LOW_ADDEND_1, and HIGH_ADDEND_2 and LOW_ADDEND_2
  74. * respectively. The result is placed in HIGH_SUM and LOW_SUM. Overflow
  75. * (i.e. carry out) is not stored anywhere, and is lost.
  76. *
  77. * 8) sub_ddmmss(high_difference, low_difference, high_minuend, low_minuend,
  78. * high_subtrahend, low_subtrahend) subtracts two two-word UWtype integers,
  79. * composed by HIGH_MINUEND_1 and LOW_MINUEND_1, and HIGH_SUBTRAHEND_2 and
  80. * LOW_SUBTRAHEND_2 respectively. The result is placed in HIGH_DIFFERENCE
  81. * and LOW_DIFFERENCE. Overflow (i.e. carry out) is not stored anywhere,
  82. * and is lost.
  83. *
  84. * If any of these macros are left undefined for a particular CPU,
  85. * C macros are used. */
  86. /* The CPUs come in alphabetical order below.
  87. *
  88. * Please add support for more CPUs here, or improve the current support
  89. * for the CPUs below! */
  90. #if defined(__GNUC__) && !defined(NO_ASM)
  91. /* We sometimes need to clobber "cc" with gcc2, but that would not be
  92. understood by gcc1. Use cpp to avoid major code duplication. */
  93. #if __GNUC__ < 2
  94. #define __CLOBBER_CC
  95. #define __AND_CLOBBER_CC
  96. #else /* __GNUC__ >= 2 */
  97. #define __CLOBBER_CC : "cc"
  98. #define __AND_CLOBBER_CC , "cc"
  99. #endif /* __GNUC__ < 2 */
  100. /***************************************
  101. ************** A29K *****************
  102. ***************************************/
  103. #if (defined(__a29k__) || defined(_AM29K)) && W_TYPE_SIZE == 32
  104. #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
  105. __asm__ ("add %1,%4,%5\n" \
  106. "addc %0,%2,%3" \
  107. : "=r" ((USItype)(sh)), \
  108. "=&r" ((USItype)(sl)) \
  109. : "%r" ((USItype)(ah)), \
  110. "rI" ((USItype)(bh)), \
  111. "%r" ((USItype)(al)), \
  112. "rI" ((USItype)(bl)))
  113. #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
  114. __asm__ ("sub %1,%4,%5\n" \
  115. "subc %0,%2,%3" \
  116. : "=r" ((USItype)(sh)), \
  117. "=&r" ((USItype)(sl)) \
  118. : "r" ((USItype)(ah)), \
  119. "rI" ((USItype)(bh)), \
  120. "r" ((USItype)(al)), \
  121. "rI" ((USItype)(bl)))
  122. #define umul_ppmm(xh, xl, m0, m1) \
  123. do { \
  124. USItype __m0 = (m0), __m1 = (m1); \
  125. __asm__ ("multiplu %0,%1,%2" \
  126. : "=r" ((USItype)(xl)) \
  127. : "r" (__m0), \
  128. "r" (__m1)); \
  129. __asm__ ("multmu %0,%1,%2" \
  130. : "=r" ((USItype)(xh)) \
  131. : "r" (__m0), \
  132. "r" (__m1)); \
  133. } while (0)
  134. #define udiv_qrnnd(q, r, n1, n0, d) \
  135. __asm__ ("dividu %0,%3,%4" \
  136. : "=r" ((USItype)(q)), \
  137. "=q" ((USItype)(r)) \
  138. : "1" ((USItype)(n1)), \
  139. "r" ((USItype)(n0)), \
  140. "r" ((USItype)(d)))
  141. #endif /* __a29k__ */
  142. #if defined(__alpha) && W_TYPE_SIZE == 64
  143. #define umul_ppmm(ph, pl, m0, m1) \
  144. do { \
  145. UDItype __m0 = (m0), __m1 = (m1); \
  146. (ph) = __builtin_alpha_umulh(__m0, __m1); \
  147. (pl) = __m0 * __m1; \
  148. } while (0)
  149. #define UMUL_TIME 46
  150. #ifndef LONGLONG_STANDALONE
  151. #define udiv_qrnnd(q, r, n1, n0, d) \
  152. do { UDItype __r; \
  153. (q) = __udiv_qrnnd(&__r, (n1), (n0), (d)); \
  154. (r) = __r; \
  155. } while (0)
  156. extern UDItype __udiv_qrnnd(UDItype *, UDItype, UDItype, UDItype);
  157. #define UDIV_TIME 220
  158. #endif /* LONGLONG_STANDALONE */
  159. #endif /* __alpha */
  160. /***************************************
  161. ************** ARM ******************
  162. ***************************************/
  163. #if defined(__arm__) && W_TYPE_SIZE == 32
  164. #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
  165. __asm__ ("adds %1, %4, %5\n" \
  166. "adc %0, %2, %3" \
  167. : "=r" (sh), \
  168. "=&r" (sl) \
  169. : "%r" ((USItype)(ah)), \
  170. "rI" ((USItype)(bh)), \
  171. "%r" ((USItype)(al)), \
  172. "rI" ((USItype)(bl)))
  173. #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
  174. __asm__ ("subs %1, %4, %5\n" \
  175. "sbc %0, %2, %3" \
  176. : "=r" (sh), \
  177. "=&r" (sl) \
  178. : "r" ((USItype)(ah)), \
  179. "rI" ((USItype)(bh)), \
  180. "r" ((USItype)(al)), \
  181. "rI" ((USItype)(bl)))
  182. #if defined __ARM_ARCH_2__ || defined __ARM_ARCH_3__
  183. #define umul_ppmm(xh, xl, a, b) \
  184. __asm__ ("@ Inlined umul_ppmm\n" \
  185. "mov %|r0, %2, lsr #16 @ AAAA\n" \
  186. "mov %|r2, %3, lsr #16 @ BBBB\n" \
  187. "bic %|r1, %2, %|r0, lsl #16 @ aaaa\n" \
  188. "bic %0, %3, %|r2, lsl #16 @ bbbb\n" \
  189. "mul %1, %|r1, %|r2 @ aaaa * BBBB\n" \
  190. "mul %|r2, %|r0, %|r2 @ AAAA * BBBB\n" \
  191. "mul %|r1, %0, %|r1 @ aaaa * bbbb\n" \
  192. "mul %0, %|r0, %0 @ AAAA * bbbb\n" \
  193. "adds %|r0, %1, %0 @ central sum\n" \
  194. "addcs %|r2, %|r2, #65536\n" \
  195. "adds %1, %|r1, %|r0, lsl #16\n" \
  196. "adc %0, %|r2, %|r0, lsr #16" \
  197. : "=&r" (xh), \
  198. "=r" (xl) \
  199. : "r" ((USItype)(a)), \
  200. "r" ((USItype)(b)) \
  201. : "r0", "r1", "r2")
  202. #else
  203. #define umul_ppmm(xh, xl, a, b) \
  204. __asm__ ("@ Inlined umul_ppmm\n" \
  205. "umull %1, %0, %2, %3" \
  206. : "=&r" (xh), \
  207. "=&r" (xl) \
  208. : "r" ((USItype)(a)), \
  209. "r" ((USItype)(b)) \
  210. : "r0", "r1")
  211. #endif
  212. #define UMUL_TIME 20
  213. #define UDIV_TIME 100
  214. #endif /* __arm__ */
  215. /***************************************
  216. ************** CLIPPER **************
  217. ***************************************/
  218. #if defined(__clipper__) && W_TYPE_SIZE == 32
  219. #define umul_ppmm(w1, w0, u, v) \
  220. ({union {UDItype __ll; \
  221. struct {USItype __l, __h; } __i; \
  222. } __xx; \
  223. __asm__ ("mulwux %2,%0" \
  224. : "=r" (__xx.__ll) \
  225. : "%0" ((USItype)(u)), \
  226. "r" ((USItype)(v))); \
  227. (w1) = __xx.__i.__h; (w0) = __xx.__i.__l; })
  228. #define smul_ppmm(w1, w0, u, v) \
  229. ({union {DItype __ll; \
  230. struct {SItype __l, __h; } __i; \
  231. } __xx; \
  232. __asm__ ("mulwx %2,%0" \
  233. : "=r" (__xx.__ll) \
  234. : "%0" ((SItype)(u)), \
  235. "r" ((SItype)(v))); \
  236. (w1) = __xx.__i.__h; (w0) = __xx.__i.__l; })
  237. #define __umulsidi3(u, v) \
  238. ({UDItype __w; \
  239. __asm__ ("mulwux %2,%0" \
  240. : "=r" (__w) \
  241. : "%0" ((USItype)(u)), \
  242. "r" ((USItype)(v))); \
  243. __w; })
  244. #endif /* __clipper__ */
  245. /***************************************
  246. ************** GMICRO ***************
  247. ***************************************/
  248. #if defined(__gmicro__) && W_TYPE_SIZE == 32
  249. #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
  250. __asm__ ("add.w %5,%1\n" \
  251. "addx %3,%0" \
  252. : "=g" ((USItype)(sh)), \
  253. "=&g" ((USItype)(sl)) \
  254. : "%0" ((USItype)(ah)), \
  255. "g" ((USItype)(bh)), \
  256. "%1" ((USItype)(al)), \
  257. "g" ((USItype)(bl)))
  258. #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
  259. __asm__ ("sub.w %5,%1\n" \
  260. "subx %3,%0" \
  261. : "=g" ((USItype)(sh)), \
  262. "=&g" ((USItype)(sl)) \
  263. : "0" ((USItype)(ah)), \
  264. "g" ((USItype)(bh)), \
  265. "1" ((USItype)(al)), \
  266. "g" ((USItype)(bl)))
  267. #define umul_ppmm(ph, pl, m0, m1) \
  268. __asm__ ("mulx %3,%0,%1" \
  269. : "=g" ((USItype)(ph)), \
  270. "=r" ((USItype)(pl)) \
  271. : "%0" ((USItype)(m0)), \
  272. "g" ((USItype)(m1)))
  273. #define udiv_qrnnd(q, r, nh, nl, d) \
  274. __asm__ ("divx %4,%0,%1" \
  275. : "=g" ((USItype)(q)), \
  276. "=r" ((USItype)(r)) \
  277. : "1" ((USItype)(nh)), \
  278. "0" ((USItype)(nl)), \
  279. "g" ((USItype)(d)))
  280. #endif
  281. /***************************************
  282. ************** HPPA *****************
  283. ***************************************/
  284. #if defined(__hppa) && W_TYPE_SIZE == 32
  285. #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
  286. __asm__ ("add %4,%5,%1\n" \
  287. "addc %2,%3,%0" \
  288. : "=r" ((USItype)(sh)), \
  289. "=&r" ((USItype)(sl)) \
  290. : "%rM" ((USItype)(ah)), \
  291. "rM" ((USItype)(bh)), \
  292. "%rM" ((USItype)(al)), \
  293. "rM" ((USItype)(bl)))
  294. #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
  295. __asm__ ("sub %4,%5,%1\n" \
  296. "subb %2,%3,%0" \
  297. : "=r" ((USItype)(sh)), \
  298. "=&r" ((USItype)(sl)) \
  299. : "rM" ((USItype)(ah)), \
  300. "rM" ((USItype)(bh)), \
  301. "rM" ((USItype)(al)), \
  302. "rM" ((USItype)(bl)))
  303. #if 0 && defined(_PA_RISC1_1)
  304. /* xmpyu uses floating point register which is not allowed in Linux kernel. */
  305. #define umul_ppmm(wh, wl, u, v) \
  306. do { \
  307. union {UDItype __ll; \
  308. struct {USItype __h, __l; } __i; \
  309. } __xx; \
  310. __asm__ ("xmpyu %1,%2,%0" \
  311. : "=*f" (__xx.__ll) \
  312. : "*f" ((USItype)(u)), \
  313. "*f" ((USItype)(v))); \
  314. (wh) = __xx.__i.__h; \
  315. (wl) = __xx.__i.__l; \
  316. } while (0)
  317. #define UMUL_TIME 8
  318. #define UDIV_TIME 60
  319. #else
  320. #define UMUL_TIME 40
  321. #define UDIV_TIME 80
  322. #endif
  323. #if 0 /* #ifndef LONGLONG_STANDALONE */
  324. #define udiv_qrnnd(q, r, n1, n0, d) \
  325. do { USItype __r; \
  326. (q) = __udiv_qrnnd(&__r, (n1), (n0), (d)); \
  327. (r) = __r; \
  328. } while (0)
  329. extern USItype __udiv_qrnnd();
  330. #endif /* LONGLONG_STANDALONE */
  331. #endif /* hppa */
  332. /***************************************
  333. ************** I370 *****************
  334. ***************************************/
  335. #if (defined(__i370__) || defined(__mvs__)) && W_TYPE_SIZE == 32
  336. #define umul_ppmm(xh, xl, m0, m1) \
  337. do { \
  338. union {UDItype __ll; \
  339. struct {USItype __h, __l; } __i; \
  340. } __xx; \
  341. USItype __m0 = (m0), __m1 = (m1); \
  342. __asm__ ("mr %0,%3" \
  343. : "=r" (__xx.__i.__h), \
  344. "=r" (__xx.__i.__l) \
  345. : "%1" (__m0), \
  346. "r" (__m1)); \
  347. (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
  348. (xh) += ((((SItype) __m0 >> 31) & __m1) \
  349. + (((SItype) __m1 >> 31) & __m0)); \
  350. } while (0)
  351. #define smul_ppmm(xh, xl, m0, m1) \
  352. do { \
  353. union {DItype __ll; \
  354. struct {USItype __h, __l; } __i; \
  355. } __xx; \
  356. __asm__ ("mr %0,%3" \
  357. : "=r" (__xx.__i.__h), \
  358. "=r" (__xx.__i.__l) \
  359. : "%1" (m0), \
  360. "r" (m1)); \
  361. (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
  362. } while (0)
  363. #define sdiv_qrnnd(q, r, n1, n0, d) \
  364. do { \
  365. union {DItype __ll; \
  366. struct {USItype __h, __l; } __i; \
  367. } __xx; \
  368. __xx.__i.__h = n1; __xx.__i.__l = n0; \
  369. __asm__ ("dr %0,%2" \
  370. : "=r" (__xx.__ll) \
  371. : "0" (__xx.__ll), "r" (d)); \
  372. (q) = __xx.__i.__l; (r) = __xx.__i.__h; \
  373. } while (0)
  374. #endif
  375. /***************************************
  376. ************** I386 *****************
  377. ***************************************/
  378. #undef __i386__
  379. #if (defined(__i386__) || defined(__i486__)) && W_TYPE_SIZE == 32
  380. #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
  381. __asm__ ("addl %5,%1\n" \
  382. "adcl %3,%0" \
  383. : "=r" (sh), \
  384. "=&r" (sl) \
  385. : "%0" ((USItype)(ah)), \
  386. "g" ((USItype)(bh)), \
  387. "%1" ((USItype)(al)), \
  388. "g" ((USItype)(bl)))
  389. #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
  390. __asm__ ("subl %5,%1\n" \
  391. "sbbl %3,%0" \
  392. : "=r" (sh), \
  393. "=&r" (sl) \
  394. : "0" ((USItype)(ah)), \
  395. "g" ((USItype)(bh)), \
  396. "1" ((USItype)(al)), \
  397. "g" ((USItype)(bl)))
  398. #define umul_ppmm(w1, w0, u, v) \
  399. __asm__ ("mull %3" \
  400. : "=a" (w0), \
  401. "=d" (w1) \
  402. : "%0" ((USItype)(u)), \
  403. "rm" ((USItype)(v)))
  404. #define udiv_qrnnd(q, r, n1, n0, d) \
  405. __asm__ ("divl %4" \
  406. : "=a" (q), \
  407. "=d" (r) \
  408. : "0" ((USItype)(n0)), \
  409. "1" ((USItype)(n1)), \
  410. "rm" ((USItype)(d)))
  411. #ifndef UMUL_TIME
  412. #define UMUL_TIME 40
  413. #endif
  414. #ifndef UDIV_TIME
  415. #define UDIV_TIME 40
  416. #endif
  417. #endif /* 80x86 */
  418. /***************************************
  419. ************** I860 *****************
  420. ***************************************/
  421. #if defined(__i860__) && W_TYPE_SIZE == 32
  422. #define rshift_rhlc(r, h, l, c) \
  423. __asm__ ("shr %3,r0,r0\n" \
  424. "shrd %1,%2,%0" \
  425. "=r" (r) : "r" (h), "r" (l), "rn" (c))
  426. #endif /* i860 */
  427. /***************************************
  428. ************** I960 *****************
  429. ***************************************/
  430. #if defined(__i960__) && W_TYPE_SIZE == 32
  431. #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
  432. __asm__ ("cmpo 1,0\n" \
  433. "addc %5,%4,%1\n" \
  434. "addc %3,%2,%0" \
  435. : "=r" ((USItype)(sh)), \
  436. "=&r" ((USItype)(sl)) \
  437. : "%dI" ((USItype)(ah)), \
  438. "dI" ((USItype)(bh)), \
  439. "%dI" ((USItype)(al)), \
  440. "dI" ((USItype)(bl)))
  441. #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
  442. __asm__ ("cmpo 0,0\n" \
  443. "subc %5,%4,%1\n" \
  444. "subc %3,%2,%0" \
  445. : "=r" ((USItype)(sh)), \
  446. "=&r" ((USItype)(sl)) \
  447. : "dI" ((USItype)(ah)), \
  448. "dI" ((USItype)(bh)), \
  449. "dI" ((USItype)(al)), \
  450. "dI" ((USItype)(bl)))
  451. #define umul_ppmm(w1, w0, u, v) \
  452. ({union {UDItype __ll; \
  453. struct {USItype __l, __h; } __i; \
  454. } __xx; \
  455. __asm__ ("emul %2,%1,%0" \
  456. : "=d" (__xx.__ll) \
  457. : "%dI" ((USItype)(u)), \
  458. "dI" ((USItype)(v))); \
  459. (w1) = __xx.__i.__h; (w0) = __xx.__i.__l; })
  460. #define __umulsidi3(u, v) \
  461. ({UDItype __w; \
  462. __asm__ ("emul %2,%1,%0" \
  463. : "=d" (__w) \
  464. : "%dI" ((USItype)(u)), \
  465. "dI" ((USItype)(v))); \
  466. __w; })
  467. #define udiv_qrnnd(q, r, nh, nl, d) \
  468. do { \
  469. union {UDItype __ll; \
  470. struct {USItype __l, __h; } __i; \
  471. } __nn; \
  472. __nn.__i.__h = (nh); __nn.__i.__l = (nl); \
  473. __asm__ ("ediv %d,%n,%0" \
  474. : "=d" (__rq.__ll) \
  475. : "dI" (__nn.__ll), \
  476. "dI" ((USItype)(d))); \
  477. (r) = __rq.__i.__l; (q) = __rq.__i.__h; \
  478. } while (0)
  479. #if defined(__i960mx) /* what is the proper symbol to test??? */
  480. #define rshift_rhlc(r, h, l, c) \
  481. do { \
  482. union {UDItype __ll; \
  483. struct {USItype __l, __h; } __i; \
  484. } __nn; \
  485. __nn.__i.__h = (h); __nn.__i.__l = (l); \
  486. __asm__ ("shre %2,%1,%0" \
  487. : "=d" (r) : "dI" (__nn.__ll), "dI" (c)); \
  488. }
  489. #endif /* i960mx */
  490. #endif /* i960 */
  491. /***************************************
  492. ************** 68000 ****************
  493. ***************************************/
  494. #if (defined(__mc68000__) || defined(__mc68020__) || defined(__NeXT__) || defined(mc68020)) && W_TYPE_SIZE == 32
  495. #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
  496. __asm__ ("add%.l %5,%1\n" \
  497. "addx%.l %3,%0" \
  498. : "=d" ((USItype)(sh)), \
  499. "=&d" ((USItype)(sl)) \
  500. : "%0" ((USItype)(ah)), \
  501. "d" ((USItype)(bh)), \
  502. "%1" ((USItype)(al)), \
  503. "g" ((USItype)(bl)))
  504. #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
  505. __asm__ ("sub%.l %5,%1\n" \
  506. "subx%.l %3,%0" \
  507. : "=d" ((USItype)(sh)), \
  508. "=&d" ((USItype)(sl)) \
  509. : "0" ((USItype)(ah)), \
  510. "d" ((USItype)(bh)), \
  511. "1" ((USItype)(al)), \
  512. "g" ((USItype)(bl)))
  513. #if (defined(__mc68020__) || defined(__NeXT__) || defined(mc68020))
  514. #define umul_ppmm(w1, w0, u, v) \
  515. __asm__ ("mulu%.l %3,%1:%0" \
  516. : "=d" ((USItype)(w0)), \
  517. "=d" ((USItype)(w1)) \
  518. : "%0" ((USItype)(u)), \
  519. "dmi" ((USItype)(v)))
  520. #define UMUL_TIME 45
  521. #define udiv_qrnnd(q, r, n1, n0, d) \
  522. __asm__ ("divu%.l %4,%1:%0" \
  523. : "=d" ((USItype)(q)), \
  524. "=d" ((USItype)(r)) \
  525. : "0" ((USItype)(n0)), \
  526. "1" ((USItype)(n1)), \
  527. "dmi" ((USItype)(d)))
  528. #define UDIV_TIME 90
  529. #define sdiv_qrnnd(q, r, n1, n0, d) \
  530. __asm__ ("divs%.l %4,%1:%0" \
  531. : "=d" ((USItype)(q)), \
  532. "=d" ((USItype)(r)) \
  533. : "0" ((USItype)(n0)), \
  534. "1" ((USItype)(n1)), \
  535. "dmi" ((USItype)(d)))
  536. #else /* not mc68020 */
  537. #define umul_ppmm(xh, xl, a, b) \
  538. do { USItype __umul_tmp1, __umul_tmp2; \
  539. __asm__ ("| Inlined umul_ppmm\n" \
  540. "move%.l %5,%3\n" \
  541. "move%.l %2,%0\n" \
  542. "move%.w %3,%1\n" \
  543. "swap %3\n" \
  544. "swap %0\n" \
  545. "mulu %2,%1\n" \
  546. "mulu %3,%0\n" \
  547. "mulu %2,%3\n" \
  548. "swap %2\n" \
  549. "mulu %5,%2\n" \
  550. "add%.l %3,%2\n" \
  551. "jcc 1f\n" \
  552. "add%.l %#0x10000,%0\n" \
  553. "1: move%.l %2,%3\n" \
  554. "clr%.w %2\n" \
  555. "swap %2\n" \
  556. "swap %3\n" \
  557. "clr%.w %3\n" \
  558. "add%.l %3,%1\n" \
  559. "addx%.l %2,%0\n" \
  560. "| End inlined umul_ppmm" \
  561. : "=&d" ((USItype)(xh)), "=&d" ((USItype)(xl)), \
  562. "=d" (__umul_tmp1), "=&d" (__umul_tmp2) \
  563. : "%2" ((USItype)(a)), "d" ((USItype)(b))); \
  564. } while (0)
  565. #define UMUL_TIME 100
  566. #define UDIV_TIME 400
  567. #endif /* not mc68020 */
  568. #endif /* mc68000 */
  569. /***************************************
  570. ************** 88000 ****************
  571. ***************************************/
  572. #if defined(__m88000__) && W_TYPE_SIZE == 32
  573. #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
  574. __asm__ ("addu.co %1,%r4,%r5\n" \
  575. "addu.ci %0,%r2,%r3" \
  576. : "=r" ((USItype)(sh)), \
  577. "=&r" ((USItype)(sl)) \
  578. : "%rJ" ((USItype)(ah)), \
  579. "rJ" ((USItype)(bh)), \
  580. "%rJ" ((USItype)(al)), \
  581. "rJ" ((USItype)(bl)))
  582. #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
  583. __asm__ ("subu.co %1,%r4,%r5\n" \
  584. "subu.ci %0,%r2,%r3" \
  585. : "=r" ((USItype)(sh)), \
  586. "=&r" ((USItype)(sl)) \
  587. : "rJ" ((USItype)(ah)), \
  588. "rJ" ((USItype)(bh)), \
  589. "rJ" ((USItype)(al)), \
  590. "rJ" ((USItype)(bl)))
  591. #if defined(__m88110__)
  592. #define umul_ppmm(wh, wl, u, v) \
  593. do { \
  594. union {UDItype __ll; \
  595. struct {USItype __h, __l; } __i; \
  596. } __x; \
  597. __asm__ ("mulu.d %0,%1,%2" : "=r" (__x.__ll) : "r" (u), "r" (v)); \
  598. (wh) = __x.__i.__h; \
  599. (wl) = __x.__i.__l; \
  600. } while (0)
  601. #define udiv_qrnnd(q, r, n1, n0, d) \
  602. ({union {UDItype __ll; \
  603. struct {USItype __h, __l; } __i; \
  604. } __x, __q; \
  605. __x.__i.__h = (n1); __x.__i.__l = (n0); \
  606. __asm__ ("divu.d %0,%1,%2" \
  607. : "=r" (__q.__ll) : "r" (__x.__ll), "r" (d)); \
  608. (r) = (n0) - __q.__l * (d); (q) = __q.__l; })
  609. #define UMUL_TIME 5
  610. #define UDIV_TIME 25
  611. #else
  612. #define UMUL_TIME 17
  613. #define UDIV_TIME 150
  614. #endif /* __m88110__ */
  615. #endif /* __m88000__ */
  616. /***************************************
  617. ************** MIPS *****************
  618. ***************************************/
  619. #if defined(__mips__) && W_TYPE_SIZE == 32
  620. #define umul_ppmm(w1, w0, u, v) \
  621. do { \
  622. UDItype __ll = (UDItype)(u) * (v); \
  623. w1 = __ll >> 32; \
  624. w0 = __ll; \
  625. } while (0)
  626. #define UMUL_TIME 10
  627. #define UDIV_TIME 100
  628. #endif /* __mips__ */
  629. /***************************************
  630. ************** MIPS/64 **************
  631. ***************************************/
  632. #if (defined(__mips) && __mips >= 3) && W_TYPE_SIZE == 64
  633. #if defined(__mips_isa_rev) && __mips_isa_rev >= 6 && defined(CONFIG_CC_IS_GCC)
  634. /*
  635. * GCC ends up emitting a __multi3 intrinsic call for MIPS64r6 with the plain C
  636. * code below, so we special case MIPS64r6 until the compiler can do better.
  637. */
  638. #define umul_ppmm(w1, w0, u, v) \
  639. do { \
  640. __asm__ ("dmulu %0,%1,%2" \
  641. : "=d" ((UDItype)(w0)) \
  642. : "d" ((UDItype)(u)), \
  643. "d" ((UDItype)(v))); \
  644. __asm__ ("dmuhu %0,%1,%2" \
  645. : "=d" ((UDItype)(w1)) \
  646. : "d" ((UDItype)(u)), \
  647. "d" ((UDItype)(v))); \
  648. } while (0)
  649. #else
  650. #define umul_ppmm(w1, w0, u, v) \
  651. do { \
  652. typedef unsigned int __ll_UTItype __attribute__((mode(TI))); \
  653. __ll_UTItype __ll = (__ll_UTItype)(u) * (v); \
  654. w1 = __ll >> 64; \
  655. w0 = __ll; \
  656. } while (0)
  657. #endif
  658. #define UMUL_TIME 20
  659. #define UDIV_TIME 140
  660. #endif /* __mips__ */
  661. /***************************************
  662. ************** 32000 ****************
  663. ***************************************/
  664. #if defined(__ns32000__) && W_TYPE_SIZE == 32
  665. #define umul_ppmm(w1, w0, u, v) \
  666. ({union {UDItype __ll; \
  667. struct {USItype __l, __h; } __i; \
  668. } __xx; \
  669. __asm__ ("meid %2,%0" \
  670. : "=g" (__xx.__ll) \
  671. : "%0" ((USItype)(u)), \
  672. "g" ((USItype)(v))); \
  673. (w1) = __xx.__i.__h; (w0) = __xx.__i.__l; })
  674. #define __umulsidi3(u, v) \
  675. ({UDItype __w; \
  676. __asm__ ("meid %2,%0" \
  677. : "=g" (__w) \
  678. : "%0" ((USItype)(u)), \
  679. "g" ((USItype)(v))); \
  680. __w; })
  681. #define udiv_qrnnd(q, r, n1, n0, d) \
  682. ({union {UDItype __ll; \
  683. struct {USItype __l, __h; } __i; \
  684. } __xx; \
  685. __xx.__i.__h = (n1); __xx.__i.__l = (n0); \
  686. __asm__ ("deid %2,%0" \
  687. : "=g" (__xx.__ll) \
  688. : "0" (__xx.__ll), \
  689. "g" ((USItype)(d))); \
  690. (r) = __xx.__i.__l; (q) = __xx.__i.__h; })
  691. #endif /* __ns32000__ */
  692. /***************************************
  693. ************** PPC ******************
  694. ***************************************/
  695. #if (defined(_ARCH_PPC) || defined(_IBMR2)) && W_TYPE_SIZE == 32
  696. #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
  697. do { \
  698. if (__builtin_constant_p(bh) && (bh) == 0) \
  699. __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \
  700. : "=r" (sh), \
  701. "=&r" (sl) \
  702. : "%r" ((USItype)(ah)), \
  703. "%r" ((USItype)(al)), \
  704. "rI" ((USItype)(bl))); \
  705. else if (__builtin_constant_p(bh) && (bh) == ~(USItype) 0) \
  706. __asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \
  707. : "=r" (sh), \
  708. "=&r" (sl) \
  709. : "%r" ((USItype)(ah)), \
  710. "%r" ((USItype)(al)), \
  711. "rI" ((USItype)(bl))); \
  712. else \
  713. __asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \
  714. : "=r" (sh), \
  715. "=&r" (sl) \
  716. : "%r" ((USItype)(ah)), \
  717. "r" ((USItype)(bh)), \
  718. "%r" ((USItype)(al)), \
  719. "rI" ((USItype)(bl))); \
  720. } while (0)
  721. #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
  722. do { \
  723. if (__builtin_constant_p(ah) && (ah) == 0) \
  724. __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \
  725. : "=r" (sh), \
  726. "=&r" (sl) \
  727. : "r" ((USItype)(bh)), \
  728. "rI" ((USItype)(al)), \
  729. "r" ((USItype)(bl))); \
  730. else if (__builtin_constant_p(ah) && (ah) == ~(USItype) 0) \
  731. __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \
  732. : "=r" (sh), \
  733. "=&r" (sl) \
  734. : "r" ((USItype)(bh)), \
  735. "rI" ((USItype)(al)), \
  736. "r" ((USItype)(bl))); \
  737. else if (__builtin_constant_p(bh) && (bh) == 0) \
  738. __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \
  739. : "=r" (sh), \
  740. "=&r" (sl) \
  741. : "r" ((USItype)(ah)), \
  742. "rI" ((USItype)(al)), \
  743. "r" ((USItype)(bl))); \
  744. else if (__builtin_constant_p(bh) && (bh) == ~(USItype) 0) \
  745. __asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \
  746. : "=r" (sh), \
  747. "=&r" (sl) \
  748. : "r" ((USItype)(ah)), \
  749. "rI" ((USItype)(al)), \
  750. "r" ((USItype)(bl))); \
  751. else \
  752. __asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \
  753. : "=r" (sh), \
  754. "=&r" (sl) \
  755. : "r" ((USItype)(ah)), \
  756. "r" ((USItype)(bh)), \
  757. "rI" ((USItype)(al)), \
  758. "r" ((USItype)(bl))); \
  759. } while (0)
  760. #if defined(_ARCH_PPC)
  761. #define umul_ppmm(ph, pl, m0, m1) \
  762. do { \
  763. USItype __m0 = (m0), __m1 = (m1); \
  764. __asm__ ("mulhwu %0,%1,%2" \
  765. : "=r" (ph) \
  766. : "%r" (__m0), \
  767. "r" (__m1)); \
  768. (pl) = __m0 * __m1; \
  769. } while (0)
  770. #define UMUL_TIME 15
  771. #define smul_ppmm(ph, pl, m0, m1) \
  772. do { \
  773. SItype __m0 = (m0), __m1 = (m1); \
  774. __asm__ ("mulhw %0,%1,%2" \
  775. : "=r" ((SItype) ph) \
  776. : "%r" (__m0), \
  777. "r" (__m1)); \
  778. (pl) = __m0 * __m1; \
  779. } while (0)
  780. #define SMUL_TIME 14
  781. #define UDIV_TIME 120
  782. #else
  783. #define umul_ppmm(xh, xl, m0, m1) \
  784. do { \
  785. USItype __m0 = (m0), __m1 = (m1); \
  786. __asm__ ("mul %0,%2,%3" \
  787. : "=r" ((USItype)(xh)), \
  788. "=q" ((USItype)(xl)) \
  789. : "r" (__m0), \
  790. "r" (__m1)); \
  791. (xh) += ((((SItype) __m0 >> 31) & __m1) \
  792. + (((SItype) __m1 >> 31) & __m0)); \
  793. } while (0)
  794. #define UMUL_TIME 8
  795. #define smul_ppmm(xh, xl, m0, m1) \
  796. __asm__ ("mul %0,%2,%3" \
  797. : "=r" ((SItype)(xh)), \
  798. "=q" ((SItype)(xl)) \
  799. : "r" (m0), \
  800. "r" (m1))
  801. #define SMUL_TIME 4
  802. #define sdiv_qrnnd(q, r, nh, nl, d) \
  803. __asm__ ("div %0,%2,%4" \
  804. : "=r" ((SItype)(q)), "=q" ((SItype)(r)) \
  805. : "r" ((SItype)(nh)), "1" ((SItype)(nl)), "r" ((SItype)(d)))
  806. #define UDIV_TIME 100
  807. #endif
  808. #endif /* Power architecture variants. */
  809. /***************************************
  810. ************** PYR ******************
  811. ***************************************/
  812. #if defined(__pyr__) && W_TYPE_SIZE == 32
  813. #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
  814. __asm__ ("addw %5,%1\n" \
  815. "addwc %3,%0" \
  816. : "=r" ((USItype)(sh)), \
  817. "=&r" ((USItype)(sl)) \
  818. : "%0" ((USItype)(ah)), \
  819. "g" ((USItype)(bh)), \
  820. "%1" ((USItype)(al)), \
  821. "g" ((USItype)(bl)))
  822. #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
  823. __asm__ ("subw %5,%1\n" \
  824. "subwb %3,%0" \
  825. : "=r" ((USItype)(sh)), \
  826. "=&r" ((USItype)(sl)) \
  827. : "0" ((USItype)(ah)), \
  828. "g" ((USItype)(bh)), \
  829. "1" ((USItype)(al)), \
  830. "g" ((USItype)(bl)))
  831. /* This insn works on Pyramids with AP, XP, or MI CPUs, but not with SP. */
  832. #define umul_ppmm(w1, w0, u, v) \
  833. ({union {UDItype __ll; \
  834. struct {USItype __h, __l; } __i; \
  835. } __xx; \
  836. __asm__ ("movw %1,%R0\n" \
  837. "uemul %2,%0" \
  838. : "=&r" (__xx.__ll) \
  839. : "g" ((USItype) (u)), \
  840. "g" ((USItype)(v))); \
  841. (w1) = __xx.__i.__h; (w0) = __xx.__i.__l; })
  842. #endif /* __pyr__ */
  843. /***************************************
  844. ************** RT/ROMP **************
  845. ***************************************/
  846. #if defined(__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
  847. #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
  848. __asm__ ("a %1,%5\n" \
  849. "ae %0,%3" \
  850. : "=r" ((USItype)(sh)), \
  851. "=&r" ((USItype)(sl)) \
  852. : "%0" ((USItype)(ah)), \
  853. "r" ((USItype)(bh)), \
  854. "%1" ((USItype)(al)), \
  855. "r" ((USItype)(bl)))
  856. #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
  857. __asm__ ("s %1,%5\n" \
  858. "se %0,%3" \
  859. : "=r" ((USItype)(sh)), \
  860. "=&r" ((USItype)(sl)) \
  861. : "0" ((USItype)(ah)), \
  862. "r" ((USItype)(bh)), \
  863. "1" ((USItype)(al)), \
  864. "r" ((USItype)(bl)))
  865. #define umul_ppmm(ph, pl, m0, m1) \
  866. do { \
  867. USItype __m0 = (m0), __m1 = (m1); \
  868. __asm__ ( \
  869. "s r2,r2\n" \
  870. "mts r10,%2\n" \
  871. "m r2,%3\n" \
  872. "m r2,%3\n" \
  873. "m r2,%3\n" \
  874. "m r2,%3\n" \
  875. "m r2,%3\n" \
  876. "m r2,%3\n" \
  877. "m r2,%3\n" \
  878. "m r2,%3\n" \
  879. "m r2,%3\n" \
  880. "m r2,%3\n" \
  881. "m r2,%3\n" \
  882. "m r2,%3\n" \
  883. "m r2,%3\n" \
  884. "m r2,%3\n" \
  885. "m r2,%3\n" \
  886. "m r2,%3\n" \
  887. "cas %0,r2,r0\n" \
  888. "mfs r10,%1" \
  889. : "=r" ((USItype)(ph)), \
  890. "=r" ((USItype)(pl)) \
  891. : "%r" (__m0), \
  892. "r" (__m1) \
  893. : "r2"); \
  894. (ph) += ((((SItype) __m0 >> 31) & __m1) \
  895. + (((SItype) __m1 >> 31) & __m0)); \
  896. } while (0)
  897. #define UMUL_TIME 20
  898. #define UDIV_TIME 200
  899. #endif /* RT/ROMP */
  900. /***************************************
  901. ************** SH2 ******************
  902. ***************************************/
  903. #if (defined(__sh2__) || defined(__sh3__) || defined(__SH4__)) \
  904. && W_TYPE_SIZE == 32
  905. #define umul_ppmm(w1, w0, u, v) \
  906. __asm__ ( \
  907. "dmulu.l %2,%3\n" \
  908. "sts macl,%1\n" \
  909. "sts mach,%0" \
  910. : "=r" ((USItype)(w1)), \
  911. "=r" ((USItype)(w0)) \
  912. : "r" ((USItype)(u)), \
  913. "r" ((USItype)(v)) \
  914. : "macl", "mach")
  915. #define UMUL_TIME 5
  916. #endif
  917. /***************************************
  918. ************** SPARC ****************
  919. ***************************************/
  920. #if defined(__sparc__) && W_TYPE_SIZE == 32
  921. #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
  922. __asm__ ("addcc %r4,%5,%1\n" \
  923. "addx %r2,%3,%0" \
  924. : "=r" ((USItype)(sh)), \
  925. "=&r" ((USItype)(sl)) \
  926. : "%rJ" ((USItype)(ah)), \
  927. "rI" ((USItype)(bh)), \
  928. "%rJ" ((USItype)(al)), \
  929. "rI" ((USItype)(bl)) \
  930. __CLOBBER_CC)
  931. #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
  932. __asm__ ("subcc %r4,%5,%1\n" \
  933. "subx %r2,%3,%0" \
  934. : "=r" ((USItype)(sh)), \
  935. "=&r" ((USItype)(sl)) \
  936. : "rJ" ((USItype)(ah)), \
  937. "rI" ((USItype)(bh)), \
  938. "rJ" ((USItype)(al)), \
  939. "rI" ((USItype)(bl)) \
  940. __CLOBBER_CC)
  941. #if defined(__sparc_v8__)
  942. /* Don't match immediate range because, 1) it is not often useful,
  943. 2) the 'I' flag thinks of the range as a 13 bit signed interval,
  944. while we want to match a 13 bit interval, sign extended to 32 bits,
  945. but INTERPRETED AS UNSIGNED. */
  946. #define umul_ppmm(w1, w0, u, v) \
  947. __asm__ ("umul %2,%3,%1;rd %%y,%0" \
  948. : "=r" ((USItype)(w1)), \
  949. "=r" ((USItype)(w0)) \
  950. : "r" ((USItype)(u)), \
  951. "r" ((USItype)(v)))
  952. #define UMUL_TIME 5
  953. #ifndef SUPERSPARC /* SuperSPARC's udiv only handles 53 bit dividends */
  954. #define udiv_qrnnd(q, r, n1, n0, d) \
  955. do { \
  956. USItype __q; \
  957. __asm__ ("mov %1,%%y;nop;nop;nop;udiv %2,%3,%0" \
  958. : "=r" ((USItype)(__q)) \
  959. : "r" ((USItype)(n1)), \
  960. "r" ((USItype)(n0)), \
  961. "r" ((USItype)(d))); \
  962. (r) = (n0) - __q * (d); \
  963. (q) = __q; \
  964. } while (0)
  965. #define UDIV_TIME 25
  966. #endif /* SUPERSPARC */
  967. #else /* ! __sparc_v8__ */
  968. #if defined(__sparclite__)
  969. /* This has hardware multiply but not divide. It also has two additional
  970. instructions scan (ffs from high bit) and divscc. */
  971. #define umul_ppmm(w1, w0, u, v) \
  972. __asm__ ("umul %2,%3,%1;rd %%y,%0" \
  973. : "=r" ((USItype)(w1)), \
  974. "=r" ((USItype)(w0)) \
  975. : "r" ((USItype)(u)), \
  976. "r" ((USItype)(v)))
  977. #define UMUL_TIME 5
  978. #define udiv_qrnnd(q, r, n1, n0, d) \
  979. __asm__ ("! Inlined udiv_qrnnd\n" \
  980. "wr %%g0,%2,%%y ! Not a delayed write for sparclite\n" \
  981. "tst %%g0\n" \
  982. "divscc %3,%4,%%g1\n" \
  983. "divscc %%g1,%4,%%g1\n" \
  984. "divscc %%g1,%4,%%g1\n" \
  985. "divscc %%g1,%4,%%g1\n" \
  986. "divscc %%g1,%4,%%g1\n" \
  987. "divscc %%g1,%4,%%g1\n" \
  988. "divscc %%g1,%4,%%g1\n" \
  989. "divscc %%g1,%4,%%g1\n" \
  990. "divscc %%g1,%4,%%g1\n" \
  991. "divscc %%g1,%4,%%g1\n" \
  992. "divscc %%g1,%4,%%g1\n" \
  993. "divscc %%g1,%4,%%g1\n" \
  994. "divscc %%g1,%4,%%g1\n" \
  995. "divscc %%g1,%4,%%g1\n" \
  996. "divscc %%g1,%4,%%g1\n" \
  997. "divscc %%g1,%4,%%g1\n" \
  998. "divscc %%g1,%4,%%g1\n" \
  999. "divscc %%g1,%4,%%g1\n" \
  1000. "divscc %%g1,%4,%%g1\n" \
  1001. "divscc %%g1,%4,%%g1\n" \
  1002. "divscc %%g1,%4,%%g1\n" \
  1003. "divscc %%g1,%4,%%g1\n" \
  1004. "divscc %%g1,%4,%%g1\n" \
  1005. "divscc %%g1,%4,%%g1\n" \
  1006. "divscc %%g1,%4,%%g1\n" \
  1007. "divscc %%g1,%4,%%g1\n" \
  1008. "divscc %%g1,%4,%%g1\n" \
  1009. "divscc %%g1,%4,%%g1\n" \
  1010. "divscc %%g1,%4,%%g1\n" \
  1011. "divscc %%g1,%4,%%g1\n" \
  1012. "divscc %%g1,%4,%%g1\n" \
  1013. "divscc %%g1,%4,%0\n" \
  1014. "rd %%y,%1\n" \
  1015. "bl,a 1f\n" \
  1016. "add %1,%4,%1\n" \
  1017. "1: ! End of inline udiv_qrnnd" \
  1018. : "=r" ((USItype)(q)), \
  1019. "=r" ((USItype)(r)) \
  1020. : "r" ((USItype)(n1)), \
  1021. "r" ((USItype)(n0)), \
  1022. "rI" ((USItype)(d)) \
  1023. : "%g1" __AND_CLOBBER_CC)
  1024. #define UDIV_TIME 37
  1025. #endif /* __sparclite__ */
  1026. #endif /* __sparc_v8__ */
  1027. /* Default to sparc v7 versions of umul_ppmm and udiv_qrnnd. */
  1028. #ifndef umul_ppmm
  1029. #define umul_ppmm(w1, w0, u, v) \
  1030. __asm__ ("! Inlined umul_ppmm\n" \
  1031. "wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr\n" \
  1032. "sra %3,31,%%g2 ! Don't move this insn\n" \
  1033. "and %2,%%g2,%%g2 ! Don't move this insn\n" \
  1034. "andcc %%g0,0,%%g1 ! Don't move this insn\n" \
  1035. "mulscc %%g1,%3,%%g1\n" \
  1036. "mulscc %%g1,%3,%%g1\n" \
  1037. "mulscc %%g1,%3,%%g1\n" \
  1038. "mulscc %%g1,%3,%%g1\n" \
  1039. "mulscc %%g1,%3,%%g1\n" \
  1040. "mulscc %%g1,%3,%%g1\n" \
  1041. "mulscc %%g1,%3,%%g1\n" \
  1042. "mulscc %%g1,%3,%%g1\n" \
  1043. "mulscc %%g1,%3,%%g1\n" \
  1044. "mulscc %%g1,%3,%%g1\n" \
  1045. "mulscc %%g1,%3,%%g1\n" \
  1046. "mulscc %%g1,%3,%%g1\n" \
  1047. "mulscc %%g1,%3,%%g1\n" \
  1048. "mulscc %%g1,%3,%%g1\n" \
  1049. "mulscc %%g1,%3,%%g1\n" \
  1050. "mulscc %%g1,%3,%%g1\n" \
  1051. "mulscc %%g1,%3,%%g1\n" \
  1052. "mulscc %%g1,%3,%%g1\n" \
  1053. "mulscc %%g1,%3,%%g1\n" \
  1054. "mulscc %%g1,%3,%%g1\n" \
  1055. "mulscc %%g1,%3,%%g1\n" \
  1056. "mulscc %%g1,%3,%%g1\n" \
  1057. "mulscc %%g1,%3,%%g1\n" \
  1058. "mulscc %%g1,%3,%%g1\n" \
  1059. "mulscc %%g1,%3,%%g1\n" \
  1060. "mulscc %%g1,%3,%%g1\n" \
  1061. "mulscc %%g1,%3,%%g1\n" \
  1062. "mulscc %%g1,%3,%%g1\n" \
  1063. "mulscc %%g1,%3,%%g1\n" \
  1064. "mulscc %%g1,%3,%%g1\n" \
  1065. "mulscc %%g1,%3,%%g1\n" \
  1066. "mulscc %%g1,%3,%%g1\n" \
  1067. "mulscc %%g1,0,%%g1\n" \
  1068. "add %%g1,%%g2,%0\n" \
  1069. "rd %%y,%1" \
  1070. : "=r" ((USItype)(w1)), \
  1071. "=r" ((USItype)(w0)) \
  1072. : "%rI" ((USItype)(u)), \
  1073. "r" ((USItype)(v)) \
  1074. : "%g1", "%g2" __AND_CLOBBER_CC)
  1075. #define UMUL_TIME 39 /* 39 instructions */
  1076. /* It's quite necessary to add this much assembler for the sparc.
  1077. The default udiv_qrnnd (in C) is more than 10 times slower! */
  1078. #define udiv_qrnnd(q, r, n1, n0, d) \
  1079. __asm__ ("! Inlined udiv_qrnnd\n\t" \
  1080. "mov 32,%%g1\n\t" \
  1081. "subcc %1,%2,%%g0\n\t" \
  1082. "1: bcs 5f\n\t" \
  1083. "addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n\t" \
  1084. "sub %1,%2,%1 ! this kills msb of n\n\t" \
  1085. "addx %1,%1,%1 ! so this can't give carry\n\t" \
  1086. "subcc %%g1,1,%%g1\n\t" \
  1087. "2: bne 1b\n\t" \
  1088. "subcc %1,%2,%%g0\n\t" \
  1089. "bcs 3f\n\t" \
  1090. "addxcc %0,%0,%0 ! shift n1n0 and a q-bit in lsb\n\t" \
  1091. "b 3f\n\t" \
  1092. "sub %1,%2,%1 ! this kills msb of n\n\t" \
  1093. "4: sub %1,%2,%1\n\t" \
  1094. "5: addxcc %1,%1,%1\n\t" \
  1095. "bcc 2b\n\t" \
  1096. "subcc %%g1,1,%%g1\n\t" \
  1097. "! Got carry from n. Subtract next step to cancel this carry.\n\t" \
  1098. "bne 4b\n\t" \
  1099. "addcc %0,%0,%0 ! shift n1n0 and a 0-bit in lsb\n\t" \
  1100. "sub %1,%2,%1\n\t" \
  1101. "3: xnor %0,0,%0\n\t" \
  1102. "! End of inline udiv_qrnnd\n" \
  1103. : "=&r" ((USItype)(q)), \
  1104. "=&r" ((USItype)(r)) \
  1105. : "r" ((USItype)(d)), \
  1106. "1" ((USItype)(n1)), \
  1107. "0" ((USItype)(n0)) : "%g1", "cc")
  1108. #define UDIV_TIME (3+7*32) /* 7 instructions/iteration. 32 iterations. */
  1109. #endif
  1110. #endif /* __sparc__ */
  1111. /***************************************
  1112. ************** VAX ******************
  1113. ***************************************/
  1114. #if defined(__vax__) && W_TYPE_SIZE == 32
  1115. #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
  1116. __asm__ ("addl2 %5,%1\n" \
  1117. "adwc %3,%0" \
  1118. : "=g" ((USItype)(sh)), \
  1119. "=&g" ((USItype)(sl)) \
  1120. : "%0" ((USItype)(ah)), \
  1121. "g" ((USItype)(bh)), \
  1122. "%1" ((USItype)(al)), \
  1123. "g" ((USItype)(bl)))
  1124. #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
  1125. __asm__ ("subl2 %5,%1\n" \
  1126. "sbwc %3,%0" \
  1127. : "=g" ((USItype)(sh)), \
  1128. "=&g" ((USItype)(sl)) \
  1129. : "0" ((USItype)(ah)), \
  1130. "g" ((USItype)(bh)), \
  1131. "1" ((USItype)(al)), \
  1132. "g" ((USItype)(bl)))
  1133. #define umul_ppmm(xh, xl, m0, m1) \
  1134. do { \
  1135. union {UDItype __ll; \
  1136. struct {USItype __l, __h; } __i; \
  1137. } __xx; \
  1138. USItype __m0 = (m0), __m1 = (m1); \
  1139. __asm__ ("emul %1,%2,$0,%0" \
  1140. : "=g" (__xx.__ll) \
  1141. : "g" (__m0), \
  1142. "g" (__m1)); \
  1143. (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
  1144. (xh) += ((((SItype) __m0 >> 31) & __m1) \
  1145. + (((SItype) __m1 >> 31) & __m0)); \
  1146. } while (0)
  1147. #define sdiv_qrnnd(q, r, n1, n0, d) \
  1148. do { \
  1149. union {DItype __ll; \
  1150. struct {SItype __l, __h; } __i; \
  1151. } __xx; \
  1152. __xx.__i.__h = n1; __xx.__i.__l = n0; \
  1153. __asm__ ("ediv %3,%2,%0,%1" \
  1154. : "=g" (q), "=g" (r) \
  1155. : "g" (__xx.__ll), "g" (d)); \
  1156. } while (0)
  1157. #endif /* __vax__ */
  1158. /***************************************
  1159. ************** Z8000 ****************
  1160. ***************************************/
  1161. #if defined(__z8000__) && W_TYPE_SIZE == 16
  1162. #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
  1163. __asm__ ("add %H1,%H5\n\tadc %H0,%H3" \
  1164. : "=r" ((unsigned int)(sh)), \
  1165. "=&r" ((unsigned int)(sl)) \
  1166. : "%0" ((unsigned int)(ah)), \
  1167. "r" ((unsigned int)(bh)), \
  1168. "%1" ((unsigned int)(al)), \
  1169. "rQR" ((unsigned int)(bl)))
  1170. #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
  1171. __asm__ ("sub %H1,%H5\n\tsbc %H0,%H3" \
  1172. : "=r" ((unsigned int)(sh)), \
  1173. "=&r" ((unsigned int)(sl)) \
  1174. : "0" ((unsigned int)(ah)), \
  1175. "r" ((unsigned int)(bh)), \
  1176. "1" ((unsigned int)(al)), \
  1177. "rQR" ((unsigned int)(bl)))
  1178. #define umul_ppmm(xh, xl, m0, m1) \
  1179. do { \
  1180. union {long int __ll; \
  1181. struct {unsigned int __h, __l; } __i; \
  1182. } __xx; \
  1183. unsigned int __m0 = (m0), __m1 = (m1); \
  1184. __asm__ ("mult %S0,%H3" \
  1185. : "=r" (__xx.__i.__h), \
  1186. "=r" (__xx.__i.__l) \
  1187. : "%1" (__m0), \
  1188. "rQR" (__m1)); \
  1189. (xh) = __xx.__i.__h; (xl) = __xx.__i.__l; \
  1190. (xh) += ((((signed int) __m0 >> 15) & __m1) \
  1191. + (((signed int) __m1 >> 15) & __m0)); \
  1192. } while (0)
  1193. #endif /* __z8000__ */
  1194. #endif /* __GNUC__ */
  1195. /***************************************
  1196. *********** Generic Versions ********
  1197. ***************************************/
  1198. #if !defined(umul_ppmm) && defined(__umulsidi3)
  1199. #define umul_ppmm(ph, pl, m0, m1) \
  1200. { \
  1201. UDWtype __ll = __umulsidi3(m0, m1); \
  1202. ph = (UWtype) (__ll >> W_TYPE_SIZE); \
  1203. pl = (UWtype) __ll; \
  1204. }
  1205. #endif
  1206. #if !defined(__umulsidi3)
  1207. #define __umulsidi3(u, v) \
  1208. ({UWtype __hi, __lo; \
  1209. umul_ppmm(__hi, __lo, u, v); \
  1210. ((UDWtype) __hi << W_TYPE_SIZE) | __lo; })
  1211. #endif
  1212. /* If this machine has no inline assembler, use C macros. */
  1213. #if !defined(add_ssaaaa)
  1214. #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
  1215. do { \
  1216. UWtype __x; \
  1217. __x = (al) + (bl); \
  1218. (sh) = (ah) + (bh) + (__x < (al)); \
  1219. (sl) = __x; \
  1220. } while (0)
  1221. #endif
  1222. #if !defined(sub_ddmmss)
  1223. #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
  1224. do { \
  1225. UWtype __x; \
  1226. __x = (al) - (bl); \
  1227. (sh) = (ah) - (bh) - (__x > (al)); \
  1228. (sl) = __x; \
  1229. } while (0)
  1230. #endif
  1231. #if !defined(umul_ppmm)
  1232. #define umul_ppmm(w1, w0, u, v) \
  1233. do { \
  1234. UWtype __x0, __x1, __x2, __x3; \
  1235. UHWtype __ul, __vl, __uh, __vh; \
  1236. UWtype __u = (u), __v = (v); \
  1237. \
  1238. __ul = __ll_lowpart(__u); \
  1239. __uh = __ll_highpart(__u); \
  1240. __vl = __ll_lowpart(__v); \
  1241. __vh = __ll_highpart(__v); \
  1242. \
  1243. __x0 = (UWtype) __ul * __vl; \
  1244. __x1 = (UWtype) __ul * __vh; \
  1245. __x2 = (UWtype) __uh * __vl; \
  1246. __x3 = (UWtype) __uh * __vh; \
  1247. \
  1248. __x1 += __ll_highpart(__x0);/* this can't give carry */ \
  1249. __x1 += __x2; /* but this indeed can */ \
  1250. if (__x1 < __x2) /* did we get it? */ \
  1251. __x3 += __ll_B; /* yes, add it in the proper pos. */ \
  1252. \
  1253. (w1) = __x3 + __ll_highpart(__x1); \
  1254. (w0) = (__ll_lowpart(__x1) << W_TYPE_SIZE/2) + __ll_lowpart(__x0); \
  1255. } while (0)
  1256. #endif
  1257. #if !defined(umul_ppmm)
  1258. #define smul_ppmm(w1, w0, u, v) \
  1259. do { \
  1260. UWtype __w1; \
  1261. UWtype __m0 = (u), __m1 = (v); \
  1262. umul_ppmm(__w1, w0, __m0, __m1); \
  1263. (w1) = __w1 - (-(__m0 >> (W_TYPE_SIZE - 1)) & __m1) \
  1264. - (-(__m1 >> (W_TYPE_SIZE - 1)) & __m0); \
  1265. } while (0)
  1266. #endif
  1267. /* Define this unconditionally, so it can be used for debugging. */
  1268. #define __udiv_qrnnd_c(q, r, n1, n0, d) \
  1269. do { \
  1270. UWtype __d1, __d0, __q1, __q0, __r1, __r0, __m; \
  1271. __d1 = __ll_highpart(d); \
  1272. __d0 = __ll_lowpart(d); \
  1273. \
  1274. __r1 = (n1) % __d1; \
  1275. __q1 = (n1) / __d1; \
  1276. __m = (UWtype) __q1 * __d0; \
  1277. __r1 = __r1 * __ll_B | __ll_highpart(n0); \
  1278. if (__r1 < __m) { \
  1279. __q1--, __r1 += (d); \
  1280. if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */ \
  1281. if (__r1 < __m) \
  1282. __q1--, __r1 += (d); \
  1283. } \
  1284. __r1 -= __m; \
  1285. \
  1286. __r0 = __r1 % __d1; \
  1287. __q0 = __r1 / __d1; \
  1288. __m = (UWtype) __q0 * __d0; \
  1289. __r0 = __r0 * __ll_B | __ll_lowpart(n0); \
  1290. if (__r0 < __m) { \
  1291. __q0--, __r0 += (d); \
  1292. if (__r0 >= (d)) \
  1293. if (__r0 < __m) \
  1294. __q0--, __r0 += (d); \
  1295. } \
  1296. __r0 -= __m; \
  1297. \
  1298. (q) = (UWtype) __q1 * __ll_B | __q0; \
  1299. (r) = __r0; \
  1300. } while (0)
  1301. /* If the processor has no udiv_qrnnd but sdiv_qrnnd, go through
  1302. __udiv_w_sdiv (defined in libgcc or elsewhere). */
  1303. #if !defined(udiv_qrnnd) && defined(sdiv_qrnnd)
  1304. #define udiv_qrnnd(q, r, nh, nl, d) \
  1305. do { \
  1306. UWtype __r; \
  1307. (q) = __MPN(udiv_w_sdiv) (&__r, nh, nl, d); \
  1308. (r) = __r; \
  1309. } while (0)
  1310. #endif
  1311. /* If udiv_qrnnd was not defined for this processor, use __udiv_qrnnd_c. */
  1312. #if !defined(udiv_qrnnd)
  1313. #define UDIV_NEEDS_NORMALIZATION 1
  1314. #define udiv_qrnnd __udiv_qrnnd_c
  1315. #endif
  1316. #ifndef UDIV_NEEDS_NORMALIZATION
  1317. #define UDIV_NEEDS_NORMALIZATION 0
  1318. #endif