swiotlb.c 20 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Dynamic DMA mapping support.
  4. *
  5. * This implementation is a fallback for platforms that do not support
  6. * I/O TLBs (aka DMA address translation hardware).
  7. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  8. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  9. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  10. * David Mosberger-Tang <davidm@hpl.hp.com>
  11. *
  12. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  13. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  14. * unnecessary i-cache flushing.
  15. * 04/07/.. ak Better overflow handling. Assorted fixes.
  16. * 05/09/10 linville Add support for syncing ranges, support syncing for
  17. * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  18. * 08/12/11 beckyb Add highmem support
  19. */
  20. #define pr_fmt(fmt) "software IO TLB: " fmt
  21. #include <linux/cache.h>
  22. #include <linux/dma-direct.h>
  23. #include <linux/dma-map-ops.h>
  24. #include <linux/mm.h>
  25. #include <linux/export.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/string.h>
  28. #include <linux/swiotlb.h>
  29. #include <linux/pfn.h>
  30. #include <linux/types.h>
  31. #include <linux/ctype.h>
  32. #include <linux/highmem.h>
  33. #include <linux/gfp.h>
  34. #include <linux/scatterlist.h>
  35. #include <linux/mem_encrypt.h>
  36. #include <linux/set_memory.h>
  37. #ifdef CONFIG_DEBUG_FS
  38. #include <linux/debugfs.h>
  39. #endif
  40. #include <asm/io.h>
  41. #include <asm/dma.h>
  42. #include <linux/init.h>
  43. #include <linux/memblock.h>
  44. #include <linux/iommu-helper.h>
  45. #define CREATE_TRACE_POINTS
  46. #include <trace/events/swiotlb.h>
  47. #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  48. /*
  49. * Minimum IO TLB size to bother booting with. Systems with mainly
  50. * 64bit capable cards will only lightly use the swiotlb. If we can't
  51. * allocate a contiguous 1MB, we're probably in trouble anyway.
  52. */
  53. #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  54. enum swiotlb_force swiotlb_force;
  55. /*
  56. * Used to do a quick range check in swiotlb_tbl_unmap_single and
  57. * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
  58. * API.
  59. */
  60. phys_addr_t io_tlb_start, io_tlb_end;
  61. /*
  62. * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
  63. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  64. */
  65. static unsigned long io_tlb_nslabs;
  66. /*
  67. * The number of used IO TLB block
  68. */
  69. static unsigned long io_tlb_used;
  70. /*
  71. * This is a free list describing the number of free entries available from
  72. * each index
  73. */
  74. static unsigned int *io_tlb_list;
  75. static unsigned int io_tlb_index;
  76. /*
  77. * Max segment that we can provide which (if pages are contingous) will
  78. * not be bounced (unless SWIOTLB_FORCE is set).
  79. */
  80. static unsigned int max_segment;
  81. /*
  82. * We need to save away the original address corresponding to a mapped entry
  83. * for the sync operations.
  84. */
  85. #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
  86. static phys_addr_t *io_tlb_orig_addr;
  87. /*
  88. * Protect the above data structures in the map and unmap calls
  89. */
  90. static DEFINE_SPINLOCK(io_tlb_lock);
  91. static int late_alloc;
  92. static int __init
  93. setup_io_tlb_npages(char *str)
  94. {
  95. if (isdigit(*str)) {
  96. io_tlb_nslabs = simple_strtoul(str, &str, 0);
  97. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  98. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  99. }
  100. if (*str == ',')
  101. ++str;
  102. if (!strcmp(str, "force")) {
  103. swiotlb_force = SWIOTLB_FORCE;
  104. } else if (!strcmp(str, "noforce")) {
  105. swiotlb_force = SWIOTLB_NO_FORCE;
  106. io_tlb_nslabs = 1;
  107. }
  108. return 0;
  109. }
  110. early_param("swiotlb", setup_io_tlb_npages);
  111. static bool no_iotlb_memory;
  112. unsigned long swiotlb_nr_tbl(void)
  113. {
  114. return unlikely(no_iotlb_memory) ? 0 : io_tlb_nslabs;
  115. }
  116. EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
  117. unsigned int swiotlb_max_segment(void)
  118. {
  119. return unlikely(no_iotlb_memory) ? 0 : max_segment;
  120. }
  121. EXPORT_SYMBOL_GPL(swiotlb_max_segment);
  122. void swiotlb_set_max_segment(unsigned int val)
  123. {
  124. if (swiotlb_force == SWIOTLB_FORCE)
  125. max_segment = 1;
  126. else
  127. max_segment = rounddown(val, PAGE_SIZE);
  128. }
  129. /* default to 64MB */
  130. #define IO_TLB_DEFAULT_SIZE (64UL<<20)
  131. unsigned long swiotlb_size_or_default(void)
  132. {
  133. unsigned long size;
  134. size = io_tlb_nslabs << IO_TLB_SHIFT;
  135. return size ? size : (IO_TLB_DEFAULT_SIZE);
  136. }
  137. void swiotlb_print_info(void)
  138. {
  139. unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  140. if (no_iotlb_memory) {
  141. pr_warn("No low mem\n");
  142. return;
  143. }
  144. pr_info("mapped [mem %pa-%pa] (%luMB)\n", &io_tlb_start, &io_tlb_end,
  145. bytes >> 20);
  146. }
  147. static inline unsigned long io_tlb_offset(unsigned long val)
  148. {
  149. return val & (IO_TLB_SEGSIZE - 1);
  150. }
  151. static inline unsigned long nr_slots(u64 val)
  152. {
  153. return DIV_ROUND_UP(val, IO_TLB_SIZE);
  154. }
  155. /*
  156. * Early SWIOTLB allocation may be too early to allow an architecture to
  157. * perform the desired operations. This function allows the architecture to
  158. * call SWIOTLB when the operations are possible. It needs to be called
  159. * before the SWIOTLB memory is used.
  160. */
  161. void __init swiotlb_update_mem_attributes(void)
  162. {
  163. void *vaddr;
  164. unsigned long bytes;
  165. if (no_iotlb_memory || late_alloc)
  166. return;
  167. vaddr = phys_to_virt(io_tlb_start);
  168. bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT);
  169. set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT);
  170. memset(vaddr, 0, bytes);
  171. }
  172. int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
  173. {
  174. unsigned long i, bytes;
  175. size_t alloc_size;
  176. bytes = nslabs << IO_TLB_SHIFT;
  177. io_tlb_nslabs = nslabs;
  178. io_tlb_start = __pa(tlb);
  179. io_tlb_end = io_tlb_start + bytes;
  180. /*
  181. * Allocate and initialize the free list array. This array is used
  182. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  183. * between io_tlb_start and io_tlb_end.
  184. */
  185. alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(int));
  186. io_tlb_list = memblock_alloc(alloc_size, PAGE_SIZE);
  187. if (!io_tlb_list)
  188. panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
  189. __func__, alloc_size, PAGE_SIZE);
  190. alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t));
  191. io_tlb_orig_addr = memblock_alloc(alloc_size, PAGE_SIZE);
  192. if (!io_tlb_orig_addr)
  193. panic("%s: Failed to allocate %zu bytes align=0x%lx\n",
  194. __func__, alloc_size, PAGE_SIZE);
  195. for (i = 0; i < io_tlb_nslabs; i++) {
  196. io_tlb_list[i] = IO_TLB_SEGSIZE - io_tlb_offset(i);
  197. io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
  198. }
  199. io_tlb_index = 0;
  200. no_iotlb_memory = false;
  201. if (verbose)
  202. swiotlb_print_info();
  203. swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
  204. return 0;
  205. }
  206. /*
  207. * Statically reserve bounce buffer space and initialize bounce buffer data
  208. * structures for the software IO TLB used to implement the DMA API.
  209. */
  210. void __init
  211. swiotlb_init(int verbose)
  212. {
  213. size_t default_size = IO_TLB_DEFAULT_SIZE;
  214. unsigned char *vstart;
  215. unsigned long bytes;
  216. if (!io_tlb_nslabs) {
  217. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  218. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  219. }
  220. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  221. /* Get IO TLB memory from the low pages */
  222. vstart = memblock_alloc_low(PAGE_ALIGN(bytes), PAGE_SIZE);
  223. if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
  224. return;
  225. if (io_tlb_start) {
  226. memblock_free_early(io_tlb_start,
  227. PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
  228. io_tlb_start = 0;
  229. }
  230. pr_warn("Cannot allocate buffer");
  231. no_iotlb_memory = true;
  232. }
  233. /*
  234. * Systems with larger DMA zones (those that don't support ISA) can
  235. * initialize the swiotlb later using the slab allocator if needed.
  236. * This should be just like above, but with some error catching.
  237. */
  238. int
  239. swiotlb_late_init_with_default_size(size_t default_size)
  240. {
  241. unsigned long bytes, req_nslabs = io_tlb_nslabs;
  242. unsigned char *vstart = NULL;
  243. unsigned int order;
  244. int rc = 0;
  245. if (!io_tlb_nslabs) {
  246. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  247. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  248. }
  249. /*
  250. * Get IO TLB memory from the low pages
  251. */
  252. order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
  253. io_tlb_nslabs = SLABS_PER_PAGE << order;
  254. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  255. while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
  256. vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
  257. order);
  258. if (vstart)
  259. break;
  260. order--;
  261. }
  262. if (!vstart) {
  263. io_tlb_nslabs = req_nslabs;
  264. return -ENOMEM;
  265. }
  266. if (order != get_order(bytes)) {
  267. pr_warn("only able to allocate %ld MB\n",
  268. (PAGE_SIZE << order) >> 20);
  269. io_tlb_nslabs = SLABS_PER_PAGE << order;
  270. }
  271. rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
  272. if (rc)
  273. free_pages((unsigned long)vstart, order);
  274. return rc;
  275. }
  276. static void swiotlb_cleanup(void)
  277. {
  278. io_tlb_end = 0;
  279. io_tlb_start = 0;
  280. io_tlb_nslabs = 0;
  281. max_segment = 0;
  282. }
  283. int
  284. swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
  285. {
  286. unsigned long i, bytes;
  287. bytes = nslabs << IO_TLB_SHIFT;
  288. io_tlb_nslabs = nslabs;
  289. io_tlb_start = virt_to_phys(tlb);
  290. io_tlb_end = io_tlb_start + bytes;
  291. set_memory_decrypted((unsigned long)tlb, bytes >> PAGE_SHIFT);
  292. memset(tlb, 0, bytes);
  293. /*
  294. * Allocate and initialize the free list array. This array is used
  295. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  296. * between io_tlb_start and io_tlb_end.
  297. */
  298. io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
  299. get_order(io_tlb_nslabs * sizeof(int)));
  300. if (!io_tlb_list)
  301. goto cleanup3;
  302. io_tlb_orig_addr = (phys_addr_t *)
  303. __get_free_pages(GFP_KERNEL,
  304. get_order(io_tlb_nslabs *
  305. sizeof(phys_addr_t)));
  306. if (!io_tlb_orig_addr)
  307. goto cleanup4;
  308. for (i = 0; i < io_tlb_nslabs; i++) {
  309. io_tlb_list[i] = IO_TLB_SEGSIZE - io_tlb_offset(i);
  310. io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
  311. }
  312. io_tlb_index = 0;
  313. no_iotlb_memory = false;
  314. swiotlb_print_info();
  315. late_alloc = 1;
  316. swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
  317. return 0;
  318. cleanup4:
  319. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  320. sizeof(int)));
  321. io_tlb_list = NULL;
  322. cleanup3:
  323. swiotlb_cleanup();
  324. return -ENOMEM;
  325. }
  326. void __init swiotlb_exit(void)
  327. {
  328. if (!io_tlb_orig_addr)
  329. return;
  330. if (late_alloc) {
  331. free_pages((unsigned long)io_tlb_orig_addr,
  332. get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
  333. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  334. sizeof(int)));
  335. free_pages((unsigned long)phys_to_virt(io_tlb_start),
  336. get_order(io_tlb_nslabs << IO_TLB_SHIFT));
  337. } else {
  338. memblock_free_late(__pa(io_tlb_orig_addr),
  339. PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
  340. memblock_free_late(__pa(io_tlb_list),
  341. PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
  342. memblock_free_late(io_tlb_start,
  343. PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
  344. }
  345. swiotlb_cleanup();
  346. }
  347. /*
  348. * Bounce: copy the swiotlb buffer from or back to the original dma location
  349. */
  350. static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
  351. size_t size, enum dma_data_direction dir)
  352. {
  353. unsigned long pfn = PFN_DOWN(orig_addr);
  354. unsigned char *vaddr = phys_to_virt(tlb_addr);
  355. if (PageHighMem(pfn_to_page(pfn))) {
  356. /* The buffer does not have a mapping. Map it in and copy */
  357. unsigned int offset = orig_addr & ~PAGE_MASK;
  358. char *buffer;
  359. unsigned int sz = 0;
  360. unsigned long flags;
  361. while (size) {
  362. sz = min_t(size_t, PAGE_SIZE - offset, size);
  363. local_irq_save(flags);
  364. buffer = kmap_atomic(pfn_to_page(pfn));
  365. if (dir == DMA_TO_DEVICE)
  366. memcpy(vaddr, buffer + offset, sz);
  367. else
  368. memcpy(buffer + offset, vaddr, sz);
  369. kunmap_atomic(buffer);
  370. local_irq_restore(flags);
  371. size -= sz;
  372. pfn++;
  373. vaddr += sz;
  374. offset = 0;
  375. }
  376. } else if (dir == DMA_TO_DEVICE) {
  377. memcpy(vaddr, phys_to_virt(orig_addr), size);
  378. } else {
  379. memcpy(phys_to_virt(orig_addr), vaddr, size);
  380. }
  381. }
  382. #define slot_addr(start, idx) ((start) + ((idx) << IO_TLB_SHIFT))
  383. /*
  384. * Return the offset into a iotlb slot required to keep the device happy.
  385. */
  386. static unsigned int swiotlb_align_offset(struct device *dev, u64 addr)
  387. {
  388. return addr & dma_get_min_align_mask(dev) & (IO_TLB_SIZE - 1);
  389. }
  390. /*
  391. * Carefully handle integer overflow which can occur when boundary_mask == ~0UL.
  392. */
  393. static inline unsigned long get_max_slots(unsigned long boundary_mask)
  394. {
  395. if (boundary_mask == ~0UL)
  396. return 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
  397. return nr_slots(boundary_mask + 1);
  398. }
  399. static unsigned int wrap_index(unsigned int index)
  400. {
  401. if (index >= io_tlb_nslabs)
  402. return 0;
  403. return index;
  404. }
  405. /*
  406. * Find a suitable number of IO TLB entries size that will fit this request and
  407. * allocate a buffer from that IO TLB pool.
  408. */
  409. static int find_slots(struct device *dev, phys_addr_t orig_addr,
  410. size_t alloc_size)
  411. {
  412. unsigned long boundary_mask = dma_get_seg_boundary(dev);
  413. dma_addr_t tbl_dma_addr =
  414. phys_to_dma_unencrypted(dev, io_tlb_start) & boundary_mask;
  415. unsigned long max_slots = get_max_slots(boundary_mask);
  416. unsigned int iotlb_align_mask =
  417. dma_get_min_align_mask(dev) & ~(IO_TLB_SIZE - 1);
  418. unsigned int nslots = nr_slots(alloc_size), stride;
  419. unsigned int index, wrap, count = 0, i;
  420. unsigned long flags;
  421. BUG_ON(!nslots);
  422. /*
  423. * For mappings with an alignment requirement don't bother looping to
  424. * unaligned slots once we found an aligned one. For allocations of
  425. * PAGE_SIZE or larger only look for page aligned allocations.
  426. */
  427. stride = (iotlb_align_mask >> IO_TLB_SHIFT) + 1;
  428. if (alloc_size >= PAGE_SIZE)
  429. stride = max(stride, stride << (PAGE_SHIFT - IO_TLB_SHIFT));
  430. spin_lock_irqsave(&io_tlb_lock, flags);
  431. if (unlikely(nslots > io_tlb_nslabs - io_tlb_used))
  432. goto not_found;
  433. index = wrap = wrap_index(ALIGN(io_tlb_index, stride));
  434. do {
  435. if ((slot_addr(tbl_dma_addr, index) & iotlb_align_mask) !=
  436. (orig_addr & iotlb_align_mask)) {
  437. index = wrap_index(index + 1);
  438. continue;
  439. }
  440. /*
  441. * If we find a slot that indicates we have 'nslots' number of
  442. * contiguous buffers, we allocate the buffers from that slot
  443. * and mark the entries as '0' indicating unavailable.
  444. */
  445. if (!iommu_is_span_boundary(index, nslots,
  446. nr_slots(tbl_dma_addr),
  447. max_slots)) {
  448. if (io_tlb_list[index] >= nslots)
  449. goto found;
  450. }
  451. index = wrap_index(index + stride);
  452. } while (index != wrap);
  453. not_found:
  454. spin_unlock_irqrestore(&io_tlb_lock, flags);
  455. return -1;
  456. found:
  457. for (i = index; i < index + nslots; i++)
  458. io_tlb_list[i] = 0;
  459. for (i = index - 1;
  460. io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 &&
  461. io_tlb_list[i]; i--)
  462. io_tlb_list[i] = ++count;
  463. /*
  464. * Update the indices to avoid searching in the next round.
  465. */
  466. if (index + nslots < io_tlb_nslabs)
  467. io_tlb_index = index + nslots;
  468. else
  469. io_tlb_index = 0;
  470. io_tlb_used += nslots;
  471. spin_unlock_irqrestore(&io_tlb_lock, flags);
  472. return index;
  473. }
  474. phys_addr_t swiotlb_tbl_map_single(struct device *dev, phys_addr_t orig_addr,
  475. size_t mapping_size, size_t alloc_size,
  476. enum dma_data_direction dir, unsigned long attrs)
  477. {
  478. unsigned int offset = swiotlb_align_offset(dev, orig_addr);
  479. unsigned int i;
  480. int index;
  481. phys_addr_t tlb_addr;
  482. if (no_iotlb_memory)
  483. panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
  484. if (mem_encrypt_active())
  485. pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n");
  486. if (mapping_size > alloc_size) {
  487. dev_warn_once(dev, "Invalid sizes (mapping: %zd bytes, alloc: %zd bytes)",
  488. mapping_size, alloc_size);
  489. return (phys_addr_t)DMA_MAPPING_ERROR;
  490. }
  491. index = find_slots(dev, orig_addr, alloc_size + offset);
  492. if (index == -1) {
  493. if (!(attrs & DMA_ATTR_NO_WARN))
  494. dev_warn_ratelimited(dev,
  495. "swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n",
  496. alloc_size, io_tlb_nslabs, io_tlb_used);
  497. return (phys_addr_t)DMA_MAPPING_ERROR;
  498. }
  499. /*
  500. * Save away the mapping from the original address to the DMA address.
  501. * This is needed when we sync the memory. Then we sync the buffer if
  502. * needed.
  503. */
  504. for (i = 0; i < nr_slots(alloc_size + offset); i++)
  505. io_tlb_orig_addr[index + i] = slot_addr(orig_addr, i);
  506. tlb_addr = slot_addr(io_tlb_start, index) + offset;
  507. if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
  508. (!(attrs & DMA_ATTR_OVERWRITE) || dir == DMA_TO_DEVICE ||
  509. dir == DMA_BIDIRECTIONAL))
  510. swiotlb_bounce(orig_addr, tlb_addr, mapping_size, DMA_TO_DEVICE);
  511. return tlb_addr;
  512. }
  513. /*
  514. * tlb_addr is the physical address of the bounce buffer to unmap.
  515. */
  516. void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
  517. size_t mapping_size, size_t alloc_size,
  518. enum dma_data_direction dir, unsigned long attrs)
  519. {
  520. unsigned long flags;
  521. unsigned int offset = swiotlb_align_offset(hwdev, tlb_addr);
  522. int i, count, nslots = nr_slots(alloc_size + offset);
  523. int index = (tlb_addr - offset - io_tlb_start) >> IO_TLB_SHIFT;
  524. phys_addr_t orig_addr = io_tlb_orig_addr[index];
  525. /*
  526. * First, sync the memory before unmapping the entry
  527. */
  528. if (orig_addr != INVALID_PHYS_ADDR &&
  529. !(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
  530. ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
  531. swiotlb_bounce(orig_addr, tlb_addr, mapping_size, DMA_FROM_DEVICE);
  532. /*
  533. * Return the buffer to the free list by setting the corresponding
  534. * entries to indicate the number of contiguous entries available.
  535. * While returning the entries to the free list, we merge the entries
  536. * with slots below and above the pool being returned.
  537. */
  538. spin_lock_irqsave(&io_tlb_lock, flags);
  539. if (index + nslots < ALIGN(index + 1, IO_TLB_SEGSIZE))
  540. count = io_tlb_list[index + nslots];
  541. else
  542. count = 0;
  543. /*
  544. * Step 1: return the slots to the free list, merging the slots with
  545. * superceeding slots
  546. */
  547. for (i = index + nslots - 1; i >= index; i--) {
  548. io_tlb_list[i] = ++count;
  549. io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
  550. }
  551. /*
  552. * Step 2: merge the returned slots with the preceding slots, if
  553. * available (non zero)
  554. */
  555. for (i = index - 1;
  556. io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 && io_tlb_list[i];
  557. i--)
  558. io_tlb_list[i] = ++count;
  559. io_tlb_used -= nslots;
  560. spin_unlock_irqrestore(&io_tlb_lock, flags);
  561. }
  562. void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
  563. size_t size, enum dma_data_direction dir,
  564. enum dma_sync_target target)
  565. {
  566. int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
  567. phys_addr_t orig_addr = io_tlb_orig_addr[index];
  568. if (orig_addr == INVALID_PHYS_ADDR)
  569. return;
  570. orig_addr += (tlb_addr & (IO_TLB_SIZE - 1)) -
  571. swiotlb_align_offset(hwdev, orig_addr);
  572. switch (target) {
  573. case SYNC_FOR_CPU:
  574. if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
  575. swiotlb_bounce(orig_addr, tlb_addr,
  576. size, DMA_FROM_DEVICE);
  577. else
  578. BUG_ON(dir != DMA_TO_DEVICE);
  579. break;
  580. case SYNC_FOR_DEVICE:
  581. if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
  582. swiotlb_bounce(orig_addr, tlb_addr,
  583. size, DMA_TO_DEVICE);
  584. else
  585. BUG_ON(dir != DMA_FROM_DEVICE);
  586. break;
  587. default:
  588. BUG();
  589. }
  590. }
  591. /*
  592. * Create a swiotlb mapping for the buffer at @paddr, and in case of DMAing
  593. * to the device copy the data into it as well.
  594. */
  595. dma_addr_t swiotlb_map(struct device *dev, phys_addr_t paddr, size_t size,
  596. enum dma_data_direction dir, unsigned long attrs)
  597. {
  598. phys_addr_t swiotlb_addr;
  599. dma_addr_t dma_addr;
  600. trace_swiotlb_bounced(dev, phys_to_dma(dev, paddr), size,
  601. swiotlb_force);
  602. swiotlb_addr = swiotlb_tbl_map_single(dev, paddr, size, size, dir,
  603. attrs);
  604. if (swiotlb_addr == (phys_addr_t)DMA_MAPPING_ERROR)
  605. return DMA_MAPPING_ERROR;
  606. /* Ensure that the address returned is DMA'ble */
  607. dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr);
  608. if (unlikely(!dma_capable(dev, dma_addr, size, true))) {
  609. swiotlb_tbl_unmap_single(dev, swiotlb_addr, size, size, dir,
  610. attrs | DMA_ATTR_SKIP_CPU_SYNC);
  611. dev_WARN_ONCE(dev, 1,
  612. "swiotlb addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
  613. &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
  614. return DMA_MAPPING_ERROR;
  615. }
  616. if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
  617. arch_sync_dma_for_device(swiotlb_addr, size, dir);
  618. return dma_addr;
  619. }
  620. size_t swiotlb_max_mapping_size(struct device *dev)
  621. {
  622. return ((size_t)IO_TLB_SIZE) * IO_TLB_SEGSIZE;
  623. }
  624. bool is_swiotlb_active(void)
  625. {
  626. /*
  627. * When SWIOTLB is initialized, even if io_tlb_start points to physical
  628. * address zero, io_tlb_end surely doesn't.
  629. */
  630. return io_tlb_end != 0;
  631. }
  632. #ifdef CONFIG_DEBUG_FS
  633. static int __init swiotlb_create_debugfs(void)
  634. {
  635. struct dentry *root;
  636. root = debugfs_create_dir("swiotlb", NULL);
  637. debugfs_create_ulong("io_tlb_nslabs", 0400, root, &io_tlb_nslabs);
  638. debugfs_create_ulong("io_tlb_used", 0400, root, &io_tlb_used);
  639. return 0;
  640. }
  641. late_initcall(swiotlb_create_debugfs);
  642. #endif